Abstract: A method of manufacturing a semiconductor laser device is provided. First, a first mask layer is formed on an epitaxial structure to define a protrudent area in a ridge structure. Thereafter, a conformal second mask layer is formed over the epitaxial structure to cover the first mask layer. A third mask layer is formed over the second mask layer. The exposed second mask layer is removed. Using the first and the third mask layers as etching masks, a portion of the epitaxial structure is removed. The third mask layer and the remaining second mask layer are removed to form the ridge structure. An insulation layer is formed on the epitaxial structure and then the first mask layer is removed to expose the top surface of the protrudent area. A conductive layer is formed on the epitaxial structure such that it contacts with the top surface of the protrudent area.

Abstract: A light-emitting diode (LED) and a method for manufacturing the same are described. The method for manufacturing the LED comprises the following steps. An illuminant epitaxial structure is provided, in which the illuminant epitaxial structure has a first surface and a second surface on opposite sides, and a substrate is deposed on the first surface of the illuminant epitaxial structure. A metal layer is formed on the second surface of the illuminant epitaxial structure. An anodic oxidization step is performed to oxidize the metal layer, so as to form a metal oxide layer. An etching step is performed to remove a portion of the metal oxide layer, so as to form a plurality of holes in the metal oxide layer.

Abstract: An overlay mark for checking the alignment accuracy between a lower layer and a lithography process for defining an upper layer is described, including a part of the lower layer having two first x-directional trenches, two first y-directional trenches, two second x-directional trenches and two second y-directional trenches therein, and two x-directional and two y-directional photoresist bars thereover that are surrounded by the trenches and formed in the lithography process. When the lower layer is fully aligned with the lithography process, the intersection of the central line of the two first x-directional trenches and that of the two first y-directional trenches, the intersection of the central line of the two second x-directional trenches and that of the two second y-directional trenches and the intersection of the central line of the two x-directional photoresist lines and that of the two y-directional photoresist lines coincide with each other.

Abstract: Method for manufacturing a hosting structure of nanometric elements comprising the steps of depositing on an upper surface of a substrate, of a first material, a block-seed having at least one side wall. Depositing on at least one portion of sad surface and on the block-seed a first layer, of predetermined thickness of a second material, and subsequently selectively and anisotropically etching it to form a spacer-seed adjacent to the side wall. The cycle of deposition and selective etching steps of a predetermined material are repeated n times (n?2), with at least one spacer formed in each cycle. This predetermined material is different for each pair of consecutive depositions. The above n steps provides at least one multilayer body. Further selective etching removes every other spacers to provide a plurality of nanometric hosting seats, which forms contact terminals for a plurality of molecular transistors hosted in said hosting seats.

Abstract: The present invention relates to a method of making supports for light emitting diodes, wherein rigid substrates are used as supports for light emitting diodes, it being proposed, in particular, to render the substrates more fragile in order to make certain zones of a lower layer of the said substrate more flexible so that the substrate is able to deform in the region of the zones thus made flexible, the deformation then taking place without causing the electrical conduction of a top layer, on which the diodes are disposed, to be broken. In one particular embodiment of the invention it is proposed to provide as many rigid substrate plates as there are support planes in the three-dimensional environment, and to connect these various substrate plates together by means of deformable conductive components disposed in accordance with surface mounted component technology.

Abstract: The present invention provides a method of super flat chemical mechanical polishing (SF-CMP) technology, which is a method characterized in replacing laser lift-off in a semiconductor fabricating process. SF-CMP has a main step of planting a plurality of polishing stop points before polishing the surface, which is characterized by hardness of the polishing stop points material being larger than hardness of the surface material. Therefore, the present method can achieve super flat polishing surface without removing polishing stop points.

Abstract: An optical semiconductor device includes: a first conductivity type first semiconductor region; a first conductivity type second semiconductor region formed on the first semiconductor region; a second conductivity type third semiconductor region formed on the second semiconductor region; a photodetector section formed of the second semiconductor region and the third semiconductor region; a micro mirror formed of a trench formed selectively in a region of the first semiconductor region and the second semiconductor region except the photodetector section; and a semiconductor laser element held on the bottom face of the trench. A first conductivity type buried layer of which impurity concentration is higher than those of the first semiconductor region and the second semiconductor region is selectively formed between the first semiconductor region and the second semiconductor region in the photodetector section.

Abstract: A method of manufacturing a coaxial trace (100) within a surrounding material (190) includes: providing a first substrate (191, 410) and a second substrate (192, 1010) composed of the surrounding material; forming a first portion (101, 601) of the coaxial trace in the first substrate; forming a second portion (102, 1001) of the coaxial trace in the second substrate; aligning the first portion of the coaxial trace with the second portion of the coaxial trace; and bonding the first portion of the coaxial trace to the second portion of the coaxial trace.

Abstract: A method of fabricating a cladding region for use in MRAM devices includes the formation of a conductive bit line proximate to a magnetoresistive memory device. The conductive bit line is immersed in a first bath containing dissolved ions of a first conductive material for a time sufficient to displacement plate a first barrier layer on the conductive line. The first barrier layer is then immersed in an electroless plating bath to form a flux concentrating layer on the first barrier layer. The flux concentrating layer is immersed in a second bath containing dissolved ions of a second conductive material for a time sufficient to displacement plate a second barrier layer on the flux concentrating layer.

Abstract: A method for manufacturing a micro-electro-mechanical device, which has supporting parts and operative parts, includes providing a first semiconductor wafer, having a first layer of semiconductor material and a second layer of semiconductor material arranged on top of the first layer, forming first supporting parts and first operative parts of the device in the second layer, forming temporary anchors in the first layer, and bonding the first wafer to a second wafer, with the second layer facing the second wafer. After bonding the first wafer and the second wafer together, second supporting parts and second operative parts of said device are formed in the first layer. The temporary anchors are removed from the first layer to free the operative parts formed therein.

Abstract: A method for fabricating a semiconductor light-emitting element according to the present invention includes the steps of (A) providing a striped masking layer on a first Group III-V compound semiconductor, (B) selectively growing a second Group III-V compound semiconductor over the entire surface of the first Group III-V compound semiconductor except a portion covered with the masking layer, thereby forming a current confining layer that has a striped opening defined by the masking layer, (C) selectively removing the masking layer, and (D) growing a third Group III-V compound semiconductor to cover the surface of the first Group III-V compound semiconductor, which is exposed through the striped opening, and the surface of the current confining layer.

Abstract: A light-emitting diode (LED) structure and a method for manufacturing the LED structure are disclosed for promoting the recognition rate of LED chips, wherein a roughness degree of the surface under a first electrode pad of a first conductivity type is made similar to that of the surface under a second electrode pad of a second conductivity type, so that the luster shown from the first electrode pad can be similar to that from the second electrode pad, thus resolving the poor recognition problem of wire-bonding machines caused by different lusters from the first and second electrode pads.

Abstract: Systems and methods are disclosed for fabricating a semiconductor light-emitting diode (LED) device by forming an n-doped gallium nitride (n-GaN) layer on the LED device and roughening the surface of the n-GaN layer to extract light from an interior of the LED device.

Abstract: A two-wavelength semiconductor laser device includes a first conductive material substrate having thereon first and second regions separated from each other. A first semiconductor laser diode is formed on the first region. A non-active layer is formed on the second region and has the same layers as those of the first semiconductor laser diode. A second semiconductor laser diode is formed on the non-active layer. A lateral conductive region is formed at least between the first and second semiconductor laser diodes.

Abstract: The present invention provides to a substrate for a semiconductor device, in which electric characteristics to high-speed signals are enhanced by facilitating the mounting of a circuit component, such as a decoupling capacitor, fabricated separately from the substrate. The substrate for a semiconductor device, on which the circuit component, such as a decoupling capacitor, can be mounted, is counterbored from the mounting surface side thereof, and a component mounting hole where a connection terminal, which will be electrically connected to the circuit component, is exposed in the inner bottom face is made by counterboring. The circuit component is mounted and electrically connected to the connection terminal, and a semiconductor element is mounted on the substrate by flip-chip connection.

Abstract: A manufacturing method of a group III nitride substrate by which a group III nitride substrate being excellent in flatness can be obtained includes the steps of adhering a plurality of the stripe type group III nitride substrates to an abrading holder so that a stripe structure direction is perpendicular to a rotation direction of the abrading holder; and grinding, lapping and/or polishing the-substrates.

Abstract: A method for fabricating nitride semiconductor devices according to the present invention includes the steps of: (A) providing a nitride semiconductor substrate, which will be split into chip substrates, which includes device portions that will function as the respective chip substrates when the substrate is split and interdevice portions that connect the device portions together, and in which the average thickness of the interdevice portions is smaller than the thickness of the device portions; (B) defining a masking layer, which has striped openings over the device portions, on the upper surface of the nitride semiconductor substrate; (C) selectively growing nitride semiconductor layers on portions of the upper surface of the nitride semiconductor substrate, which are exposed through the openings of the masking layer; and (D) cleaving the nitride semiconductor substrate along the interdevice portions of the nitride semiconductor substrate, thereby forming nitride semiconductor devices on the respectively sp

Abstract: Methods to manufacture contaminant-gettering materials in the surface of EUV optics are described herein. An optical element is patterned and a contaminant-gettering material is formed on a surface of the optical element. In one embodiment, a photoresist is deposited on an optical coating on the optical element. Trenches are formed in the optical coating. The gettering agent is formed into the trenches over the photoresist. Next, the photoresist is removed from the optical coating to expose the gettering agent in the trenches. For another embodiment, patches of a nanotube forest having a gettering agent are formed in designated areas of an optical element. The gettering agent of the patches may be a plurality of carbon nanotubes. The optical coating is formed on a substrate between patches of the gettering agent.

Abstract: A fabrication method of an indium tin oxide (ITO) anode containing point nickel for an organic light emitting diode (OLED) to selectively light includes various processes of preparing an ITO substrate with an anode having plural point grooves, of forming a nickel film on the anode, and of grinding the nickel film to leave the point grooves fitted with nickel. Therefore, the nickel spots of the ITO anode are lit up earlier than the pure ITO anode when the OLED is turn on. Because the nickel spots have a lower resistance, current can aggregate in these spots collectively, reducing demerit of cross-talk happening often in a conventional passive OLED panel circuit. The structure of the OLED includes an ITO substrate with an anode provided point grooves deposited with nickel, a hole transport layer on the anode, and an electron transport layer on the hole transport layer.

Abstract: A solid-state imaging device is provided in which noise to an image signal is restrained and miniaturization is facilitated in a peripheral circuit formation region. A solid-state imaging device includes a pixel formation region 4 and a peripheral circuit formation region 20 formed in the same semiconductor substrate; in the peripheral circuit formation region 20 a first element isolation portion is formed of an element isolation layer 21 in which an insulation layer is buried in a semiconductor substrate 10; in the pixel formation region 4 a second element isolation portion made of an element isolation region 11 formed inside the semiconductor substrate 10 and an element isolation layer 12 projecting upward from the semiconductor substrate 10 is formed; and a photoelectric conversion element 16 (14, 15) is formed extending to a position under the element isolation layer 12 of the second element isolation portion.

Abstract: A method of manufacturing a vertical GaN-based LED comprises preparing an n-type GaN substrate; sequentially forming an active layer and a p-type nitride semiconductor layer on the n-type GaN substrate through an epitaxial growth method; forming a p-electrode on the p-type nitride semiconductor layer; wet-etching the lower surface of the n-type GaN substrate so as to reduce the thickness of the n-type GaN substrate; forming a flat n-type bonding pad on the wet-etched lower surface of the n-type GaN substrate, the n-type bonding pad defining an n-electrode formation region; and forming an n-electrode on the n-type bonding pad.

Abstract: A method for making a subsurface electrical contact on a micro-electrical-mechanical-systems (MEMS) device. The contact is formed by depositing a layer of polycrystalline silicon onto a surface within a cavity buried under a device silicon layer. The polycrystalline silicon layer is deposited in the cavity through holes etched through the device silicon and reseals the cavity during the polycrystalline silicon deposition step. The polycrystalline silicon layer can then be masked and etched, or etched back to expose the device layer of the micromachined device. Through the layer of polycrystalline silicon, a center hub of the device may be electrically contacted.

Abstract: The inventive method for manufacturing a semiconductor device is a method for manufacturing a semiconductor device using irradiation with laser light to partition a substrate having semiconductor layers formed thereon, with gallium contained in at least one of the substrate and the semiconductor layers, wherein the method comprises: forming grooves to be used as boundaries between individual substrates by irradiating the substrate along partitioning locations with laser light, immersing the substrate into an acid solution, and partitioning the substrate into individual substrates along the boundaries where grooves are formed. In this manner, it provides a method for manufacturing a semiconductor device in which, during the partitioning of a gallium-containing semiconductor device substrate, deposits of gallium compounds adhered during laser irradiation are removed, partitioning surfaces are formed flat and uniform, and the incidence of electrode continuity failures and resin peeling is low.

Abstract: The present invention is a photosensitized electrode which absorbs sun light to obtain pairs of separated electron and hole. The photosensitized electrode is fabricated with simple procedure and has low cost. The electrode has excellent chemical resistance and is fitted to be applied in a solar cell device with enhanced sun-light absorbing ability. The present invention can be applied in an optoelectronic device or a hydrogen generator device too.

Abstract: A plurality of light-emitting diode light sources of the same kind are produced simultaneously. Each light source includes a light-emitting diode chip and a luminescence conversion element, which converts the wavelength of at least part of an electromagnetic radiation emitted by the light-emitting diode chip. In a first process, a layer composite with a light-emitting diode layer sequence applied to a carrier substrate is provided. The wafer is provided with trenches and then inserted into a cavity of a mold. A molding compound, which contains a luminescence conversion material, is driven in, so that the trenches are at least partly filled with the molding compound. The mold is then removed and the light-emitting diode light sources are separated from the layer composite. In a second process, instead of the layer composite, a plurality of light-emitting diode chips which are applied to a common carrier in a regular arrangement are provided.

Abstract: A semiconductor component having a light-emitting semiconductor layer or a light-emitting semiconductor element, two contact locations and a vertically or horizontally patterned carrier substrate, and a method for producing a semiconductor component are disclosed for the purpose of reducing or compensating for the thermal stresses in the component. The thermal stresses arise as a result of temperature changes during processing and during operation and on account of the different expansion coefficients of the semiconductor and carrier substrate. The carrier substrate is patterned in such a way that the thermal stresses are reduced or compensated for sufficiently to ensure that the component does not fail.

Abstract: A process for producing a cold cathode field emission device. A cathode electrode is formed on a front surface of a support member that transmits exposure light. An insulating layer is formed on an entire surface. A gate electrode is formed on the insulating layer. The support member is irradiated with exposure light from a back surface side of the support member through the hole as a mask for exposure. An electron-emitting-portion-forming-layer composed of a photosensitive material is formed at least inside the opening portion. The support member is irradiated with exposure light from a back surface side of the support member through the hole as a mask for exposure.

Abstract: As shown in FIG. 1(a), substrate 1 having a growth plane having a concavo-convex surface is used. When GaN group crystal is vapor phase grown using this substrate, the concavo-convex shape suppresses growth in the lateral direction and promotes growth in the C axis direction, thereby affording a base surface capable of forming a facet plane. Thus, as shown in FIG. 1(b), a crystal having a facet plane is grown in a convex part, and a crystal is also grown in a concave part. When the crystal growth is continued, the films grown from the convex part and the concave part are joined in time to cover a concavo-convex surface and become flat as shown in FIG. 1(c). In this case, an area having a low a dislocation density is formed in the upper part of the convex part where facet plane was formed, and the prepared film has high quality.

Abstract: A method of forming a semiconductor structure includes forming an isolation region in a semiconductor substrate. A first oxide layer is on the substrate, a first sacrificial layer is on the first oxide layer, and a first nitride layer is on the first sacrificial layer. The first oxide layer may be a screen oxide layer, and the method provides consistency in the thickness of the screen oxide layer.

Abstract: A symmetric optical modulator with low driving voltage, wherein polarization of any one of branched waveguides formed on a substrate is inverted, and the two branched waveguides are simultaneously controlled by a center electrode formed on a top portion thereof, thereby ensuring a low voltage driving and embodying a characteristic of there being no signal distortion due to chirp.

Abstract: In the epitaxial growth process in which each growth region D is zoned by a mask 2 formed in grid pattern, because a consumption region C of the Group III nitride compound semiconductor is formed in the central portion of each band of the mask 2 between each adjacent edge portion of the growth region D, Group III or Group V raw material is never unnecessarily supplied to the edge portion of the growth region D. As a result, difference of Group III or Group V rare material supply amount to the edge portion and central portion of the device formation region D is suppressed and the edge portion of the device region may not be convexity.

Abstract: A method of forming an interlevel dielectric (ILD) layer forms a polymer sacrificial ILD on a substrate. After metallization structures are formed in the polymer sacrificial ILD layer, a low power etch back is performed on the sacrificial ILD layer. Dielectric material is non-conformally deposited as an ILD layer over the substrate and the metallization structures, forming air gaps between some of the metallization structures.

Abstract: To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1-xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.

Abstract: A manufacturing method for wiring substrates for photographing a positioning mark formed with a high precision using reflected light and executing a relative positioning operation between a wiring substrate workpiece and an exposure mask based thereon. The method steps include successively laminating a conductor layer and dielectric layer on a plate-like core and forming a positioning mark by irradiating the main surface of dielectric layer with laser light. By irradiating the positioning mark with position detecting light from the side of the main surface of the dielectric layer and detecting reflected light, relative positioning between the wiring substrate workpiece and the exposure mask is based on the detection result.

Abstract: On a substrate, the pattern of the first conductive layer is defined, that is, a gate line combination including gate pads, scanning lines and gate electrodes. A gate insulating layer, a semiconductor layer, a doped semiconductor layer and a second conductive layer are deposited on the substrate and the above-mentioned gate line combination in sequence. A photoresist layer is overlaid on the second conductive layer. The photoresist layer within the aperture areas is fully exposed. Using a half-tone mask or a slit pattern to make parts of the photoresist layer lying on the gate pads and the gate electrodes are not exposed to its full depth. As a result, the photoresist pattern formed varies in thickness. After being processed with drying etching and wet etching for several times, all the layers previously deposited within the aperture areas can be totally etched and removed.

Abstract: A semiconductor laser device includes a semiconductor substrate on which a semiconductor thin film including an active layer is lamineted, a pair of electrodes respectively provided on opposite faces of the substrate, a light emitting surface defined on a side face of the substrate to which the active layer and an edge of at least one of the electrodes are exposed, and a protective film covering the light emitting surface. The protective film has a smaller thickness on the edge of the electrode than on the active layer. This arrangement makes it possible to suppress diffusion of an electrode material in the protective film and sufficiently protect the light emitting surface.

Abstract: A method for peeling off a thin film semiconductor element over an insulating surface by using a void, and a method for manufacturing a semiconductor device by transferring the peeled semiconductor element. According to the peeling method of the invention, a first base layer having a plurality of recessed portions is formed over a substrate, and a second base layer having a plurality of voids is formed on the recessed portions of the first base layer. On the second base layer, a third base layer is formed and a semiconductor element is formed thereon. Then, by separating the second base layer at an intersecting surface with the voids, the semiconductor element is peeled off from the substrate.

Abstract: There is disclosed a method of producing an SOI wafer in which an SOI layer is formed on a buried oxide film by, at least implanting at least one kind of ion of hydrogen ion and a rare gas ion into the surface portion of a bond wafer to form an ion-implanted layer, bonding the bond wafer and a base wafer to each other through an oxide film, and delaminating the resultant bonded wafer at the ion-implanted layer, wherein assuming that X [nm] represents the thickness of the buried oxide film and Y [nm] represents the thickness of the SOI layer in the SOI wafer immediately after delaminating at the ion-implanted layer, when the thickness X of the buried oxide film is X?100, in forming the ion-implanted layer, the ion implantation is carried out with the ion implantation conditions being set such that the sum X+Y of the thickness of the buried oxide film and the thickness of the SOI layer satisfies X+Y>1500?14X, after which the bonding process and the delaminating process are carried out and, thereafter, a thin

Abstract: In one embodiment, a matrix of free-standing semiconductor shapes are oxidized to form a low capacitance isolation tub. The adjacent rows of shapes in the matrix are offset with respect to each to minimize air gap and void formation during tub formation. In a further embodiment, the spacing between adjacent rows is less than the spacing between shapes within a row.

Abstract: This invention generally relates to semiconductor devices, for example lasers and more particularly to single frequency lasers and is directed at overcoming problems associated with the manufacture of these devices. In particular, a laser device is provided formed on a substrate having a plurality of layers (1,2,3,4,5), the laser device comprising at least one waveguide (for example a ridge) established by the selective removal of sections of at least one of the layers. Wherein alignment features are provided on the device to facilitate subsequent placement.

Abstract: A nitride semiconductor device includes a GaN substrate having a single-crystal GaN layer at least on its surface and plurality of device-forming layers made of nitride semiconductor. The device-forming layer contacting the GaN substrate has a coefficient of thermal expansion smaller than that of GaN, so that a compressive strain is applied to the device-forming layer. This result in prevention of crack forming in the device-forming layers, and a lifetime characteristics of the nitride semiconductor device is improved.

Abstract: A method of fabricating a surface emitting semiconductor laser includes a first step of forming, on a substrate, multiple monitor-use semiconductor layers having stripes radiating from a center of the substrate, and a laser portion that includes semiconductor layers and is located on the periphery of the multiple monitor-use semiconductor layers, a second step of monitoring oxidized conditions on the multiple monitor-use semiconductor layers when a selectively oxidized region is formed in the laser portion, and a third step of controlling oxidization of the selectively oxidized region on the basis of the oxidized conditions thus monitored.

Abstract: A method includes disposing a planarization layer on a surface of a layer of semiconductor material and disposing a lithography layer on a surface of the planarization layer. The method also includes performing nanolithography to remove at least a portion of the planarization layer, at least a portion of the lithography layer and at least a portion of the layer of semiconductor material, thereby forming a dielectric function in the surface of the layer of semiconductor material that varies spatially according to a pattern.

Abstract: The light emitting device includes a p type nitride semiconductor layer, a light emitting layer and an n type nitride semiconductor layer stacked on an Si (silicon) substrate in this order from the side of the Si substrate. The Si substrate is partially removed to expose a part of the p type nitride semiconductor layer. On the exposed region of the p type nitride semiconductor layer, a p type electrode is formed.

Abstract: Concaves and convexes 1a are formed by processing the surface layer of a first layer 1, and second layer 2 having a different refractive index from the first layer is grown while burying the concaves and convexes (or first crystal 10 is grown as concaves and convexes on crystal layer S to be the base of the growth, and second crystal 20 is grown, which has a different refractive index from the first crystal). After forming these concavo-convex refractive index interfaces 1a (10a), an element structure, wherein semiconductor crystal layers containing a light-emitting layer A are laminated, is formed. As a result, the light in the lateral direction, which is generated in the light-emitting layer changes its direction by an influence of the concavo-convex refractive index interface and heads toward the outside.

Abstract: In a wafer having an LD structure 251 formed on a GaN-based substrate 250, cleavage guide grooves 252 are formed in its surface by scribing from above the LD structure 251 with a diamond needle. The cleavage guide grooves 252 are formed one along each of stripe-shaped waveguides 253 formed parallel to the <1-100> direction of the wafer, and are formed in the shape of broken lines in the <11-20> direction of the wafer.

Abstract: A manufacturing method for an optical element includes providing a base member for an optical element and a cutting tool from which a blade tip part protrudes, forming an inspecting groove on a surface of the base member by the blade tip part of the cutting tool by relatively moving the cutting tool and the base member while the cutting tool is rotated and inspecting an inclination of a cut surface of the inspection groove formed by the cutting tool to form an inspection result. The method also includes correcting an angle defined by the base member and the blade tip part of the cutting tool based on the inspection result and forming formal grooves on the surface of the base member having the inspection groove by the blade tip part of the cutting tool by relatively moving the cutting tool and the base member while the cutting tool is rotated simultaneously with the inspection groove being cut out.

Abstract: A depression is formed from a first surface of a semiconductor substrate. An insulating layer is provided on the bottom surface and an inner wall surface of the depression. A conductive portion is provided inside the insulating layer. A second surface of the semiconductor substrate is etched by a first etchant having characteristics such that the etching amount with respect to the semiconductor substrate is greater than the etching amount with respect to the insulating layer, and the conductive portion is caused to project while covered by the insulating layer. At least a portion of the insulating layer formed on the bottom surface of the depression is etched with a second etchant having characteristics such that at least the insulating layer is etched without forming a residue on the conductive portion, to expose the conductive portion.

Abstract: An optoelectronic semiconductor chip has an active layer containing a photon-emitting zone. The active layer is attached to a carrier member at a bonding side of the active layer. The active layer has at least one recess therein with a cross-sectional area that decreases with increasing depth into said active layer proceeding from said bonding side.

Abstract: A method of forming a light emitting diode includes forming a transparent substrate and a GaN buffer layer on the transparent substrate. An n-GaN layer is formed on the buffer layer. An active layer is formed on the n-GaN layer. A p-GaN layer is formed on the active layer. A p-electrode is formed on the p-GaN layer and an n-electrode is formed on the n-GaN layer. A reflective layer is formed on a second side of the transparent substrate. A scribe line is formed on the substrate for separating the diodes on the substrate. Also, a cladding layer of AlGaN is between the p-GaN layer and the active layer.