Abstract: An optoelectronic chip having a semiconductor body (14), which contains a radiation-emitting region (2), and a partial region (3) in which the surface (13) of the semiconductor body (14) is curved convexly toward a carrier (10). The lateral extent (2r) of the radiation-emitting region (2) is less than the lateral extent (2R) of the partial region (3). A method for producing such a chip is also described.

Abstract: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1?x?yN (0?x?1, 0?y?1, 0<x+y?1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and make closed defect accumulating regions (H) under the facet bottoms. The closed defect accumulating regions (H) arrest dislocations permanently. Release of dislocations, radial planar defect assemblies and linear defect assemblies are forbidden. The surrounding accompanying low dislocation single crystal regions (Z) and extra low dislocation single crystal regions (Y) are low dislocation density single crystals.

Abstract: A manufacturing method for a semiconductor device formed in a device region composed of a plurality of semiconductor layers on a substrate, the method including a trench forming step of forming a trench on the substrate around the device region and a semiconductor growth step of growing the semiconductor layer in the device region.

Abstract: A multibeam semiconductor laser diode having: an n-type semiconductor substrate; an n-type clad layer, an active layer, a p-type clad layer and a contact layer; a plurality of partitioning grooves extending from one end to the other end of the substrate and formed from the contact layer to a predetermined depth of the p-type clad layer; a stripe-shaped ridge sandwiched between two separation grooves; an insulating layer covering an area from each side wall of the contact layer of each ridge to an end of the partitioning region via the separation groove; a first electrode formed on a second plane of the substrate; and a second electrode formed in each partitioning region covering an area above the ridge, separation grooves and multilayer semiconductor layers outside the separation grooves, the second electrode being constituted of a lower second electrode layer and an upper second plated layer.

Abstract: Waveguide(s) (130) including at least partially buried channels) (120) within substrate(s) (100) having at least one substantially planar surface (110) are disclosed. According to some embodiments at least part of the channel (120) is located beneath at least a portion of the substrate (100). According to some embodiments the waveguide channel (120) includes a substantially transparent core (140) and optional cladding (160) extending through the channel (120). Alternately, an inner surface of the channel (120) is highly reflective. Furthermore, structures for use as waveguides (130) and/or as microchannels for fluid flow are disclosed herein. Also disclosed are production methods for such waveguides and said structures (130) and said structures, and methods of using such waveguides (130).

Abstract: There is provided a method of fabricating a vertical light emitting diode.

Abstract: An organic light emitting diode (OLED) display apparatus, including a substrate, at least one thin film transistor (TFT) on the substrate, an insulating layer covering the at least one TFT and having a via hole and a groove, a first electrode on the insulating layer and electrically connected to the at least one TFT through the via hole, a pixel define layer on the first electrode and the groove, the pixel define layer having an opening that exposes the first electrode; an intermediate layer electrically connected to the first electrode through the opening, the intermediate layer including an organic emissive layer, and a second electrode on the intermediate layer. The organic emissive layer may be easily formed in the opening because a step between the organic emissive layer and the pixel define layer may be reduced as a portion of pixel define layer fills the groove.

Abstract: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; fabricating a patterned spacing layer on the flexible substrate; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate.

Abstract: A semiconductor device includes a substrate comprising a first surface having a first orientation and a second surface having a second orientation and a plurality of III-V compound layers on the substrate, wherein the plurality of III-V compound layers are configured to emit light when an electric current is produced in one or more of the plurality of III-V compound layers.

Abstract: A method for manufacturing a semiconductor optical device comprises: forming a groove on a first semiconductor layer; forming a second semiconductor layer containing aluminum in the groove; forming a third semiconductor layer on the first semiconductor layer and the second semiconductor layer; forming an insulating layer on the third semiconductor layer covering the region opposite the second semiconductor layer; forming a stripe-shaped structure by etching the first semiconductor layer and the third semiconductor layer without exposing the second semiconductor layer, using the insulating layer as a mask; and burying the stripe-shaped structure with burying layers.

Abstract: A method of fabricating a solar cell forms a large number of grooves on a first main surface of a p-type silicon single crystal substrate sliced out from a silicon single crystal ingot as described below. First an edge portion of a groove-carving blade is projected out from a flat substrate feeding surface of a working table by a predetermined height. The p-type silicon single crystal substrate is moved along the substrate feeding surface towards the rotating groove-carving blade while keeping a close contact of the first main surface thereof with the substrate feeding surface. Electrodes are then formed on the inner side face of thus-carved grooves only on one side in the width-wise direction thereof.

Abstract: A method for manufacturing a nitride semiconductor laser element having a nitride semiconductor layer including at least an active layer provided on a substrate, a pair of cavity planes formed on the nitride semiconductor layer, and a protruding part where part of the substrate protrudes from said cavity plane, said method comprises: a step of forming the nitride semiconductor layer on the substrate; a first etching step of forming a first groove by etching at least the nitride semiconductor layer; and a second etching step of forming the cavity plane, in the second etching step, the inner wall of the first groove and part of the nitride semiconductor layer surface adjacent to the first groove are etched to form a second groove, and form the upper face of the protruding part.

Abstract: A semiconductor light emitting element including a conductive substrate, a bonding metal layer formed on the conductive substrate, a barrier layer formed on the bonding metal layer, a reflective layer formed on the barrier layer, an ohmic electrode layer formed on the reflective layer, a second conductivity type semiconductor layer formed on the ohmic electrode layer, a light emitting layer formed on the second conductivity type semiconductor layer, and a first conductivity type semiconductor layer formed on the light emitting layer, wherein outer peripheries of the second conductivity type semiconductor layer, the light emitting layer, and the first conductivity type semiconductor layer are removed, and a method of manufacturing the same are provided.

Abstract: Light emitting devices include an active region comprising a plurality of layers and a pit opening region on which the active region is disposed. The pit opening region is configured to expand a size of openings of a plurality of pits to a size sufficient for the plurality of layers of the active region to extend into the pits. In some embodiments, the active region comprises a plurality of quantum wells. The pit opening region may comprise a superlattice structure. The pits may surround their corresponding dislocations and the plurality of layers may extend to the respective dislocations. At least one of the pits of the plurality of pits may originate in a layer disposed between the pit opening layer and a substrate on which the pit opening layer is provided. The active region may be a Group III nitride based active region. Methods of fabricating such devices are also provided.

Abstract: A diaphragm assembly used for a condenser microphone has a diaphragm made of a resin film including a metallized film on one surface of a supporter ring. The diaphragm is made by a first step of bonding a ring jig of a larger diameter than the supporter ring to the resin film having the metallized film composed of a ductile metallic material on the one surface via an adhesive without exerting tension on the resin film; a second step of heating and contracting the resin film bonded to the ring jig without applying the tension at a temperature over a glass transition point of a film material; and a third step of bonding the supporter ring to the resin film via an adhesive in a state of exerting predetermined tension on the resin film. The diaphragm assembly is cut out of the resin film after the adhesive becomes hardened.

Abstract: A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a single type of metal and a single type of inorganic material having a lower linear expansion coefficient than the metal and a nitride-based semiconductor element layer bonded to the conductive substrate.

Abstract: A monolithic semiconductor laser having plural semiconductor lasers having different emission wavelengths from each other, including: a semiconductor substrate; a first double hetero-structure formed within a first area on the semiconductor substrate and having first clad layers disposed above and below a first active layer; and a second double hetero-structure formed within a second area on the semiconductor substrate and having second clad layers disposed above and below a second active layer. The first and second active layers are made of different semiconductor materials from each other. The first clad layers above and below the first active layer are of approximately the same semiconductor materials and the second clad layers above and below the second active layer are of approximately the same semiconductor materials.

Abstract: A method of forming an air gap within a semiconductor structure by the steps of: (a) using a sacrificial polymer to occupy a space in a semiconductor structure; and (b) heating the semiconductor structure to decompose the sacrificial polymer leaving an air gap within the semiconductor structure, wherein the sacrificial polymer of step (a) is: (a) a copolymer of 5-ethylidene-2-norbornene and vinylbenzocyclobutene (or a vinylbenzocyclobutene derivative); or (b) a copolymer of 5-ethylidene-2-norbornene and 5-(3benzocyclobutylidene)-2-norbornene; or (c) a polymer of 5-(3benzocyclobutylidene)-2-norbornene. In addition, a semiconductor structure, having a sacrificial polymer positioned between conductor lines, wherein the sacrificial polymer is: (a) a copolymer of 5-ethylidene-2-norbornene and vinylbenzocyclobutene (or a vinylbenzocyclobutene derivative); or (b) a copolymer of 5-ethylidene-2-norbornene and 5-(3benzocyclobutylidene)-2-norbornene; or (c) a polymer of 5-(3benzocyclobutylidene)-2-norbornene.

Abstract: A method of packaging a first device having a first major surface and a second major surface includes forming a first layer over a second major surface of the first device and around sides of the first device and leaving the first major surface of the first device exposed, wherein the first layer is selected from the group consisting of an encapsulant and a polymer; forming a first dielectric layer over the first major surface of the first device, forming a via in the first dielectric layer, forming a seed layer within the via and over a portion of the first dielectric layer, physically coupling a connector to the seed layer, and plating a conductive material over the seed layer to form a first interconnect in the first via and over a portion of the first dielectric layer.

Abstract: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

Abstract: A micro device and manufacturing method thereof. The micro device includes a substrate, an insulation layer, and a solution. The insulation layer is disposed on the substrate to define a channel portion and an extension portion communicated with the channel portion. The solution is location in the channel portion. Part of the solution flows to the extension portion by capillary force between the channel portion and the extension portion.

Abstract: A nitride semiconductor laser device has a nitride semiconductor substrate that includes a dislocation-concentrated region 102 and a wide low-dislocation region and that has the top surface thereof slanted at an angle in the range of 0.3° to 0.7° relative to the C plane and a nitride semiconductor layer laid on top thereof. The nitride semiconductor layer has a depression immediately above the dislocation-concentrated region, and has, in a region thereof other than the depression, a high-quality quantum well active layer with good flatness and without cracks, a layer that, as is grown, readily exhibits p-type conductivity, and a stripe-shaped laser light waveguide region. The laser light waveguide region is formed above the low-dislocation region. This helps realize a nitride semiconductor laser device that offers a longer life.

Abstract: A method of fabricating a substrate includes following steps. First, a metallic panel having a first surface and a second surface is provided. A first half-etching process is carried out to etch the first surface of the metallic panel to a first depth so that a first patterned metallic layer is formed on the first surface. Next, a first insulating material is deposited into gaps in the first patterned metallic layer to form a first insulator. Thereafter, a second half-etching process is carried out to etch the second surface of the metallic panel to a second depth and expose at least a portion of the first insulator so that a second patterned metallic layer is formed on the second surface. The first depth and the second depth together equal the thickness of the metallic panel.

Abstract: In a method for fabricating a nitride-based compound layer, first, a GaN substrate is prepared. A mask layer with a predetermined pattern is formed on the GaN substrate to expose a partial area of the GaN substrate. Then a buffer layer is formed on the partially exposed GaN substrate. The buffer layer is made of a material having a 10% or less lattice mismatch with GaN. Thereafter, the nitride-based compound is grown laterally from a top surface of the buffer layer toward a top surface of the mask layer and the nitride-based compound layer is vertically grown to a predetermined thickness. Also, the mask layer and the buffer layer are removed via wet-etching to separate the nitride-based compound layer from the GaN substrate.

Abstract: The present invention relates to a method for separating at least one non-emission region (16) from at least one emission region (15) within an organic light emitting diode (OLED) (1), which comprises a substrate material (10) as a carrier, whereas the substrate material (10) is coated and/or superimposed by at least one anode layer (11) and at least one cathode layer (13), whereas at least one functional layer (12) is sandwiched in between the layers (11, 13) for emitting light, whereas impressing a voltage in between the anode layer (11) and the cathode layer (13) causes an emission of light within the emission region (15), and whereas the separating of the one non-emission region (16) is caused by scribing a groove (14) into at least the anode and/or the cathode layer (11, 13), in order to insulate the electrical current within at least one layer (11, 13) from the emission region (15) into the non-emission region (16), whereas the groove (14) is performed by mechanical scribing, applying a scribing tool (1

Abstract: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

Abstract: Provided are a nitride semiconductor laser chip with a reliability improved by relieving stress due to strain within the nitride semiconductor laser chip, a manufacturing method thereof, and a nitride semiconductor laser device. The nitride semiconductor laser chip comprises: a substrate; and a laminated structure provided on a main surface of the substrate and including a nitride semiconductor layer. In the laminated structure, at least one crack parallel to a resonator end face is formed. By forming a crack within a laser chip, stress due to strain is relieved; therefore, it is possible to obtain a laser chip having a high reliability.

Abstract: Provided are a semiconductor light emitting device having a nano pattern and a method of manufacturing the semiconductor light emitting device. The semiconductor light emitting device includes: a semiconductor layer comprising a plurality of nano patterns, wherein the plurality of nano patterns are formed inside the semiconductor layer; and an active layer formed on the semiconductor layer. The optical output efficiency is increased and inner defects of the semiconductor light emitting device are reduced.

Abstract: A light emitting element is provided with a semiconductor layer having a light emitting layer and an uneven surface, and a transparent material formed on the uneven surface. The transparent material has a refractive index lower than a sapphire substrate. Alternatively, a light emitting element is provided with a semiconductor layer including a light emitting layer, and a transparent high-refractive index material layer formed on a light radiation surface of the semiconductor layer. The light emitting element is of a flip-chip type, and the transparent high-refractive index material layer has a refractive index of n=1.6 or more.

Abstract: A method for manufacturing a semiconductor laser device includes forming a laminate having a semiconductor layer of a first conductivity type, an active layer and a semiconductor layer of a second conductivity type. The waveguide region is formed to guide light perpendicular to the direction of width by restricting the light from spreading in the direction of width in the active layer, such that the semiconductor laser device has a first waveguide region and a second waveguide region. The first waveguide region is formed to confine light within the limited active layer by means of a difference in the refractive index between the active layer and the regions on both sides of the active layer by limiting the width of the active layer. In forming the second waveguide region, light is confined therein by providing effective difference in refractive index in the active layer.

Abstract: Provided is a method of manufacturing a nitride-based semiconductor light-emitting device having an improved structure in which optical extraction efficiency is improved. The method of manufacturing a nitride-based semiconductor light-emitting device including an n-doped semiconductor layer, an active layer, a p-doped semiconductor layer, an n-electrode and a p-electrode includes: forming an azobenzene-functionalized polymer film on a base layer by selecting one layer from the group consisting of the n-doped semiconductor layer, the p-doped semiconductor layer, the n-electrode and the p-electrode as the base layer; forming surface relief gratings of a micro-pattern caused by a photophysical mass transport property of azobenzene-functionalized polymer by irradiating interference laser beams onto the azobenzene-functionalized polymer film; forming a photonic crystal layer using a metal oxide on a recessed gap of the azobenzene-functionalized polymer film, and removing the azobenzene-functionalized polymer film.

Abstract: A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.

Abstract: The present invention relates to a method for manufacturing a flat panel display. Herein, the same mask is used to form contact holes and pixel electrodes in the display substrate. Hence, the number of masks needed for manufacturing the flat panel display can be reduced to decrease the manufacturing cost.

Abstract: This invention provides a method for eliminating the surface stress of a silicon wafer comprising forming one or more anti-stress groove(s) on the surface of the silicon wafer. These anti-stress grooves can reduce or eliminate the surface stress of silicon wafer effectively to avoid the formation of slip lines and dislocation arrangements, which may induce the p-n junction to conduct or the leakage current to increase. The process is highly efficient and low in cost. It is simple to manage and does not require additional equipment beyond that already used for processing of silicon wafers.

Abstract: Provided are: a light emitting module capable of ensuring a high heat-dissipating property and mountable in any of sets in various shapes; and a method for manufacturing the light emitting module. The light emitting module mainly includes: a metal substrate; an insulating layer covering the upper surface of the metal substrate; a conductive pattern formed on the upper surface of the insulating layer; and a light emitting element fixedly attached to the upper surface of the metal substrate and electrically connected to the conductive pattern. Furthermore, a groove is formed in the metal substrate, and then the metal substrate is bent. Thus, a bent portion is formed in the metal substrate.

Abstract: A method of manufacturing an organic light emitting display device and the organic light emitting display device which reduces generation of dark spots by particles are disclosed.

Abstract: A semiconductor layer is provided on a surface of a sapphire substrate, the sapphire substrate having smooth surfaces. A support substrate is mounted on an electrode formation surface of the semiconductor layer. A surface portion of the semiconductor layer is melted, and the sapphire substrate is separated from the semiconductor layer at an interface between the sapphire substrate and the semiconductor layer, thereby exposing the semiconductor layer. While the surface portion of the exposed semiconductor layer is melted, the holding substrate with projections/depressions or stripe grooves is pressed against the surface portion of the semiconductor layer, so that the projections/depressions or stripe grooves formed in the holding substrate are transferred onto the surface portion of the semiconductor layer. The support substrate is separated from the semiconductor layer at an interface between the semiconductor layer and the support substrate.

Abstract: A method for electrochemical etching of a semiconductor material using positive potential dissolution (PPD) in solutions that do not contain hydrofluoric acid (HF-free solutions). The method includes immersing an as-cut semiconductor material in an etching solution, and positive biasing at atypically highly positive (anodic) potentials, thereby significantly increasing the value of the anodic current density (measured as A/cm2) of the semiconductor material. The application of positive biasing at atypically highly positive (anodic) potentials, is combined with specifically controlling and directing illumination on the semiconductor material surface contacted and wetted by the etching solution. This is done for a necessary and sufficient period of time to enable a positive synergistic effect on the rate and extent of etching of the semiconductor material therefrom.

Abstract: A method and structure for an improved shallow trench isolation (STI) structure for a semiconductor device. The STI structure incorporates an oxynitride top layer of the STI fill. Optionally, the STI structure incorporates an oxynitride margin of the STI fill adjacent the silicon trench walls. A region of the oxynitride margin near the upper edges of the silicon trench walls includes oxynitride corners that are relatively thicker and contain a higher concentration of nitrogen as compared to the other regions of the oxynitride margin. The oxynitride features limit the STI fill height loss and also reduce the formation of divots in the STI fill below the level of the silicon substrate cause by hydrofluoric acid etching and other fabrication processes. Limiting STI fill height loss and the formation of divots improves the functions of the STI structure.

Abstract: A fabricating method of a flat panel display device according to the present invention includes providing a thin film on a substrate; providing a soft mold having a groove and a projection on the thin film; contacting the projection of the soft mold and the thin film; and spreading a hydrophilic polymer resin on the thin film to pattern the thin film.

Abstract: Favorable-quality III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates. The III-V crystals are obtained by manufacturing method characterized in including: a step of depositing a metal film (2) on a substrate (1); a step of heat-treating the metal film (2) in an atmosphere in which a patterning compound is present; and a step of growing a group III-V crystal (4) on the metal film after the heat treatment. Alternatively, the III-V crystal manufacturing method is characterized in including: a step of growing a group III-V compound buffer film on the metal film after the heat treatment; and a step of growing a group III-V crystal on the group III-V compound buffer film.

Abstract: A light-emitting device is based on a gallium nitride-based compound semiconductor. A light-emitting layer with a first and a second main surface is formed from a compound semiconductor based on gallium nitride. A first coating layer, which is joined to the first main surface of the light-emitting layer, is formed from an n-type compound semiconductor based on gallium nitride. The composition of which differs from that of the compound semiconductor of the light-emitting layer. A second coating layer, which is joined to the second main surface of the light-emitting layer, is formed from a p-type compound semiconductor based on gallium nitride, the composition of which differs from that of the compound semiconductor of the light-emitting layer. To improve the light yield of the device, the thickness of the light-emitting layer in the vicinity of dislocations is configured to be lower than in the remaining regions.

Abstract: A method of manufacturing an electro-optical device, which, on a substrate, has a plurality of data lines, a plurality of scanning lines, a plurality of driving elements formed to correspond to intersections of the plurality of data lines and the plurality of scanning lines for pixels, and a plurality of pixel electrodes provided to correspond to the driving elements, includes forming an etching stopping layer, forming a common line that is provided above the etching stopping layer to short-circuit the plurality of scanning lines and the plurality of scanning lines, forming a first interlayer insulating film that isolates the plurality of data lines and the plurality of pixel electrodes from the plurality of scanning lines and the plurality of driving elements, forming contact holes that electrically connect the plurality of data lines and the plurality of pixel electrodes to the plurality of driving elements, forming the plurality of data lines, and forming a cutting hole in the first interlayer insulating f

Abstract: A method for making a diaphragm unit of a condenser microphone includes the steps of: forming a liftoff layer on a substrate; forming an insulator diaphragm film on the liftoff layer; and removing the liftoff layer from the diaphragm film and the substrate so as to separate the diaphragm film from the substrate.

Abstract: There is described a method for producing a packaged integrated circuit. The method comprises a first step of building an integrated circuit having a micro-structure suspended above a micro-cavity, and having a heating element on the micro-structure capable of heating itself and its immediate surroundings. A layer of protective material is then deposited on said micro-structure such that at least a top surface of the micro-structure and an opening of the micro-cavity is covered, wherein the protective material is in a solid state at room temperature and can protect the micro-structure during silicon wafer dicing procedures and subsequent packaging. The integrated circuit is packaged and an electric current is passed through the heating element such that a portion of the protective material is removed and an unobstructed volume is provided above and below the micro-structure.

Abstract: By incorporating an etch control material after the formation of a material layer to be patterned, an appropriate material having a highly distinctive radiation wavelength may be used for generating a distinctive endpoint detection signal during an etch process. Advantageously, the material may be incorporated by ion implantation which provides reduced non-uniformity compared to etch non-uniformities, while the implantation process provides the potential for introducing even very “exotic” implantation species. In some embodiments, the substrate-to-substrate uniformity of the patterning of dual damascene structures may be increased.

Abstract: The flatness of the surface of the light-receiving portion must be increased when the upper structural layer of a light detector is etched. The present invention provides a method for manufacturing an integrated circuit in which an aperture is formed in a stack in which an underlayer, a light-receiving area pad, and an upper structural layer are layered on a substrate, the method comprising a light-receiving area pad etching step for etching the structural layer and the light-receiving area pad under etching conditions in which a high selectivity ratio is maintained between the upper structural layer and the light-receiving area pad; and an underlayer etching step for switching to etching conditions in which the light-receiving area pad has a high selectivity ratio in relation to the underlayer following the light-receiving area pad etching step, and etching the light-receiving area pad and the underlayer.

Abstract: An electroluminescence display device including a substrate, a corrugated structure formed on the substrate, wherein the corrugated structure disperses light through diffraction and reflection; and a first electrode layer, a first insulation layer, a fluorescent layer, a second insulation layer, and a second electrode layer sequentially formed on the substrate to follow the shape of the corrugated structure.

Abstract: A solar cell production system utilizes self-contained vacuum chucks that hold and cool solar cell wafers during transport on a conveyor between processing stations during a fabrication process. Each self-contained vacuum chuck includes its own local vacuum pump and a closed-loop cooling system. After each wafer is processed, it is removed from its vacuum chuck, and the vacuum chuck is returned to the start of the production line by a second conveyor belt. In one embodiment, each vacuum chuck includes an inductive power supply that is inductively coupled to an external source to drive that vacuum chuck's vacuum pump and cooling system. An optional battery is recharged by the inductive power supply, and is used to power the vacuum pump and cooling system during hand-off between adjacent processing stations.

Abstract: A trench-gated field effect transistor (FET) is formed as follows. Using one mask, a plurality of active gate trenches and at least one gate runner trench are defined and simultaneously formed in a silicon region such that (i) the at least one gate runner trench has a width greater than a width of each of the plurality of active gate trenches, and (ii) the plurality of active gate trenches are contiguous with the at least one gate runner trench.