Abstract: A method of manufacturing a semiconductor device, which can effectively form a trench having a high aspect ratio with relatively simple steps. An initial trench is formed in a silicon substrate by a reactive ion etching using an oxide film mask as an etching mask. After forming a protection oxide film on an inside surface of the trench, a part of the protection oxide film at which positions at a bottom surface of the trench is removed by a reactive ion etching, so that an etching of the silicon substrate is advanced through the bottom surface of the trench. Furthermore, the step for forming the protection oxide film and the step for re-etching the bottom surface of the trench are repeatedly performed, so that a depth of the trench becomes a predetermined depth. These steps are performed in a common chamber by using plasma processed with switching gases to be introduced to the chamber.

Abstract: In one aspect, the invention includes an isolation region forming method comprising: a) forming an oxide layer over a substrate; b) forming a nitride layer over the oxide layer, the nitride layer and oxide layer having a pattern of openings extending therethrough to expose portions of the underlying substrate; c) etching the exposed portions of the underlying substrate to form openings extending into the substrate; d) after etching the exposed portions of the underlying substrate, removing portions of the nitride layer while leaving some of the nitride layer remaining over the substrate; and e) after removing portions of the nitride layer, forming oxide within the openings in the substrate, the oxide within the openings forming at least portions of isolation regions.

Abstract: A fabrication method of a device isolation structure. A patterned mask layer is formed on a silicon substrate. A dopant is doped into an exposed substrate to prevent a bird's beak silicon region from being oxidized in a first doping step. A spacer is formed on the sidewall of the mask layer. Portions of the silicon substrate are removed to form a trench by using the mask layer and the spacer as a mask. A second dopant is doped into the exposed silicon substrate on the bottom of the trench to benefit the oxidation of a desired field oxide region in a second doping step. A field oxide layer is formed to fill the trench in a field oxide process.

Abstract: A method of removing a polysilicon buffer in a method of forming a field oxide and an active area is disclosed herein that comprises the step of applying an etching selectivity solution to the polysilicon buffer to substantially remove the polysilicon buffer without substantially affecting the field oxide, a pad oxide, and the substrate. An etching selectivity solution is defined herein is a solution that has an etching rate for one material that is higher than for another material. In this case, the etching selectivity solution has an etching rate for polysilicon material that is higher than its etching rate for field oxide material. Accordingly, when the etching selectivity solution is applied to the polysilicon buffer, it will substantially etch off the polysilicon buffer without substantially affecting the field oxide. In the preferred embodiment, the etching selectivity solution comprises a mixture of HF and HNO3, or HF, HNO3 and CH3COOH.

Abstract: A semiconductor fabrication method is provided for the fabrication of an isolation structure including a shallow-trench isolation (STI) structure in an integrated circuit. This method is characterized by the increase in the thickness of the adhesive layer over that of the prior art and also in the use of thermal oxidation process to form the STI structure. The thick adhesive layer can thus resist the stress from thermal expansion of the various component layers in the integrated circuit during heat treatment. Moreover, the resulting STI structure is not formed with recessed edge portions since the hydrofluoric (HF) etchant acts on the silicon dioxide plug in the STI structure with substantially the same etching rate as on the adhesive layer. Moreover, this method includes no chemical-mechanical polish (CMP) process, so the problem of scratches on the surface of the silicon dioxide plug as seen in the case of the prior art is avoided.

Abstract: A method of forming a field oxide isolation region includes: forming a first pad oxide layer over a semiconductor substrate; forming a silicon nitride layer over the first pad oxide layer; patterning and etching the silicon nitride layer and the first pad oxide layer to expose a portion of the substrate, and simultaneously forming an undercut cavity; forming a second pad oxide layer over the exposed portion of the substrate; depositing a layer of polysilicon over the second pad oxide layer, the polysilicon layer filling the undercut cavity to form a polysilicon plug; removing portions of the polysilicon layer to form a polysilicon spacer; thermally oxidizing the substrate to substantially consume the polysilicon spacer but leave a polysilicon residual of the polysilicon plug, the thermal oxidation forming a thick oxide above the exposed portion of the substrate; substantially removing the silicon nitride layer; applying a first etching solution to the first pad oxide layer and the polysilicon residual, the fi

Abstract: Methodology for achieving dual field oxide thicknesses comprises forming field oxide isolation regions to a common thickness. An oxidation barrier layer, which may comprise nitride or oxynitride, is formed on selected field oxide regions leaving others exposed. The exposed field oxide regions are enlarged in a complementary thermal oxidation step, wherein the isolation regions covered by the oxidation barrier layer are not enlarged, thereby achieving field oxide regions of at least two thicknesses.

Abstract: The present invention provides an SOI device and its isolation method capable of solving both Well-resistance and punch-through problems. To realize foregoing device, there is provided a semiconductor layer that a region in which a field oxide film having relatively wider width is formed later, is thicker than a region in which a field oxide film having relatively narrower width is formed later. Those field oxide films having different widths with an equal thickness are formed on the field regions of the semiconductor layer. Herein, the thickness of the semiconductor layer below the field oxide film having relatively wider width is thicker than the thickness of the semiconductor layer below the field oxide film having relatively narrower width owing to the fact that the semiconductor layer has various thicknesses according to the respective regions.

Abstract: The present invention provides a method of forming an isolation region comprising a trench isolation region involved in a semiconductor device. A silicon oxide film is grown on a surface of a trench groove formed within a semiconductor substrate, followed by a deposition of a nitride film material. An oxide film is formed on the silicon oxide film of the wide trench groove region. The nitride film within the trench groove region, so as to form a device isolation film is etched, sequentially, a oxide film is deposited on the entire exposed surface of the trench region, and the oxide film except within the trench groove, is etched by using chemical mechanical polishing (CMP).

Abstract: Ingredient gas is first supplied into a reacting section disposed in an apparatus for chemical vapor deposition. Subsequently, a silicon film is deposited on a wafer under a condition that temperature at the upstream side of a direction of the ingredient gas flow inside the reacting section is higher than that at the downstream side thereof.

Abstract: A method for forming a semiconductor device comprises the steps of providing a semiconductor substrate having first and second surfaces, the second surface having an inferior plane with respect to the first surface. An oxidizing-resistant layer such as nitride is formed on the first surface, and an oxidizable material is formed over the first and second surfaces. A protective material is formed over the first and second surfaces, which is then removed from the first surface. Subsequent to the step of removing the protective material from the first surface, the oxidizable material is removed from the first surface and is left over the second surface. Subsequent to the step of removing the oxidizable material from the first surface, the protective material is removed from the second surface and the oxidizable material remains over the second surface. Subsequent to removing the protective material from the second surface, the oxidizable material on the second surface is oxidized.

Abstract: A semiconductor device and a method of fabricating the same are disclosed. The method includes the steps of forming an anti-oxidation layer on a substrate, forming an oxidizable layer on portions of the anti-oxidation layer to expose a portion of the anti-oxidation layer, varying a size of the exposed portion of the anti-oxidation layer by oxidizing at least a portion of the oxidizable layer, and forming a trench in the substrate according to the size of the exposed portion of the anti-oxidation layer. The semiconductor device includes an anti-oxidation layer formed on a substrate an oxidation layer formed on portions of the anti-oxidation layer by oxidizing at least a portion of an oxidizable layer, so as to define an isolation region of the semiconductor device, a trench formed in the substrate using the oxidation layer, and a field oxide layer formed in the trench.

Abstract: A thin silicon epitaxial layer, formed on a silicon substrate, is subdivided into electrically isolated pockets by a grid of oxidized regions of epitaxial silicon material which extend through the epitaxial layer to a laterally extending PN junction.

Abstract: An isolation method in the fabrication process of a semiconductor device is provided. The method forms an oxide layer as a buffer layer for reducing stress through chemical vapor deposition (CVD). By the method, a first pad oxide layer and a silicon nitride layer are formed on a semiconductor substrate, and then an silicon nitride layer pattern is formed by patterning, and undercuts are formed in the first pad oxide layer pattern. Subsequently, a second pad oxide layer is formed on the entire surface of the semiconductor substrate through CVD, and then spacers are formed on the sidewalls of both the patterned first pad oxide layer and silicon nitride layer and a field oxide layer is formed through thermal oxidation. Alternatively, a silicon layer is deposited without the spacers to form the field oxide layer. The second pad oxide layer is a buffer layer for buffering stress during formation of the field oxide layer.

Abstract: An integrated semiconductor device includes a substrate having a buried shallow trench isolation structure and an epitaxial layer disposed over the substrate and the buried shallow trench isolation structure. The epitaxial layer includes a shallow trench isolation structure that extends over the buried shallow trench isolation structure in the substrate to substantially reduce leakage current in the substrate to prevent device latch-up.

Abstract: A method of forming a trench power metal-oxide semiconductor (MOS) transistor over a semiconductor substrate is proposed in the present invention. First, a pad oxide layer is formed on said substrate, a masking layer is then formed on the pad oxide layer. Next, the masking layer and the pad oxide layer are defined the trench pattern, and the substrate is etched to form the trench structure. A gate oxide layer is formed on the outer surface of the trench structure. Then, a conducting layer is fill into said trench structure for serving as a gate structure. The doped areas are formed in the substrate to serve as source structures. Next, the sidewall spacers are formed on sidewalls of the masking layer and the pad oxide layer. A field oxide layer is then formed on the conducting layer.

Abstract: There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that t.sub.G represents a thickness of a gate electrode layer 6, a height t.sub.U to an upper surface of a thickest portion of element isolating oxide film 4 from an upper surface of a gate insulating film 5 and an acute angle .theta.i defined between the upper surfaces of element isolating oxide film 4 and gate insulating film are set within ranges expressed by the formula of {.theta.i, t.sub.U .linevert split.0.ltoreq..theta.i.ltoreq.56.6.degree., 0.ltoreq.t.sub.U .ltoreq.0.82t.sub.G }. Thereby, an unetched portion does not remain at an etching step for patterning the gate electrode layer to be formed later. This prevents short-circuit of the gate electrode. Since the element isolating oxide film has the improved flatness, a quantity of overetching in an active region can be reduced at a step of patterning the gate electrode.

Abstract: A method for forming a field oxide film of a highly integrated semiconductor device, in which an annealing step is carried out during a field oxide film formation step for growing the field oxide film adapted to isolate elements of the semiconductor device. By the annealing step, it is possible to prevent a stress concentration phenomenon from occurring in a semiconductor substrate on which the field oxide film is formed, thereby reducing or eliminating a field oxide thinning phenomenon.

Abstract: A method of forming isolation region of an integrated circuit by using rough oxide mask is described. First, a layer of first dielectric is formed on the surface of a silicon substrate. The first dielectric layer is then patterned to define active device region and isolation region. Next, a very thin layer of silicon dioxide is formed over the silicon substrate surface, followed by depositing a layer of rough oxide with proper grain size overlaying the silicon dioxide layer. By using rough oxide grains as an etching mask, the silicon dioxide layer and the silicon substrate underneath are spontaneously etched to form multiple trenches in the isolation region. Next, the rough oxide grains and silicon dioxide layers are stripped. Then, filed oxidation is performed to complete the field oxide isolation formation.

Abstract: A process for forming a semiconductor integrated circuit with a core area densely populated with active devices and with a periphery area less densely populated with active devices as compared to the core area, comprising the steps of: forming a first layer of first insulator material above a semiconductor substrate having a core area and a periphery area, wherein the first insulator material constitutes a polish stop for polishing processes and also as an oxidation barrier; patterning the first layer of first insulator material to expose first portions of the semiconductor substrate substantially only in the core area while using the first insulator material to substantially mask the periphery area; forming a plurality of trenches into the exposed first portions of semiconductor substrate in the core area; filling the plurality of trenches with an insulator; polishing down to the first layer of first insulator material; removing the first layer of first insulator material; forming a second layer of first ins

Abstract: A method for forming a shallow trench isolation structure in a substrate includes the steps of forming a doped region around the future top corner regions of a trench. The concentration of dopants inside the doped region increases towards the substrate surface. Thereafter, a trench is formed in the substrate, and then a thermal oxidation operation is carried out. Utilizing the higher oxidizing rate for doped substrate relative to an undoped region, the upper corners of the trench become rounded corners. Subsequently, a liner oxide layer is formed over the substrate surface inside the trench using conventional methods. Finally, insulating material is deposited into the trench to form a trench isolation structure.

Abstract: A trench is etched in a silicon substrate covered with an oxide/nitride stack and a field oxide layer is then grown through oxidation of the silicon in the substrate such that the trench is partly filled. There is reduced oxide encroachment into the active areas under the nitride layer because of the partial field oxide growth. Double oxide layers are deposited over the surface of the field oxide layer and the oxide/nitride stack such that the oxide layers fill the remainder of the trench and produce a nearly planar topology. The double oxide layers are then etched back to the nitride layer through chemical mechanical polishing, leaving the field isolation region. After stripping the oxide/nitride stack, a gate oxide layer is grown. A minimal amount of oxide is required to fill the trench because the trench is already almost filled with the field oxide layer and because of the shallow depth of the trench. Consequently, the etch back step causes minimal dishing.

Abstract: A semiconductor device isolation structure includes a trench formed in a substrate vertically from the major surface of the substrate, a trench plug for filling the trench, and a buried insulation region formed under the trench adjacent thereto, and a method of the same includes the steps of forming a trench in a substrate and vertically from the major surface of the substrate, selectively implanting oxide ions under the trench of the substrate, and forming a trench plug so as to fill the trench.

Abstract: A method of fabricating a semiconductor device, including the steps of (a) forming a channel at a surface of a semiconductor substrate only in the center of a region X which physically and electrically isolates adjacent regions Y in each of which a device is to be fabricated, and (b) forming a silicon oxide layer over the region X for physically and electrically isolating the adjacent regions Y from each other. The method suppresses dimensional shift and occurrence of a stress, and further makes it difficult for the reverse narrow channel effect to occur only by adding the small number of additional steps thereto.

Abstract: A method for forming a semiconductor device comprises the steps of forming an oxide over a silicon layer, forming a blanket first nitride layer over the oxide layer and the silicon layer, and etching the first nitride layer and the oxide layer to form a sidewall from at least the oxide layer and the first nitride layer. Next, a second nitride layer is formed over the sidewall and an oxidizable layer is formed over the second nitride layer. The oxidizable and the second nitride layers are etched to form a spacer from the oxidizable layer from and the second nitride layer, and the oxidizable and the silicon layers are oxidized.

Abstract: The method for forming a semiconductor device isolation layer, which advantageously simplifies the manufacture and planarization of the device, includes the steps of forming a V-shaped groove of a predetermined width and depth in a device isolation region of a semiconductor substrate and subjecting the substrate to a thermal oxidation process to form the device isolation layer.

Abstract: Oxide isolation regions are fabricated for integrated circuit substrates by forming a pad layer on an integrated circuit substrate and forming a silicon nitride mask on the pad layer. The mask exposes a portion of the pad layer. The exposed portion of the pad layer is thinned to thereby define a pad layer sidewall. A silicon nitride layer is formed on the silicon nitride mask, on the thinned pad layer and on the pad layer sidewall. The silicon nitride layer is selectively etched to form a silicon nitride spacer on the pad layer sidewall. The integrated circuit substrate is then oxidized, using the silicon nitride mask and the silicon nitride spacer as an oxidation mask, to thereby form an oxide isolation region in the thinned portion of the pad layer and in the integrated circuit substrate beneath the pad layer.

Abstract: A method for fabricating a semiconductor device including a silicon substrate and plural silicon stacks thereon includes forming a nitride shield layer on the substrate and stacks to cover the stacks, such that the stacks are protected from loss of critical dimension during subsequent isolation trench formation and oxidation. In other words, the edge of each stack, and thus the critical dimension of the silicon layers of the stack, is protected from oxidation by the nitride shield layer.

Abstract: A method of forming an isolation region exerts no adverse influence upon steps after forming the isolation region and is, besides, capable of forming the isolation region having a narrow isolation width. After a mask has been formed of an oxidationproof material such as Si.sub.3 N.sub.4 on a silicon substrate, a field oxide is formed by effecting selective oxidation in a high-pressure dry oxygen atmosphere. Thereafter, a portion, protruded from the silicon substrate, of the formed field oxide is removed, thereby forming the isolation region.

Abstract: A method of forming a device isolation layer of a semiconductor device includes the steps of forming a first buffer layer on the active region of a semiconductor substrate and forming an oxidation preventive layer on the first buffer layer. A second buffer layer is formed on the semiconductor substrate, and an oxidation preventive side wall is formed on the side parts of the first buffer layer and the oxidation preventive layer. A recess or a trench is formed next to the sidewall, and a device isolation layer is formed in the recess or the trench by oxidation.

Abstract: An isolation layer forming method for a semiconductor device which prevents damage of an isolation layer due to a misalignment of a mask when a contact hole is formed. An anti-oxidative pattern for exposing an isolation region is formed on a semiconductor substrate, and an undercut portion on a lower sidewall of the anti-oxidative pattern is formed by selectively removing the exposed semiconductor substrate by an isotropic etching process. Thereafter, the isolation layer is formed by an oxidation process so that an edge portion of the isolation layer which is placed in the undercut portion is not exposed to a surface of the semiconductor substrate.

Abstract: A semiconductor processing method of forming field oxide regions on a semiconductor substrate includes, i) providing an oxidation resistant mask over a layer of oxide over a desired active area region on a semiconductor substrate, the mask having a central region and opposed sidewall edges, the oxide layer being thinner in the central region than at the sidewall edges; and ii) oxidizing portions of the substrate unmasked by the mask to form field oxide regions on the substrate. The oxidation resistant mask can be provided by depositing and patterning a nitride layer atop a pad oxide layer. Substrate area not covered the mask is oxidized to produce an oxide layer outside of the mask which is thicker than the pad oxide layer. A thin layer of nitride can then be deposited, and anisotropically etched to produce masking spacers which cover the thicker oxide adjacent the original mask. Mask lifting during subsequent oxidation is restricted, thus minimizing bird's beak encroachment and substrate defects.

Abstract: A method of rounding corners of isolating trenches formed in a substrate with a planar surface includes a first step of forming a masking material on the planar surface. Edges of the masking material are offset from the corners of the isolating trenches. The second method step includes growing an oxide on an exposed portion of the substrate under high temperature. The oxidation under high temperature causes the corners of the isolating trenches to become rounded.

Abstract: An isolation technique is provided for improving the overall planarity of isolation regions relative to adjacent active area silicon mesas. The isolation process results in a trench formed in field regions immediately adjacent the active regions. The trench, however, does not extend entirely across the field region. By preventing large area trenches, substantial dielectric fill material and the problems of subsequent planarization of that fill material is avoided. Accordingly, the present isolation technique does not require conventional fill dielectric normally associated with a shallow trench process. While it achieves the advantages of forming silicon mesas, the present process avoids having to rework dielectric surfaces in large area field regions using conventional sacrificial etchback, block masking and chemical-mechanical polishing. The improved isolation technique hereof utilizes trenches of minimal width etched into the silicon substrate at the periphery of field regions, leaving a field mesa.

Abstract: A semiconductor fabrication method for forming an insulation film and a first anti-oxidation film sequentially on a substrate which is sectioned into each of a peri region and a cell region. An active pattern is formed in the cell region and a first field ion-implanted region in a first conductive well of the cell region. Side wall spacers are formed on each side wall of the active pattern in the cell region. An active pattern is formed in the peri region by selectively etching the first anti-oxidation film and the insulation film so as to expose a certain surface portion of the peri region substrate therethrough. A first field ion-implanting region is formed in a first conductive well of the peri region by ion-implanting highly concentrated first conductive impurities through the exposed substrate and a second field ion-implanted region in a second conductive well of the peri region.

Abstract: Methods of forming trench-based isolation regions with reduced susceptibility to edge defects include the steps of forming trenches at a face of a semiconductor substrate and then filling the trenches with electrically insulating regions. However, to prevent exposure of those portions of the substrate extending adjacent the trenches, supplemental oxide regions are formed at the interfaces between the upper portions of the trench sidewalls and the electrically insulating regions in the trenches, by exposing the electrically insulating regions to an oxidation atmosphere at a temperature in a range between about 950.degree. C. and 1100.degree. C. In particular, the supplemental oxide regions are formed as thermal oxides of higher density than the electrically insulating regions in the trenches. Thus, the supplemental oxide regions are more resistant to chemical etchants.

Abstract: A method for forming a field oxide film includes the steps of: (i) laminating a gate insulating film, a polysilicon layer and a first silicon nitride film over the entire surface of a semiconductor substrate in this order; (ii) patterning the gate insulating film, the polysilicon layer and the first silicon nitride film to a desired shape; (iii) forming a sidewall spacer of a second silicon nitride film on a side wall of the gate insulating film, the polysilicon layer and the first silicon nitride film; (iv) selectively etching a portion of the semiconductor substrate with the first silicon nitride film and the sidewall spacer used as a mask; and (v) forming a field oxide film on the etched portion of the semiconductor substrate in a self-aligned manner relative to the polysilicon layer. According to the invention, lifting up of the polysilicon layer caused by the bird's beak of the field oxide film coming under the polysilicon layer can be reduced.

Abstract: A silicon substrate has patterned thereon a pad oxide layer and a nitride layer. The exposed surface of the silicon substrate is cleaned of residual oxide, and a layer of oxidizable material such as polysilicon is deposit over the resulting structure. The polysilicon layer is anisotropically etched to form spacers on the side of the nitride layer portions, which are also in contact with the silicon substrate, the etching continuing into the silicon substrate. Field oxidation is then undertaken, with the polysilicon spacers being oxidized, as is a portion of the silicon substrate, the spacers causing initial oxidation during field oxide growth to be removed from the sides of the nitride layer portions, so that encroachment of the oxide under the nitride layer portions is avoided.

Abstract: A method for forming an isolation region of a semiconductor device to improve isolation characteristics between semiconductor devices. A first insulating layer is formed on a substrate, and a second insulating layer is formed on the first insulating layer. A field region of the substrate is defined by selectively removing the second insulating layer. A portion of the surface of the substrate is then exposed by selectively removing the first insulating layer using the second insulating layer as a mask. A third insulating layer is formed on the exposed portion of the substrate. Then insulating sidewalls are formed on sides of the first and second insulating layers. Next, a trench is then formed in the substrate using the second insulating layer and the insulating sidewalls as masks. Finally, a field oxide layer is formed in the trench to isolate semiconductor devices.

Abstract: A method for forming an isolation region in a semiconductor substrate is disclosed. The present invention includes forming an insulating layer on the semiconductor substrate, and then forming a dielectric layer on the insulating layer. After patterning to etch portions of the dielectric layer, the insulating layer and the semiconductor substrate are etched using the patterned dielectric layer as a mask, thereby forming a trench in the semiconductor substrate. Next, a first silicon oxide layer is formed over the semiconductor substrate, and the first silicon oxide layer is then anisotropically etched to form a spacer on the sidewalls of the trench. Thereafter, the semiconductor substrate is thermally oxidized to form a field oxide region over the semiconductor substrate, and a second silicon oxide layer is then formed over the field oxide region. Finally, the second silicon oxide layer is etched back until surface of the dielectric layer is exposed.

Abstract: A method is provided for forming an isolation structure at a semiconducting surface of a body, and the isolation structure formed thereby. A masking layer is formed over selected regions of the substrate surface; the masking layer preferably comprising a nitride layer overlying a pad oxide layer. The masking layer is patterned and etched to form openings exposing selected regions of the substrate surface. Recesses are formed into the substrate in the openings. Preferably a portion of the pad oxide layer is isotropically etched under the nitride layer forming an undercut region. An etch stop layer is formed over the substrate in the recesses filling in the undercut along the sidewalls. A second masking layer, preferably of nitride is formed over the etch stop layer and anisotropically etched to form nitride sidewalls in the openings. The etch stop layer may be etched away from the horizontal surfaces.

Abstract: To form NPN and PNP transistors on the same base for example to obtain a complementary bipolar transistor it has been necessary to make an epitaxial layer a thick film, and this has resulted in deterioration of the characteristics of the NPN transistor. Also, because a step of forming an alignment mark has been necessary this has increased the number of manufacturing steps needed to make a complementary bipolar transistor. This invention provides a semiconductor device manufacturing method which solves this problem as follows: After a first opening 13 (alignment mark 16) and a second opening 14 are formed in an insulating film 12 formed on a semiconductor base 11 and a doping mask 15 is then formed on the semiconductor base 11, a third opening 17 is formed thereon with the alignment mark 16 as a reference.

Abstract: An integrated circuit device is isolated by forming a pad oxide layer on an integrated circuit substrate. A mask pattern is formed on the pad layer. The mask pattern includes sidewalls which selectively expose the pad oxide layer between the sidewalls. A silicon spacer is formed on the sidewalls. An oxidation barrier film is formed on the silicon spacer and on the exposed pad oxide layer. The integrated circuit substrate is then oxidized through the oxidation barrier film to form a device isolating layer. The oxidation barrier film on the exposed pad oxide layer is thinner than the oxidation barrier film on the sidewalls. Thus, oxidation of the silicon spacer is delayed relative to the substrate.

Abstract: A process for forming a silicon oxide-filled shallow trench on the active surface of a silicon chip starts with forming a trench in the silicon chip that has an upper portion with vertical side walls and a lower portion with tapered side walls. Then oxygen is implanted selectively into the walls of the lower portion of the trench and the chip is heated to react the implanted oxygen with the silicon to form silicon oxide. The rest of the trench is then filled with deposited silicon oxide, typically by depositing a layer of silicon oxide over the surface and then planarizing the deposited silicon oxide essentially to the level of the top of the trench. The silicon-filled shallow trench serves to divide the surface portion of the chip into discrete regions, each for housing one or more circuit components of an integrated circuit.

Abstract: A process for forming a shallow trench isolation is disclosed. Initially, a gate oxide layer is formed on a substrate, and a silicon nitride, which defines an active area, is then patterned on the gate oxide layer. Next, hemispherical grain silicon is formed on the silicon nitride, the sidewalls of the silicon nitride, and the exposed gate oxide layer. Portions of the gate oxide layer are removed to form oxide islands using the silicon nitride and the hemispherical grain silicon as mask. Thereafter, portions of the substrate are removed using the oxide islands as mask. Finally, the exposed substrate is thermally oxidized to form the field oxide structure of the present invention.

Abstract: A method for fabricating an isolation layer of a semiconductor device defines an active region and an isolation region on a semiconductor substrate. An active pattern is formed on the active region of the semiconductor substrate and the active pattern includes a first insulating layer and a first oxidation stop layer formed on the first insulating layer. A first isolation layer is grown over the substrate corresponding to the isolation region and the first isolation layer is selectively etched by using the first oxidation stop layer as a mask. A sidewall spacer is formed adjacent to the active pattern including a remaining portion of the first isolation layer, and the sidewall spacer includes a second insulating layer and a second oxidation stop layer formed on the second insulating layer. A second isolation layer is grown over the substrate.

Abstract: The invention is a process for filling narrow isolation trenches with thermal oxide using a nitride spacer and a second trench etch. The method begins by providing forming a pad oxide layer 20 and a first nitride layer 30 over a substrate. A first opening is formed in the pad oxide layer 20 and first nitride layer 30. The substrate is then etched through the first opening forming a first trench 40 in the substrate. A thin oxide film 50 is then grown over the substrate in the bottom and sidewalls of the first trench 40. Nitride spacers 60 are grown over the sidewalls of the first trench and over the thin oxide layer 40 on the sidewalls of the trench. A portion of the thin oxide film 50 on the bottom of the trench is etched. The substrate in the bottom of the first trench is etched forming a second trench 70. The etch exposes portions of the substrate on the bottom of the deeper second trench.

Abstract: A method for forming a semiconductor device comprises the steps of providing a semiconductor substrate having first and second surfaces, the second surface having an inferior plane with respect to the first surface. An oxidizing-resistant layer such as nitride is formed on the first surface, and an oxidizable material is formed over the first and second surfaces. A protective material is formed over the first and second surfaces, which is then removed from the first surface. Subsequent to the step of removing the protective material from the first surface, the oxidizable material is removed from the first surface and is left over the second surface. Subsequent to the step of removing the oxidizable material from the first surface, the protective material is removed from the second surface and the oxidizable material remains over the second surface. Subsequent to removing the protective material from the second surface, the oxidizable material on the second surface is oxidized.