Abstract: A semiconductor structure and a method for fabricating the semiconductor structure include a hybrid orientation substrate having a first active region having a first crystallographic orientation that is vertically separated from a second active region having a second crystallographic orientation different than the first crystallographic orientation. A first field effect device having a first gate electrode is located and formed within and upon the first active region and a second field effect device having a second gate electrode is located and formed within and upon the second active region. Upper surfaces of the first gate electrode and the second gate electrode are coplanar. The structure and method allow for avoidance of epitaxial defects generally encountered when using hybrid orientation technology substrates that include coplanar active regions.

Abstract: A semiconductor IC includes grooves formed in a substrate to define a first dummy region and second dummy regions formed at a scribing area, and third dummy regions and a fourth dummy region formed at a product area. A width of the first dummy region is greater than widths of each of the second and third dummy regions and a width of the fourth dummy region is greater than widths of each of the third dummy regions. A conductor pattern is formed over the first dummy region for optical pattern recognition. The first dummy region is formed under the conductor pattern so the grooves are not formed under the conductor pattern. The second dummy regions are spaced from one another by a predetermined spacing at the scribing area, and the third dummy regions are spaced from one another by a predetermined spacing at the product area.

Abstract: A plurality of light-shielding films etc. are formed on a surface of a first insulating film. Then, a dummy pattern is formed on a surface of a second insulating film between adjoining ones of the light-shielding films etc., so that a height of the dummy pattern is equal to that of the second insulating film on the light-shielding films etc., as measured from the surface of the first insulating film. Thereafter, a third insulating film covering the dummy pattern and having a flat surface is formed over the surface of the second insulating film. Subsequently, a base layer is bonded to a support substrate so that the flat surface of the third insulating film faces the support substrate. A semiconductor device is manufactured in this manner.

Abstract: A pulsed laser-initiated exfoliation method for patterning a Group III-nitride film on a growth substrate is provided. This method includes providing a Group III-nitride film a growth substrate, wherein a growth substrate/Group III-nitride film interface is present between the Group III-nitride film and the growth substrate. Next, a laser is selected that provides radiation at a wavelength at which the Group III-nitride film is transparent and the growth substrate is absorbing. The interface is then irradiated with pulsed laser radiation from the Group III-nitride film side of the growth substrate/Group III-nitride film interface to exfoliate a region of the Group III-nitride from the growth substrate. A method for transfer a Group-III nitride film from a growth substrate to a handle substrate is also provided.

Abstract: The invention relates to a detachable substrate for the electronics, optics or optoelectronics industry, that includes a detachable layer resting on a buried weakened region. This substrate is remarkable in that this buried weakened region consists of a semiconductor material that is denser in the liquid state than in the solid state and that contains in places precipitates of naturally volatile impurities. The invention also relates to a process for fabricating and detaching a detachable substrate.

Abstract: There is provided a method for manufacturing an SOI substrate capable of effectively and efficiently embrittling an interface of an ion-implanted layer without causing the separation of a bonded surface 9 or the breakage of a bonded wafer. Provided is a method for manufacturing an SOI substrate 8 by forming an SOI layer 4 on a surface of a transparent insulating substrate 3, the method comprising, in the following order, implanting ions into a silicon wafer 5 or a silicon wafer 5 with an oxide film 7 from a surface thereof so as to form an ion-implanted layer 2; subjecting at least one of the surface of the transparent insulating substrate and the surface of the ion-implanted silicon wafer or the silicon wafer with an oxide film to a surface activation treatment; bonding together the silicon wafer 5 or the silicon wafer 5 with an oxide film 7 and the transparent insulating substrate 3; subjecting the bonded wafer to a heat treatment at 150° C. or higher but not higher than 350° C.

Abstract: A process to divide a wafer into individual chips is disclosed. The process (1) etches semiconductor layers for an active device to form two grooves putting the virtual cut line therebetween, where the semiconductor wafer is to be divided along the virtual cut line; (2) etches the substrate in a region including the virtual cut line but offset from the groove from the back surface thereof so as to expose the semiconductor layers in the primary surface; and (3) etches the semiconductor layer exposed in step (2).

Abstract: A method includes providing a donor substrate comprising single crystal silicon and having a surface region, a cleave region, and a thickness of material to be removed between the surface region and the cleave region. The method also includes introducing through the surface region a plurality of hydrogen particles within a vicinity of the cleave region using a high energy implantation process. The method further includes applying compressional energy to cleave the semiconductor substrate and remove the thickness of material from the donor substrate.

Abstract: Provided is a method of fabricating an image sensor device. The method includes providing a first substrate having a radiation-sensing region disposed therein. The method includes providing a second substrate having a hydrogen implant layer, the hydrogen implant layer dividing the second substrate into a first portion and a second portion. The method includes bonding the first portion of the second substrate to the first substrate. The method includes after the bonding, removing the second portion of the second substrate. The method includes after the removing, forming one or more microelectronic devices in the first portion of the second substrate. The method includes forming an interconnect structure over the first portion of the second substrate, the interconnect structure containing interconnect features that are electrically coupled to the microelectronic devices.

Abstract: A process for transferring a thin film includes forming a layer of inclusions to create traps for gaseous compounds. The inclusions can be in the form of one or more implanted regions that function as confinement layers configured to trap implanted species. Further, the inclusions can be in the form of one or more layers deposited by a chemical vapor deposition, epitaxial growth, ion sputtering, or a stressed region or layer formed by any of the aforementioned processes. The inclusions can also be a region formed by heat treatment of an initial support or by heat treatment of a layer formed by any of the aforementioned processes, or by etching cavities in a layer. In a subsequent step, gaseous compounds are introduced into the layer of inclusions to form micro-cavities that form a fracture plane along which the thin film can be separated from a remainder of the substrate.

Abstract: A method is provided for bonding a die to a base technology wafer and includes: providing a device wafer having a front, back, at least one side, and at least one TSV, wherein the back contains a substrate material; providing a carrier wafer having a front, back, and at least one side; bonding the wafers using an adhesive; removing the substrate material and wet etching, from the device wafer's back side, to expose at least one metallization scheme feature; processing the device wafer's back side to create at least one backside redistribution layer; removing the device wafer from the carrier wafer; dicing the device wafer into individual die; providing a base technology wafer; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.

Abstract: A method for preparing a semiconductor substrate with an buried insulating layer by a guttering process, includes the following steps: providing a device substrate and a supporting substrate; forming an insulating layer on a surface of the device substrate; performing a heating treatment on the device substrate, so as to form a denuded zone on the surface of the device substrate; bonding the device substrate having the insulating layer with the supporting substrate, such that the insulating layer is sandwiched between the device substrate and the supporting substrate; annealing and reinforcing a bonding interface, such that an adherence level of the bonding interface meets requirements in the following chamfering grinding, thinning and polishing processes; performing the chamfering grinding, thinning and polishing processes on the device substrate which is bonded.

Abstract: In an embodiment, a first semiconductor wafer having plural first chip areas sectioned by first dicing grooves, and first photosensitive surface protection and adhesive layers provided at each of circuit surfaces of the plural first chip areas is prepared. A second semiconductor wafer having plural second chip areas sectioned by second dicing grooves, and second photosensitive surface protection and adhesive layers provided at each of circuit surfaces of the plural second chip areas is stacked with the first semiconductor wafer via the second photosensitive surface protection and adhesive layers to form plural chip stacked bodies of the first chip areas and the second chip areas.

Abstract: A process for wafer-to-wafer bonding of a first wafer having a first set of dies of a first die size to a reconstituted wafer of a second set of dies having a second die size different than the first die size. The process includes aligning the second set of dies such that a second set of interconnects on the second set of dies aligns with a first set of interconnects on the first set of dies. The second set of dies includes a spacing between the second set of dies based on parameters of the first set of dies. The process also includes coupling the reconstituted wafer with the first wafer to create a wafer stack.

Abstract: A process for preparing a surface of a material that is not bondable to make it bondable to the surface of another material. A non-bondable surface of a semiconductor wafer is treated with oxygen plasma to oxidize the surface of the wafer and make the surface smoother, hydrophilic and bondable to the surface of another substrate, such as a glass substrate. The semiconductor wafer may have a barrier layer thereon formed of a material, such as SixNy or SiNxOy that is not bondable to another substrate, such as a glass substrate. In which case, the oxygen plasma treatment converts the surface of the barrier layer to oxide, such as SiO2, smoothing the surface and making the surface hydrophilic and bondable to the surface of another substrate, such as a glass substrate.

Abstract: A method of forming a surface passivation layer on a surface of a crystalline silicon substrate is disclosed. In one aspect, the method includes depositing an Al2O3 layer on the surface, the Al2O3 layer having a thickness not exceeding about 15 nm; performing an outgassing process at a temperature in the range between about 500° C. and 900° C., after the deposition of the Al2O3 layer on the surface; and after the outgassing process, depositing at least one additional dielectric layer such as a silicon nitride layer and/or a silicon oxide layer on the Al2O3 layer.

Abstract: The disclosure provides a method for fabricating the flexible electronic devices, including: providing a first rigid carrier substrate and a second rigid carrier substrate, wherein at least one flexible electronic device is formed between the first rigid carrier substrate and the second rigid carrier substrate, and a plurality of first de-bonding areas, a first flexible substrate, the flexible electronic device, a second flexible substrate, a plurality of second de-bonding areas and the second rigid carrier substrate are formed on the first rigid carrier substrate; performing a first cutting step to cut through the first de-bonding areas; separating the first rigid carrier substrate from the first de-bonding areas; removing the first rigid carrier substrate from the first de-bonding areas; and performing a second cutting step to cut through the second de-bonding areas; separating and removing the second rigid carrier substrate from the second de-bonding areas.

Abstract: To provide a method of manufacturing a laminated wafer by which a strong coupling is achieved between wafers made of different materials having a large difference in thermal expansion coefficient without lowering a maximum heat treatment temperature as well as in which cracks or chips of the wafer does not occur. A method of manufacturing a laminated wafer 7 by forming a silicon film layer on a surface 4 of an insulating substrate 3 comprising the steps in the following order of: applying a surface activation treatment to both a surface 2 of a silicon wafer 1 or a silicon wafer 1 to which an oxide film is layered and a surface 4 of the insulating substrate 3 followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer 5 at a temperature of 200° C. to 350° C., and thinning the silicon wafer 1 by a combination of grinding, etching and polishing to form a silicon film layer.

Abstract: A debonder apparatus for debonding a temporary bonded wafer pair. The clam shell reactor includes first and second isolated chambers. An upper chuck is contained within the first chamber and has a lower surface protruding into the second chamber. A lower chuck is contained within the second chamber and has an upper surface oriented parallel and opposite to the lower surface of the upper chuck. The debonder includes means for holding an unbounded surface of the first wafer onto the lower surface of the upper chuck. The first chamber pressurizing means applies pressure onto an upper surface of the upper chuck and thereby causes the lower surface of the upper chuck and the attached wafer pair to bow downward. The debonder apparatus also includes means for initiating a separation front at a point of the bonding interface of the temporary bonded wafer pair.

Abstract: A seed layer having a predetermined pattern is formed on a side of one surface of a second substrate, and a ferroelectric layer is formed on the side of the one surface of the second substrate. A lower electrode is formed on the ferroelectric layer, and the lower electrode and a first substrate are bonded via a bonding layer. A laser beam with a predetermined wavelength is irradiated from a side of other surface of the second substrate to transfer a ferroelectric film, which overlaps with the seed layer, of the ferroelectric layer and the seed layer onto the side of said one surface of the first substrate. The laser beam passes through the second substrate, is reflected by the seed layer, and is absorbed by a second portion of the ferroelectric layer. The second portion does not overlap with the seed layer.

Abstract: A computer obtains user input from an input to control a cutter and a conveyor to cut a substrate. The control module of the computer calculates a total number of cuts of the substrate and a distance that the substrate moves before each cut of the substrate according to user input. A conveyer control module of the computer controls the conveyer to move the substrate, where a reminder signal is sent out after the substrate has moved the distance. A cutter control module of the computer controls the cutter to cut the substrate.

Abstract: It is an object of the present invention to provide a method of separating a thin film transistor, and circuit or a semiconductor device including the thin film transistor from a substrate by a method different from that disclosed in the patent document 1 and transposing the thin film transistor, and the circuit or the semiconductor device to a substrate having flexibility. According to the present invention, a large opening or a plurality of openings is formed at an insulating film, a conductive film connected to a thin film transistor is formed at the opening, and a peeling layer is removed, then, a layer having the thin film transistor is transposed to a substrate provided with a conductive film or the like. A thin film transistor according to the present invention has a semiconductor film which is crystallized by laser irradiation and prevents a peeling layer from exposing at laser irradiation not to be irradiated with laser light.

Abstract: A method for transferring a micro-technological layer includes preparing a substrate having a porous layer buried beneath a useful surface, forming an embrittled zone between it and the surface, bonding the substrate to a supporting substrate, causing detachment at the porous layer by mechanical stress to obtain a first substrate remnant, and a bare surfaced detached layer joined to the supporting substrate, performing technological steps on the bared surface of the detached layer, bonding the detached layer, by the surface to which the technological steps had been applied, to a second supporting substrate, causing detachment, at the embrittled zone, by heat treatment to obtain a detached layer remnant joined to the second supporting substrate, and the detached layer remnant joined to the first supporting substrate.

Abstract: A seed layer for growing a group III-V semiconductor structure is embedded in a dielectric material on a carrier substrate. After the group III-V semiconductor structure is grown, the dielectric material is removed by wet etch to detach the carrier substrate. The group III-V semiconductor structure includes a thick gallium nitride layer of at least 100 microns or a light-emitting structure.

Abstract: A method includes the steps of: (a) fixing a front surface of a wafer (semiconductor wafer) having the front surface, a plurality of chip regions formed on the front surface, a dicing region formed between the chip regions, and a rear surface opposite to the front surface to the supporting member; (b) in a state of having the wafer fixed to the supporting member, grinding the rear surface of the wafer to expose the rear surface; (c) in a state of having the wafer fixed to the supporting member, dividing the wafer into the chip regions; (d) etching side surfaces of the chip regions to remove crushed layers formed in the step (c) on the side surfaces and obtain a plurality of semiconductor chips. After the steps (e) and (d), the plurality of divided chip regions are peeled off from the supporting member to obtain a plurality of semiconductor chips.

Abstract: A method of transferring an epitaxial film from an original substrate to a destination substrate comprises: growing an epitaxial film grown with a sacrificial layer on the original substrate; patterning the epitaxial film into a plurality of sections; attaching the plurality of sections to a stretchable film; removing the plurality of sections attached to the stretchable film from the original substrate; stretching the sections apart as needed; and attaching a permanent substrate to the plurality of sections; and trimming the sizes of the sections as needed for precise positioning prior to integrated circuit device fabrication.

Abstract: A single crystal substrate made of silicon carbide and a first support substrate having a size greater than a size of each of the single crystal substrates are prepared. The single crystal substrate is bonded onto the first support substrate. Process on the single crystal substrate bonded to the first support substrate is performed. The first support substrate is removed. The single crystal substrate is subjected to heat treatment. The single crystal substrate is bonded onto a second support substrate having a size greater than the size of the single crystal substrate. Process on the single crystal substrate bonded to the second support substrate is performed.

Abstract: A method of growing an epitaxial film and transferring it to an assembly substrate is disclosed. The film growth and transfer are made using an epitaxy lateral overgrowth technique. The formed epitaxial film on an assembly substrate can be further processed to form devices such as solar cell, light emitting diode, and other devices and assembled into higher integration of desired applications.

Abstract: A method of fabricating a device by providing an auxiliary substrate having a metal nitride layer disposed thereon where the nitride layer has a nitrogen face and an opposite face and a dislocation density that is less than about 106, with the nitrogen face of the nitride layer facing the auxiliary substrate; depositing at least one epitaxial nitride layer on the exposed opposite face of the nitride layer of the structure; depositing a further metal layer over at least a portion of the epitaxial nitride layer(s); bonding a final substrate on the deposited metal layer; and removing the auxiliary substrate to form the device from the final substrate and deposited layers. Preferably, the device that is formed includes a LED or laser.

Abstract: A wafer has a device area where a plurality of devices are formed, and a peripheral marginal area surrounding the device area. These devices are formed on the front side of the wafer so as to be partitioned by a plurality of division lines. A modified layer is formed by applying a laser beam along the division lines with the focal point of the laser beam set inside the wafer, thereby forming a modified layer as a division start point inside the wafer along each division line. The wafer is transported to a position where the next step is to be performed. In the modified layer forming step, the modified layer is not formed in the peripheral marginal area of the wafer to thereby form a reinforcing portion in the peripheral marginal area. Accordingly, breakage of the wafer from the modified layer in the transporting step can be prevented.

Abstract: An adhesive composition includes an acrylic polymer (A), a heat curable resin (B) having unsaturated hydrocarbon group, and a coupling agent (C) having reactive a double bond group.

Abstract: A method for temporary bonding first and second wafers includes, applying a first adhesive layer upon a first surface of a first wafer and then curing the first adhesive layer. Next, applying a second adhesive layer upon a first surface of a second wafer. Next, inserting the first wafer into a bonder module and holding the first wafer by an upper chuck assembly so that its first surface with the cured first adhesive layer faces down. Next, inserting the second wafer into the bonder module and placing the second wafer upon a lower chuck assembly so that the second adhesive layer faces up and is opposite to the first adhesive layer. Next, moving the lower chuck assembly upwards and bringing the second adhesive layer in contact with the cured first adhesive layer, and then curing the second adhesive layer.

Abstract: An SOI substrate and a method for forming the SOI substrate are provided. An SOI substrate can be formed by forming a silicon-germanium layer on a first baseplate. A top silicon layer can be formed on the silicon-germanium layer. A first insulating layer can be formed on the top silicon layer. An ion implanted layer can be formed in one of the silicon-germanium layer and the first baseplate. A second baseplate can be bonded to the first insulating layer. A first annealing process can be performed to anneal and split the one of the silicon-germanium layer and the first baseplate at the ion implanted layer. The silicon-germanium layer can be removed from the top silicon layer to expose the top silicon layer and to form the SOI substrate comprising the first insulating layer formed between the top silicon layer and the second baseplate.

Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The template has a shape such that the 3-D shape is substantially retained after each substrate release. Prior art reusable templates may have a tendency to change shape after each subsequent reuse; the present disclosure aims to address this and other deficiencies from the prior art, therefore increasing the reuse life of the template.

Abstract: An adhesive composition includes an acrylic polymer (A), a heat curable resin (B) having unsaturated hydrocarbon group, and a filler (C) having reactive double bond on a surface.

Abstract: The invention pertains to a combination of a substrate and a wafer, wherein the substrate and the wafer are arranged parallel to one another and bonded together with the aid of an adhesive layer situated between the substrate and the wafer, and wherein the adhesive is chosen such that its adhesive properties are neutralized or at least diminished when a predetermined temperature is exceeded. According to the invention, the adhesive layer is only applied annularly between the substrate and the wafer in the edge region of the wafer.

Abstract: A method according to embodiments of the invention includes providing an epitaxial structure comprising a donor layer and a strained layer. The epitaxial structure is treated to cause the strained layer to relax. Relaxation of the strained layer causes an in-plane lattice constant of the donor layer to change.

Abstract: A method of manufacturing semiconductor wafers, the method including: providing a donor wafer including a semiconductor substrate; performing a lithography step and processing the donor wafer; and performing at least two subsequent steps of layer transfer out of the donor wafer, each layer transfer step producing a transferred layer, where each of the transferred layers had been affected by the lithography step, and where each of the transferred layer includes a plurality of transistors with side gates, and where the layer transfer includes an ion-cut, the ion-cut including an ion implant thru the transistors.

Abstract: In one embodiment a method for manufacturing a semiconductor device comprises arranging a wafer on a carrier, the wafer comprising singulated chips; bonding the singulated chips to a support wafer, and removing the carrier.

Abstract: A method for making a silicon layer extending on an insulation layer, including the steps of forming a silicon-germanium layer on at least a portion of a silicon wafer; transforming portions of the silicon-germanium layer into porous silicon pads; growing a monocrystalline silicon layer on the silicon-germanium layer and on the porous silicon pads; removing the silicon-germanium layer; oxidizing the porous silicon pads; and depositing an insulation material on the silicon layer.

Abstract: A trap rich layer for an integrated circuit chip is formed by chemical etching and/or laser texturing of a surface of a semiconductor layer. In some embodiments, a trap rich layer is formed by a technique selected from the group of techniques consisting of laser texturing, chemical etch, irradiation, nanocavity formation, porous Si-etch, semi-insulating polysilicon, thermal stress relief and mechanical texturing. Additionally, combinations of two or more of these techniques may be used to form a trap rich layer.

Abstract: A method for manufacturing a semiconductor device, includes: forming an insulating film containing silicon, oxygen and carbon on at least one of a first substrate and a second substrate; and bonding the first substrate and the second substrate together, with the insulating film interposed therebetween. There can be provided a method capable of manufacturing a semiconductor device having high element density, high performance and high reliability, with high yield.

Abstract: Etched trenches in a bond material for die singulation, and associated systems and methods are disclosed. A method for solid state transducer device singulation in accordance with one embodiment includes forming a plurality of trenches by etching through a metallic bond material forming a bond between a carrier substrate and a plurality of the dies and singulating the carrier substrate along the trenches to separate the dies. In particular embodiments, the trenches extend into the carrier substrate. In further particular embodiments, the dies are at least partially encapsulated in a dielectric material.

Abstract: Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of III-V semiconductor material such as GaN over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of GaN bonded to the molybdenum nitride.

Abstract: A method of growing an epitaxial film and transferring it to an assembly substrate is disclosed. The film growth and transfer are made using an epitaxy lateral overgrowth technique. The formed epitaxial film on an assembly substrate can be further processed to form devices such as solar cell, light emitting diode, and other devices and assembled into higher integration of desired applications.

Abstract: Defects in a semiconductor substrate are reduced. A semiconductor substrate with fewer defects is manufactured with high yield. Further, a semiconductor device is manufactured with high yield. A semiconductor layer is formed over a supporting substrate with an oxide insulating layer interposed therebetween, adhesiveness between the supporting substrate and the oxide insulating layer in an edge portion of the semiconductor layer is increased, an insulating layer over a surface of the semiconductor layer is removed, and the semiconductor layer is irradiated with laser light, so that a planarized semiconductor layer is obtained. For increasing the adhesiveness between the supporting substrate and the oxide insulating layer in the edge portion of the semiconductor layer, laser light irradiation is performed from the surface of the semiconductor layer.

Abstract: Methods and apparatus for producing a semiconductor on insulator structure include: subjecting an implantation surface of a donor single crystal semiconductor wafer to an ion implantation process to create an exfoliation layer of the donor semiconductor wafer; bonding the implantation surface of the exfoliation layer to a glass substrate using electrolysis, wherein a liquidus viscosity of the glass substrate is about 100,000 Poise or greater.

Abstract: An object is to provide an SOI substrate with excellent characteristics even in the case where a single crystal semiconductor substrate having crystal defects is used. Another object is to provide a semiconductor device using such an SOI substrate. A single crystal semiconductor layer is formed by an epitaxial growth method over a surface of a single crystal semiconductor substrate. The single crystal semiconductor layer is subjected to first thermal oxidation treatment to form a first oxide film. A surface of the first oxide film is irradiated with ions, whereby the ions are introduced to the single crystal semiconductor layer. The single crystal semiconductor layer and a base substrate are bonded with the first oxide film interposed therebetween. The single crystal semiconductor layer is divided at a region where the ions are introduced by performing thermal treatment, so that the single crystal semiconductor layer is partly left over the base substrate.

Abstract: An object is to provide a semiconductor device which solves a problem that can occur when a substrate having an insulating surface is used. The semiconductor device includes a base substrate having an insulating surface; a conductive layer over the insulating surface; an insulating layer over the conductive layer; a semiconductor layer having a channel formation region, a first impurity region, a second impurity region, and a third impurity region provided between the channel formation region and the second impurity region over the insulating layer; a gate insulating layer configured to cover the semiconductor layer; a gate electrode over the gate insulating layer; a first electrode electrically connected to the first impurity region; and a second electrode electrically connected to the second impurity region. The conductive layer is held at a given potential.

Abstract: A method of fabricating a flexible display device includes: forming a plastic substrate on a carrier substrate, the plastic substrate including an active area and a non-active area surrounding the active area; forming an array element on the carrier substrate, the array element including a plurality of layers and having an average adhesion force among the plurality of layers; forming a first film on the array element, the first film having a first adhesion force; attaching a flexible printed circuit board to the plastic substrate; forming a second film on the first film, the second film having a second adhesion force greater than the first adhesion force; and detaching the plastic substrate from the carrier substrate.