Compound Semiconductor Patents (Class 438/46)
  • Patent number: 8664094
    Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: March 4, 2014
    Assignee: QuNano AB
    Inventors: Werner Seifert, Damir Asoli, Zhaoxia Bi
  • Patent number: 8664026
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of providing a substrate with an epitaxial layer thereon. The epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer successively grown on the substrate. The epitaxial layer has dislocation defects traversing the first semiconductor layer, the active layer and the second semiconductor layer. The epitaxial layer is then subjected to an etching process which remove parts of the second semiconductor layer and the active layer along the dislocation defects to form recesses recessing from the second semiconductor layer to the active layer. Thereafter a first electrode and a second electrode are formed on the first semiconductor layer and the second semiconductor layer, respectively.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: March 4, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang
  • Patent number: 8664638
    Abstract: Disclosed herein are gallium nitride based light emitting diodes having interlayers with high dislocation density and a method of fabricating the same. The light emitting diode includes: a substrate; a buffer layer disposed on the substrate; an n-type contact layer disposed on the buffer; a p-type contact layer disposed on the n-type contact layer; an active layer interposed between the n-type contact layer and the p-type contact layer; a first lower semiconductor layer interposed between the buffer layer and the n-type contact layer; and a first interlayer interposed between the first lower semiconductor layer and the n-type contact layer, wherein the first interlayer has lower dislocation density than the buffer layer and higher dislocation density than the first lower semiconductor layer. This way, the interlayers with higher dislocation density prevent dislocations formed within the first lower semiconductor layer from being transferred to the n-type contact layer.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: March 4, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Hong Jae Yoo, Kyung Hee Ye
  • Patent number: 8664688
    Abstract: A nitride semiconductor light-emitting chip offers enhanced luminous efficacy as a result of an improved EL emission pattern. The nitride semiconductor laser chip (nitride semiconductor light-emitting chip) has a nitride semiconductor substrate having a principal growth plane, and nitride semiconductor layers grown on the principal growth plane of the nitride semiconductor substrate. The principal growth plane of the GaN substrate is a plane having off-angles in both the a- and c-axis directions relative to an m plane, and the off-angle in the a-axis direction is larger than the off-angle in the c-axis direction.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: March 4, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Kamikawa, Masataka Ohta
  • Publication number: 20140057379
    Abstract: Disclosed is a photoresist film including a light-to-heat conversion layer on a support film, and a thermo-responsive polymer layer on the light-to-heat conversion layer, wherein the photoresist film is easily detached from a transfer substrate through a temperature adjustment and detach film since the photoresist film includes thermo-responsive polymer.
    Type: Application
    Filed: October 23, 2012
    Publication date: February 27, 2014
    Applicant: LG DISPLAY CO., LTD.
    Inventors: Jae hyun Park, Jin Wuk Kim, Wy-Yong Kim, Hye Li Min, Min Jee Kim, Young tae Son, Young sub Shin
  • Publication number: 20140057380
    Abstract: A nitride-based semiconductor device includes a p-type AldGaeN layer 25 whose growing plane is an m-plane and an electrode 30 provided on the p-type AldGaeN layer 25. The AldGaeN layer 25 includes a p-AldGaeN contact layer 26 that is made of an AlxGayInzN (x+y+z=1, x?0, y>0, z?0) semiconductor, which has a thickness of not less than 26 nm and not more than 60 nm. The p-AldGaeN contact layer 26 includes a body region 26A which contains Mg of not less than 4×1019 cm?3 and not more than 2×1020 cm?3 and a high concentration region 26B which is in contact with the electrode 30 and which has a Mg concentration of not less than 1×1021 cm?3.
    Type: Application
    Filed: November 1, 2013
    Publication date: February 27, 2014
    Applicant: Panasonic Corporation
    Inventors: Toshiya YOKOGAWA, Ryou KATO, Naomi ANZUE
  • Publication number: 20140054636
    Abstract: This nitride-based semiconductor light-emitting element includes: a nitride-based semiconductor multilayer structure including a p-type semiconductor region, the nitride-based semiconductor multilayer structure having a growing plane which is an m-plane; and an electrode which is arranged on an AldGaeN layer. The AldGaeN layer is formed of a GaN-based semiconductor. The electrode includes Ag as the principal component and also includes Ge and at least one of Mg and Zn.
    Type: Application
    Filed: November 1, 2013
    Publication date: February 27, 2014
    Applicant: Panasonic Corporation
    Inventors: Naomi ANZUE, Toshiya YOKOGAWA
  • Patent number: 8658527
    Abstract: A method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in its main surface is more than 0.8 time and less than 1.0 time as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a main surface side of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate, the single crystal film in the composite substrate being an SiC film. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage without crack being produced in a substrate is provided.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: February 25, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke Fujiwara, Koji Uematsu, Yoshiyuki Yamamoto, Issei Satoh
  • Patent number: 8659029
    Abstract: A low contact resistance semiconductor structure includes a substrate, a semiconductor stacked layer, a low contact resistance layer and a transparent conductive layer. The low contact resistance layer is formed on one side of a P-type GaN layer of the semiconductor stacked layer. The low contact resistance layer is formed at a thickness smaller than 100 Angstroms and made of a material selected from the group consisting of aluminum, gallium, indium, and combinations thereof. Through the low contact resistance layer, the resistance between the P-type GaN layer and transparent conductive layer can be reduced and light emission efficiency can be improved when being used on LEDs. The method of fabricating the low contact resistance semiconductor structure of the invention forms a thin and consistent low contact resistance layer through a Metal Organic Chemical Vapor Deposition (MOCVD) method to enhance matching degree among various layers.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: February 25, 2014
    Assignee: Lextar Electronics Corporation
    Inventors: Te-Chung Wang, Fu-Bang Chen, Hsiu-Mu Tang
  • Patent number: 8658451
    Abstract: Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: February 25, 2014
    Assignee: Ultratech, Inc.
    Inventors: Yun Wang, Andrew M. Hawryluk
  • Patent number: 8658449
    Abstract: A method of manufacturing a semiconductor layer with which inactivation of impurity is able to be inhibited by a simple method, a semiconductor layer in which inactivation of impurity is inhibited, a method of manufacturing a laser diode with which inactivation of impurity is able to be inhibited by a simple method, and a laser diode including a semiconductor layer in which inactivation of impurity is inhibited are provided. In the method of manufacturing a semiconductor layer, after a semiconductor layer is formed by epitaxial growth with the use of AsH3, supply of AsH3 is stopped without separately supplying new gas when process temperature is 500 deg C. or more.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: February 25, 2014
    Assignee: Sony Corporation
    Inventors: Naoki Jogan, Takahiro Arakida
  • Patent number: 8659005
    Abstract: A light emitting device comprising a staggered composition quantum well (QW) has a step-function-like profile in the QW, which provides higher radiative efficiency and optical gain by providing improved electron-hole wavefunction overlap. The staggered QW includes adjacent layers having distinctly different compositions. The staggered QW has adjacent layers Xn wherein X is a quantum well component and in one quantum well layer n is a material composition selected for emission at a first target light regime, and in at least one other quantum well layer n is a distinctly different composition for emission at a different target light regime. X may be an In-content layer and the multiple Xn-containing a step function In-content profile.
    Type: Grant
    Filed: December 24, 2007
    Date of Patent: February 25, 2014
    Assignee: Lehigh University
    Inventors: Nelson Tansu, Ronald A. Arif, Yik Khoon Ee, Hongping Zhao
  • Patent number: 8658450
    Abstract: According to one embodiment, a crystal growth method is disclosed for growing a crystal of a nitride semiconductor on a major surface of a substrate. The major surface is provided with asperities. The method can include depositing a buffer layer on the major surface at a rate of not more than 0.1 micrometers per hour. The buffer layer includes GaxAl1-xN (0.1?x<0.5) and has a thickness of not smaller than 20 nanometers and not larger than 50 nanometers. In addition, the method can include growing the crystal including a nitride semiconductor on the buffer layer at a temperature higher than a temperature of the substrate in the depositing the buffer layer.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: February 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Koichi Tachibana, Toshiki Hikosaka, Shinya Nunoue
  • Publication number: 20140051198
    Abstract: Provided is a method for manufacturing an organic EL device, including: a vapor deposition step of forming an organic layer over a substrate moving relative to a nozzle by discharging a vaporized organic layer-forming material through the nozzle. The vapor deposition step is performed so that a light emitting region formed of the organic layer and having a width A (mm) in a direction perpendicular to a direction in which the substrate is moving is formed, and so that W?A+2×h (where h?5 mm) is satisfied, where a length of an opening of the nozzle in the direction perpendicular to the direction in which the substrate is moving is denoted by W (mm), and a distance between the opening and the substrate is denoted by h (mm).
    Type: Application
    Filed: April 6, 2012
    Publication date: February 20, 2014
    Applicant: NITTO DENKO CORPORATION
    Inventors: Ryohei Kakiuchi, Shigenori Morita, Kanako Hida
  • Publication number: 20140048775
    Abstract: A transparent electrode is provided for an organic light emitting diode (OLED) device. The electrode may be made according to a method including: sputter-depositing a first layer of or including indium tin oxide (ITO) on a substrate; sputter-depositing a thin second metallic or substantially metallic layer on the glass substrate over the first layer to form an electrode structure, and heat treating the electrode structure at temperature(s) of at least about 400 degrees C. in order to thermally activate at least the first layer of or including ITO. The electrode structure may then be provided in an OLED device on the light-emitting side of the organic light emitting semiconductor layer.
    Type: Application
    Filed: August 14, 2012
    Publication date: February 20, 2014
    Inventor: Alexey KRASNOV
  • Publication number: 20140048817
    Abstract: In embodiments of the invention, a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown on a substrate. The substrate is a non-III-nitride material. The substrate has an in-plane lattice constant asubstrate. At least one III-nitride layer in the semiconductor structure has a bulk lattice constant alayer and [(|asubstrate?alayer|)/asubstrate]100% is no more than 1%. A surface of the substrate opposite the surface on which the semiconductor structure is grown is textured.
    Type: Application
    Filed: November 1, 2011
    Publication date: February 20, 2014
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Nathan Frederick Gardner, Werner Karl Goetz, Michail Jason Grundmann, Melvin Barker Mclaurin, John Edward Elper, Michael David Camras, Aurelien Jean Francois Davie
  • Publication number: 20140048794
    Abstract: For an organic semiconductor component and production thereof, an organic semiconductor layer is formed from complexes disposed on a boundary between a first layer and a second layer. The organic semiconductor layer is thereby orientated. The first layer is formed of a salt providing the central cations for the complexes. The second layer is formed of molecules that are the ligands of the complexes. Complex formation takes place when the second layer is deposited on the first layer.
    Type: Application
    Filed: March 28, 2012
    Publication date: February 20, 2014
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventor: Günter Schmid
  • Publication number: 20140048793
    Abstract: An organic light-emitting element having a high light extraction efficiency and a high light emission efficiency is provided, by an organic light-emitting element (10) including: an anode layer (12) formed on a substrate (11); a dielectric layer (13) formed on the anode layer (12); plural first recessed sections (16) formed by penetrating at least the dielectric layer (13); plural second recessed sections (17) formed on the upper surface of the dielectric layer (13) without penetrating the dielectric layer (13); an organic compound layer (14) including a light emitting layer formed to cover at least the upper surface of the dielectric layer (13), the inner surface of the first recessed sections (16) and the inner surface of the second recessed sections (17); and a cathode layer (15) formed on the organic compound layer (14).
    Type: Application
    Filed: February 15, 2012
    Publication date: February 20, 2014
    Applicant: SHOWA DENKO K.K.
    Inventors: Kanjiro Sako, Kyousuke Masuya, Masaru Tajima, Katsumasa Hirose
  • Patent number: 8652657
    Abstract: Provided is an organic EL device comprising: an organic EL element including an anode 114, an organic EL layer 116, and a cathode 117; a wiring layer 106 that supplies power to the anode 114; and an organic layer 111 interposed between the anode 114 and the wiring layer 106, wherein the organic layer 111 includes (i) a first organic layer 112 including an azatriphenylene derivative and (ii) a second organic layer 113 including an amine-based compound, the first organic layer 112 being layered on the wiring layer 106, and the second organic layer 113 being layered on the first organic layer 112.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: February 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Masaomi Shibata, Kenji Okumoto, Kouhei Koresawa
  • Patent number: 8653506
    Abstract: An organic electroluminescence device includes: a first electrode layer; an insulating film arranged on the first electrode layer; an organic layer that is arranged on the insulating film, and is in contact with the first electrode layer at an opening portion provided in the insulating film; a second electrode layer arranged on the organic layer; and a metal layer that is in contact with an end surface of the organic layer and an end surface of the second electrode layer, and is arranged on the second electrode layer.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: February 18, 2014
    Assignee: Rohm Co., Ltd.
    Inventor: Noriyuki Shimoji
  • Patent number: 8652861
    Abstract: HPC techniques are applied to the screening and evaluating the materials, process parameters, process sequences, and post deposition treatment processes for the development of ohmic contact stacks for optoelectronic devices. Simple test structures are employed for initial screening of basic materials properties of candidate materials for each layer within the stack. The use of multiple site-isolated regions on a single substrate allows many material and/or process conditions to be evaluated in a timely and cost effective manner. Interactions between the layers as well as interactions with the substrate can be investigated in a straightforward manner.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: February 18, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Philip Kraus, Sandeep Nijhawan
  • Patent number: 8653501
    Abstract: Provided is an emitting device which is capable of improving the luminous efficiency of an emitting layer formed using a group IV semiconductor material and obtaining an emission spectrum having a narrow band, and a manufacturing method therefor. The emitting device comprises: an emitting layer having a potential confinement structure, comprising: a well region comprising a group IV semiconductor material; and a barrier region being adjacent to the well region and comprising a group IV semiconductor material which is different from the group IV semiconductor material in the well region, wherein: a continuous region from the well region over an interface between the well region and the barrier region to a part of the barrier region comprises fine crystals; and a region in the barrier region, which is other than the continuous region comprising the fine crystals, is amorphous or polycrystalline region.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: February 18, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuya Takeuchi, Tatsuro Uchida, Mitsuhiro Ikuta
  • Publication number: 20140042423
    Abstract: An organic EL element including: an anode and a cathode disposed to face each other with a gap therebetween; a functional layer that contains an organic material and is disposed between the anode and the cathode; and an electron injection layer that has a function to inject electrons into the functional layer and is disposed between the anode and the cathode. The electron injection layer contains a metal oxide with d0 electron configuration, and a Fermi level of the electron injection layer is located in a vicinity of a lower end of a conduction band of the electron injection layer.
    Type: Application
    Filed: September 4, 2012
    Publication date: February 13, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Satoru Ohuchi, Shinya Fujimura, Hirofumi Fujita, Thanh Kinh Luan Dao, Takahiro Komatsu
  • Publication number: 20140042428
    Abstract: A display apparatus includes a base substrate and a buffer layer disposed on the base substrate. The display apparatus further includes an oxide semiconductor layer disposed on the buffer layer and including a source electrode, a drain electrode, and a channel portion. The display apparatus further includes a gate insulating layer disposed on the channel portion, a gate electrode disposed on the gate insulating layer, and a protective layer disposed on the gate electrode and the buffer layer and having a contact hole. The display apparatus further includes a transparent electrode overlapping a portion of the protective layer and electrically connected to one of the source electrode and the drain electrode through the contact hole. The transparent electrode includes a transparent metal layer and a transparent conductive oxide layer overlapping the transparent metal layer.
    Type: Application
    Filed: December 4, 2012
    Publication date: February 13, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: HONGLONG NING, Byeong-Beom KIM, Kyungseop KIM, JOONYONG PARK, CHANGOH JEONG, SANGWON SHIN, Dongmin LEE
  • Patent number: 8647905
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: February 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Harada, Toshiki Hikosaka, Tomonari Shioda, Koichi Tachibana, Hajime Nago, Shinya Nunoue
  • Patent number: 8647906
    Abstract: A method of manufacturing a light emitting device, the method including: disposing a semiconductor light emitting element including a semiconductor layer that emits a primary light on a mounting substrate; covering the semiconductor light emitting element with a transparent medium containing fluorescent material particles that absorb a part of the primary light and emits a secondary light having a wavelength longer than that of the primary light and scattering particles having a mean particle size D that satisfies the inequality 20 nm<D?0.4×?/?, where ? is the wavelength of the primary light propagating in the transparent medium; and precipitating the fluorescent material particles so as to form a fluorescent layer where the fluorescent material particles are mainly dispersed in the transparent medium and a scattering layer where the scattering particles are mainly dispersed in the transparent medium.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: February 11, 2014
    Assignee: Nichia Corporation
    Inventor: Masatsugu Ichikawa
  • Patent number: 8647904
    Abstract: Provided is a method for manufacturing a nitride semiconductor device, including the steps of: forming an AlNO buffer layer containing at least aluminum, nitrogen, and oxygen on a substrate; and forming a nitride semiconductor layer on the AlNO buffer layer, wherein, in the step of forming the AlNO buffer layer, the AlNO buffer layer is formed by a reactive sputtering method using aluminum as a target in an atmosphere to and from which nitrogen gas and oxygen gas are continuously introduced and exhausted, and the atmosphere is an atmosphere in which a ratio of a flow rate of the oxygen gas to a sum of a flow rate of the nitrogen gas and the flow rate of the oxygen gas is not more than 0.5%.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: February 11, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiro Araki, Takaaki Utsumi, Masahiko Sakata
  • Publication number: 20140034920
    Abstract: The present invention relates to an organic light emitting device and a method for preparing the same. An organic light emitting device according to the present invention comprises an organic light emitting unit having a structure in which a substrate, a first electrode, an organic material layer, and a second electrode are sequentially laminated, wherein the organic light emitting device comprises an auxiliary electrode and a fuse pattern; and the first electrode and the auxiliary electrode are electrically connected to each other through the fuse pattern.
    Type: Application
    Filed: May 31, 2013
    Publication date: February 6, 2014
    Inventors: Jung Hyoung Lee, Minsoo Kang, Ducksu Oh
  • Publication number: 20140038334
    Abstract: An embodiment is a method to induce flaw formation in nitride semiconductors. Regions of a thin film structure are selectively decomposed within a thin film layer at an interface with a substrate to form flaws in a pre-determined pattern within the thin film structure. The flaws locally concentrate stress in the pre-determined pattern during a stress-inducing operation. The stress-inducing operation is performed. The stress-inducing operation causes the thin film layer to fracture at the pre-determined pattern.
    Type: Application
    Filed: October 10, 2013
    Publication date: February 6, 2014
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Clifford F. Knollenberg, William S. Wong, Christopher L. Chua
  • Publication number: 20140034917
    Abstract: An organic layer deposition assembly, an organic layer deposition apparatus, an organic light-emitting display apparatus, and a method of manufacturing the organic light-emitting display apparatus, in order to improve a characteristic of a deposited layer, the organic layer deposition assembly including a deposition source for discharging a deposition material; a deposition source nozzle unit disposed at a side of the deposition source, and including a plurality of deposition source nozzles; and a patterning slit sheet disposed while facing the deposition source nozzle unit, and including a plurality of patterning slits and one or more alignment confirmation pattern slits that are formed at edge portions of the plurality of patterning slits, wherein the deposition material that is discharged from the deposition source passes through the patterning slit sheet and then is formed on the substrate, while a deposition process is performed.
    Type: Application
    Filed: March 11, 2013
    Publication date: February 6, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myung-Ki Lee, Sung-Bong Lee, Dong-Seob Jeong, Mu-Hyun Kim
  • Publication number: 20140038333
    Abstract: A display device includes a substrate, a first conductive film pattern including a gate electrode and a first capacitor electrode on the substrate, a gate insulating layer pattern on the first conductive film pattern, a polycrystalline silicon film pattern including an active layer and a second capacitor electrode on the gate insulating layer pattern, an interlayer insulating layer on the polycrystalline silicon film pattern, a plurality of first contact holes through the gate insulating layer pattern and the interlayer insulating layer to expose a portion of the first conductive film pattern, a plurality of second contact holes through the interlayer insulating layer to expose a portion of the polycrystalline silicon film pattern, and a second conductive film pattern including a source electrode, a drain electrode, and a pixel electrode on the interlayer insulating layer.
    Type: Application
    Filed: October 8, 2013
    Publication date: February 6, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Min-Chul Shin, Jong-Moo Huh, Bong-Ju Kim, Yun-Gyu Lee
  • Patent number: 8642993
    Abstract: A III-nitride film, grown on an m-plane substrate, includes multiple quantum wells (MQWs) with a barrier thickness of 27.5 nm or greater and a well thickness of 8 nm or greater. An emission wavelength can be controlled by selecting the barrier thickness of the MQWs. Device fabricated using the III-nitride film include nonpolar III-nitride light emitting diodes (LEDs) with a long wavelength emission.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: February 4, 2014
    Assignee: The Regents of the University of California
    Inventors: Hisashi Yamada, Kenji Iso, Shuji Nakamura
  • Patent number: 8643004
    Abstract: With a non-linear element (e.g., a diode) with small reverse saturation current, a power diode or rectifier is provided. A non-linear element includes a first electrode provided over a substrate, an oxide semiconductor film provided on and in contact with the first electrode and having a concentration of hydrogen of 5×1019 atoms/cm3 or less, a second electrode provided on and in contact with the oxide semiconductor film, a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode, and third electrodes provided in contact with the gate insulating film and facing each other with the first electrode, the oxide semiconductor film, and the second electrode interposed therebetween or a third electrode provided in contact with the gate insulating film and surrounding the second electrode. The third electrodes are connected to the first electrode or the second electrode. With the non-linear element, a power diode or a rectifier is formed.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: February 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8642361
    Abstract: A method for large scale manufacture of photovoltaic devices includes loading a substrate into a load lock station and transferring the substrate in a controlled ambient to a first process station. The method includes using a first physical deposition process in the first process station to cause formation of a first conductor layer overlying the surface region of the substrate. The method includes transferring the substrate to a second process station, and using a second physical deposition process in the second process station to cause formation of a second layer overlying the surface region of the substrate. The method further includes repeating the transferring and processing until all thin film materials of the photovoltaic devices are formed. In an embodiment, the invention also provides a method for large scale manufacture of photovoltaic devices including feed forward control.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: February 4, 2014
    Assignee: Stion Corporation
    Inventors: Howard W. H. Lee, Chester A. Farris, III
  • Patent number: 8642368
    Abstract: The embodiments of the present invention generally relates to methods for enhancing the light extraction by surface roughening of the bottom n-GaN layer and/or top p-GaN layer so that the internal light from the active region is scattered outwardly to result in a higher external quantum efficiency. In one embodiment, a surface roughening process is performed on the n-GaN layer to form etching pits in a top surface of the n-GaN layer. Once the etching pits are formed, growth of the n-GaN material may be resumed on the roughened n-GaN layer to partially fill the etching pits, thereby forming air voids at the interface of the n-GaN layer and the subsequent, re-growth n-GaN layer. These air voids provide one or more localized regions with indices of reflection different from that of the n-GaN layer, such that the internal light generated by the active layers (e.g., the InGaN MQW layer), when passing through the n-GaN layer, is scattered by voids or bubbles.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: February 4, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Jie Su
  • Publication number: 20140030837
    Abstract: A method of fabricating a gallium nitride (GaN)-based semiconductor device. The method includes preparing a GaN substrate having lower and upper surfaces; growing GaN-based semiconductor layers on the upper surface of the GaN substrate to form a semiconductor stack; forming a support substrate on the semiconductor stack; and separating the GaN substrate from the semiconductor stack. The separating of the GaN substrate includes irradiating a laser from the lower surface of the GaN substrate. The laser is transmitted through the lower surface of the GaN substrate and forms a laser absorption region inside a structure consisting of the GaN substrate and the semiconductor stack.
    Type: Application
    Filed: July 25, 2013
    Publication date: January 30, 2014
    Applicant: Seoul Opto Device Co., Ltd.
    Inventors: Tae Hyuk IM, Chang Yeon Kim, Young Wug Kim
  • Publication number: 20140030836
    Abstract: A method of fabricating an electronic device includes providing a silicon carbide or diamond-like carbon donor body and implanting ions into a first surface of the donor body to define a cleave plane. After implanting, an epitaxial layer is formed on the first surface, and a temporary carrier is coupled to the epitaxial layer. A lamina is cleaved from the donor body at the cleave plane, and the temporary carrier is removed from the lamina. In some embodiments a light emitting diode or a high electron mobility transistor is fabricated from the lamina and epitaxial layer.
    Type: Application
    Filed: July 26, 2012
    Publication date: January 30, 2014
    Applicant: Twin Creeks Technologies, Inc.
    Inventors: Venkatesan Murali, Steve Babayan, Christopher J. Petti
  • Publication number: 20140027808
    Abstract: A Si-based light emitting diode structure and a method for fabricating the Si-based light emitting diode structure are each predicated upon a multilayer material layer that comprises alternating, interposed and laminated sub-layers of: (1) a group IV nanocrystal material; and (2) an erbium or neodymium doped dielectric material. The light emitting diode structure is preferably laterally actuated to provide both efficient photoluminescence and electroluminescence. The group IV nanocrystal material may comprise a silicon nanocrystal material and the doped dielectric material may comprise an erbium doped silicon oxide material.
    Type: Application
    Filed: July 25, 2013
    Publication date: January 30, 2014
    Applicant: UNIVERSITY OF ROCHESTER
    Inventors: Karl S. Ni, Halina Krzyzanowska, Yijing Fu, Philippe M. Fauchet
  • Patent number: 8637336
    Abstract: A method of producing a semiconductor wafer, which includes: placing a wafer (10) provided with a substrate (11) and a semiconductor layer (20) formed thereon, on a carrier plate (fixing plate) (31) of a grinder via fixing wax (33a and 33b) such that the surface (10a) to be ground faces upward; heating the carrier plate to soften the fixing wax; pressure-contacting the wafer from the side of the surface (10a) to be ground using an air bag such that a portion of the softened fixing wax spreads and protrudes from the peripheral edge of the wafer; cooling the carrier plate while applying pressure to cure the fixing wax and fix the wafer onto the carrier plate; and rotating the surface (10a) to be ground of the fixed wafer while pressure-contacting the surface (10a) to the grinding plate of the grinder, thereby grinding the surface (10a) to be ground.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: January 28, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Susumu Sugano
  • Patent number: 8637334
    Abstract: A high brightness III-Nitride based Light Emitting Diode (LED), comprising multiple surfaces covered by Zinc Oxide (ZnO) layers, wherein the ZnO layers are grown in a low temperature aqueous solution and each have a (0001) c-orientation and a top surface that is a (0001) plane.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: January 28, 2014
    Assignee: The Regents of the University of California
    Inventors: Daniel B. Thompson, Jacob J. Richardson, Ingrid Koslow, Jun Seok Ha, Steven P. DenBaars, Shuji Nakamura, Maryann E. Lange
  • Publication number: 20140021462
    Abstract: A method for manufacturing an organic electroluminescent element comprising an anode and a cathode on/over a base, and at least three organic layers between the anode and the cathode, may include forming at least one of the organic layers by a method including applying an application liquid for the organic layer comprising a material for forming the organic layer and a solvent on the anode, the cathode or the organic layer; and heating the organic layer after the applying so as to remove 90% by mass or more of the solvent in the application liquid for the organic layer within two seconds.
    Type: Application
    Filed: March 30, 2012
    Publication date: January 23, 2014
    Applicant: KONICA MINOLTA, INC.
    Inventors: Yoshiyuki Suzuri, Shuri Sato, Satoru Oohisa, Kazuo Genda
  • Publication number: 20140024159
    Abstract: Optoelectronic devices, such as light-emitting diodes, laser diodes, image sensors, optical detectors, etc., made by depositing (growing) one or more epitaxial semiconductor layers on a monocrystalline lamellar/layered substrate so that each layer has a wurtzite crystal structure. In some embodiments, the layers are deposited and then one or more lamellas of the starting substrate are removed from the rest of the substrate. In one subset of such embodiments, the removed lamella(s) is/are partially or entirely removed. In other embodiments, one or more lamellas of the starting substrate are removed prior to depositing the one or more wurtzite-crystal-structure-containing layer(s).
    Type: Application
    Filed: February 9, 2012
    Publication date: January 23, 2014
    Applicant: VERLASE TECHNOLOGIES LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 8633476
    Abstract: An organic light-emitting device including: an anode; a hole charging layer (HCL) comprising an oxide semiconductor and formed on the anode; at least one organic layer formed on the HCL; and a cathode formed on the organic layer. The HCL may be an oxide semiconductor including indium (In), gallium (Ga), and zinc (Zn), or an oxide semiconductor including In, Zn, and hafnium (Hf).
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: January 21, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Mu-Gyeom Kim, Chang-Mo Park
  • Patent number: 8633475
    Abstract: An organic electroluminescence device includes: an anode; a cathode opposed to the anode; and a plurality of emitting units including at least a first emitting unit and a second emitting unit. The plurality of emitting units each includes: an emitting layer; and an intermediate unit between the first emitting unit and the second emitting unit. The intermediate unit includes an electron injecting layer, a zinc oxide layer and a hole injecting layer in this sequence from the anode. The electron injecting layer contains an electron donating material and is adjacent to the first emitting unit. The hole injecting layer contains an organic electron accepting material and is adjacent to the second emitting unit.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: January 21, 2014
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Jun Endo, Chishio Hosokawa
  • Patent number: 8633508
    Abstract: A semiconductor device according to the embodiment includes a growth substrate; a first buffer layer having a compositional formula of RexSiy (0?x?2, 0?y?2) over the growth substrate; and a group III nitride-based epitaxial semiconductor layer having a compositional formula of InxAlyGa1-x-yN (0?x, 0?y, x+y?1) over the first buffer layer.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: January 21, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: June O Song
  • Patent number: 8633495
    Abstract: There is provided a nitride semiconductor light emitting device. The nitride semiconductor light emitting device comprises a first nitride semiconductor layer including amorphous powder, an active layer on the first nitride semiconductor layer, and a second nitride semiconductor layer on the active layer.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: January 21, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hee-Jin Kim
  • Patent number: 8633046
    Abstract: Provided are a semiconductor light-emitting element that is capable of efficiently outputting blue color or ultraviolet light, and a lamp using the semiconductor light-emitting element. The semiconductor light-emitting element is obtained by a manufacturing method that, when manufacturing the semiconductor light-emitting element that comprises a compound semiconductor layer that includes at least a p-type semiconductor layer, and a transparent electrode that is provided on the p-type semiconductor layer, includes a step of forming a film comprising an oxide of indium and gallium, or forming a film comprising an oxide of indium, gallium and tin, in an amorphous state on the p-type semiconductor layer, so as to form a transparent conductive film, followed by a step of performing an annealing process on the transparent conductive film at a temperature of 200° C. to 480° C.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: January 21, 2014
    Assignee: Sumitomo Metal Mining Co., Ltd.
    Inventors: Tokuyuki Nakayama, Yoshiyuki Abe
  • Publication number: 20140014924
    Abstract: An organic light emitting display apparatus includes: a substrate; an insulation layer on the substrate and including first regions that are arranged along a first direction and second regions that are adjacent to the first regions and are arranged along the first direction; first lines on the insulation layer to cover the first regions and including first organic light-emitting layers; and second lines on the insulation layer to cover the second regions and including second organic light-emitting layers different from the first organic light-emitting layers. A portion of the first regions and a portion of the second regions facing each other are not parallel to the first direction.
    Type: Application
    Filed: May 23, 2013
    Publication date: January 16, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Eon-Seok Oh, Seung-Wook Chang, Young-Hee Lee
  • Publication number: 20140014911
    Abstract: The present invention relates to a LED (light-emitting diode) phosphor and fabricating method thereof, and particularly relates to a LED phosphor having a light-emitting thin film (or photoluminescence thin film) made of an organic material and a zinc oxide microstructure (or nanostructure) and a method for fabricating the LED phosphor by hydrothermal method and combination of the organic material and the zinc oxide microstructure (or nanostructure). In this invention, the light-emitting thin film (or photoluminescence thin film) made of the organic material and the zinc oxide microstructure (or nanostructure) is applied instead of rare earth elements to fabricate the LED phosphor. Therefore, the cost of the LED phosphor and the white LED can be reduced and the processes for fabricating the LED phosphor and the white LED can be simplified.
    Type: Application
    Filed: December 27, 2012
    Publication date: January 16, 2014
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: CHING-FUH LIN, MING-SHIUN LIN
  • Publication number: 20140014929
    Abstract: An organic layer deposition apparatus, a method of manufacturing an organic light-emitting display apparatus by using the same, and an organic light-emitting display apparatus manufactured using the method. The organic layer deposition apparatus includes a conveyer unit including first and second conveyer units, loading and unloading units, and a deposition unit. A transfer unit moves between the first and second conveyer units, and the substrate attached to the transfer unit is spaced from a plurality of organic layer deposition assemblies of the deposition unit while being transferred by the first conveyer unit. The organic layer deposition assemblies include common layer deposition assemblies and pattern layer deposition assemblies.
    Type: Application
    Filed: July 9, 2013
    Publication date: January 16, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Su-Hwan Lee, Un-Cheol Sung, Chae-Woong Kim, Young-Mook Choi