Heterojunction Patents (Class 438/47)
  • Publication number: 20130277669
    Abstract: The present invention provides: a method of preparing a coating ink for forming a zinc oxide electron transport layer, comprising mixing zinc acetate and a wetting agent in water or methanol; a coating ink comprising zinc acetate and a wetting agent in aqueous solution or methanolic solution; a method of preparing a zinc oxide electron transporting layer, which method comprises: i) coating a substrate with the coating ink of the present invention to form a film; ii) drying the film; and iii) heating the dry film to convert the zinc acetate substantially to ZnO; a method of preparing an organic photovoltaic device or an organic LED having a zinc oxide electron transport layer, the method comprising, in this order: a) providing a substrate bearing a first electrode layer; b) forming an electron transport layer according to the following method: i) coating a coating ink comprising an ink according to the present invention to form a film; ii) drying the film; iii) heating the dry film such that the zinc acetate i
    Type: Application
    Filed: September 27, 2011
    Publication date: October 24, 2013
    Applicant: The Technical University of Denmark
    Inventors: Frederik Christian Krebs, Roar Søndergard, Kion Norrman, Mikkel Jorgensen
  • Patent number: 8563992
    Abstract: A light emitting apparatus includes a belt-like substrate, a light emitting element mounted on the substrate, and a luminous flux control member mounted on the substrate. The substrate has a pair of fracture surfaces formed at predetermined intervals along a lengthwise direction and formed at both ends in a widthwise direction between luminous flux control members neighboring each other along the lengthwise direction, wherein dimensions W1 and W2 in the widthwise direction between the pair of fracture surfaces are less than a dimension in the widthwise direction of the luminous flux control member, and the dimension W2 in the widthwise direction of a part overlapping the luminous flux control member in a plan view is less than the dimension W1 in the widthwise direction between the pair of fracture surfaces.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: October 22, 2013
    Assignee: Enplas Corporation
    Inventors: Hideaki Kato, Yasutaka Higuchi
  • Publication number: 20130270519
    Abstract: A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.
    Type: Application
    Filed: April 16, 2013
    Publication date: October 17, 2013
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Wenhong Sun, Alexander Dobrinsky, Maxim S Shatalov, Jinwei Yang, Michael Shur, Remigijus Gaska
  • Publication number: 20130273680
    Abstract: To provide a light-emitting element, a light-emitting device, and an electronic device each fowled using the organometallic complex represented by General Formula (G1) as a guest material and a low molecule compound as a host material.
    Type: Application
    Filed: June 7, 2013
    Publication date: October 17, 2013
    Inventors: Hideko INOUE, Nobuharu OHSAWA, Satoshi SEO
  • Publication number: 20130273681
    Abstract: A light emitting device having auto-cloning photonic crystal structures comprises a substrate, a first semiconductor layer, an active emitting layer, a second semiconductor layer and a saw-toothed multilayer film comprising auto-cloning photonic crystal structures. The saw-toothed multilayer film provides a high reflection interface and a diffraction mechanism to prevent total internal reflection and enhance light extraction efficiency. The manufacturing method of the light emitting device having auto-cloning photonic crystal structures is presented here.
    Type: Application
    Filed: June 7, 2013
    Publication date: October 17, 2013
    Inventors: Shiuh CHAO, Hao-Min KU, Chen-Yang HUANG
  • Publication number: 20130272323
    Abstract: Methods and apparatus for generating terahertz radiation are disclosed herein. In addition, methods for forming orientation-patterned nonlinear semiconductor crystals are disclosed herein. For example, according to an example implementation, a method for generating terahertz radiation may include: providing an optical pulse having a wavelength less than approximately 1.0 ?m; and illuminating an orientation-patterned nonlinear semiconductor crystal with the optical pulse.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 17, 2013
    Applicant: Board of Trustees of the University of Alabama
    Inventors: Seongsin Kim, Patrick Kung
  • Patent number: 8557622
    Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: October 15, 2013
    Assignee: STC.UNM
    Inventors: Seung Chang Lee, Steven R. J. Brueck
  • Patent number: 8551797
    Abstract: A method for fabricating a semiconductor laser includes: sequentially forming a cladding layer of a first conductivity type, an active layer, a cladding layer of a second conductivity type, and a contact layer of the second conductivity type on a semiconductor substrate; forming a promotion film which contacts the contact layer only in a window region proximate an end plane of the semiconductor laser and absorbs group-III atoms from the contact layer to promote generation of group-III vacancies; implanting ions into the contact layer in the window region to damage the contact layer in the window region; and after forming the promotion film and implanting the ions, heat treating so that the group-III vacancies are diffused and the active layer is disordered in the window region and forms a window structure.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: October 8, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shinji Abe
  • Publication number: 20130256629
    Abstract: Graphene semiconductor device, a method of manufacturing a graphene semiconductor device, an organic light emitting display and a memory, include forming a multilayered member including a sacrificial substrate, a sacrificial layer, and a semiconductor layer deposited in sequence, forming a transfer substrate on the semiconductor layer, forming a first laminate including the transfer substrate and the semiconductor layer by removing the sacrificial layer to separate the sacrificial substrate from the semiconductor layer, forming a second laminate by forming a graphene layer on a base substrate, combining the first laminate and the second laminate such that the semiconductor layer contacts the graphene layer, and removing the transfer substrate.
    Type: Application
    Filed: June 14, 2012
    Publication date: October 3, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang Seung LEE, Young Bae KIM, Young Jun YUN, Yong Sung KIM, David SEO, Joo Ho LEE
  • Publication number: 20130259080
    Abstract: An epitaxial structure for a III-Nitride based optical device, comprising an active layer with anisotropic strain on an underlying layer, where a lattice constant and strain in the underlying layer are partially or fully relaxed in at least one direction due to a presence of misfit dislocations, so that the anisotropic strain in the active layer is modulated by the underlying layer.
    Type: Application
    Filed: May 29, 2013
    Publication date: October 3, 2013
    Inventors: Hiroaki Ohta, Feng Wu, Anurag Tyagi, Arpan Chakraborty, James S. Speck, Steven P. DenBaars, Shuji Nakamura, Erin C. Young
  • Publication number: 20130256687
    Abstract: A group III nitride compound semiconductor light emitting device that inhibits occurrence of dislocation in a strain relaxation layer in forming a group III nitride compound semiconductor layer on a thin GaN substrate, and a method for producing the same are provided. A light emitting device 100 comprises a support substrate 10, a GaN substrate 20, an n-type contact layer 30, a strain relaxation layer 40 (n-type InGaN layer), a light emitting layer 50, a p-type clad layer 60, and a p-type contact layer 70. The GaN substrate 20 has a thickness in a range of from 10 nm to 10 ?m. The strain relaxation layer 40 (n-type InGaN layer) has an In composition ratio X in a range of from larger than 0 to 3%.
    Type: Application
    Filed: March 4, 2013
    Publication date: October 3, 2013
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Yoshiki SAITO, Yasuhisa USHIDA, Masato AOKI
  • Publication number: 20130260502
    Abstract: A method for making a light emitting diode includes the following steps. A substrate having a first epitaxial growth surface is provided. A carbon nanotube layer is placed on the first epitaxial growth surface of the substrate. A surface of the first semiconductor layer is exposed by removing the substrate and the carbon nanotube layer. The surface of the first semiconductor layer is defined as a second epitaxial growth surface. An active layer and a second semiconductor layer are grown on the second epitaxial growth surface in that order. A surface of the active layer contacted the first semiconductor layer engages with the second epitaxial growth surface. A part of the first semiconductor layer is exposed by etching a part of the active layer and the second semiconductor layer. A first electrode is applied on the first semiconductor layer and a second electrode is applied on the second semiconductor layer.
    Type: Application
    Filed: December 28, 2012
    Publication date: October 3, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YANG WEI, SHOU-SHAN FAN
  • Publication number: 20130259079
    Abstract: A III-nitride based quantum dot (QD) laser is formed of InGaN/GaN quantum dots and capable emitting at a single wavelength within the visible region, including the violet wavelength region (400-440 nm), the blue wavelength region (440-490 nm), the green wavelength region (490-570 nm), the yellow wavelength region (570-590 nm), the orange wavelength region (590-620 nm), and the red wavelength region (620-700 nm), with varying composition as described.
    Type: Application
    Filed: December 20, 2012
    Publication date: October 3, 2013
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventor: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
  • Patent number: 8546166
    Abstract: Toward making available III nitride crystal substrates advantageously employed in light-emitting devices, and light-emitting devices incorporating the substrates and methods of manufacturing the light-emitting devices, a III nitride crystal substrate has a major face whose surface area is not less than 10 cm2 and, in a major-face principal region excluding the peripheral margin of the major face from its outer periphery to a 5 mm separation from its outer periphery, the total dislocation density is from 1×104 cm?2 to 3×106 cm?2, and the ratio of screw-dislocation density to the total dislocation density is 0.5 or greater.
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: October 1, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke Fujiwara, Hiroaki Yoshida
  • Patent number: 8546167
    Abstract: A nitride-based semiconductor light-emitting element includes an n-GaN layer 102, a p-GaN layer 107, and a GaN/InGaN multi-quantum well active layer 105, which is interposed between the n- and p-GaN layers 102 and 107. The GaN/InGaN multi-quantum well active layer 105 is an m-plane semiconductor layer, which includes an InxGa1-xN (where 0<x<1) well layer 104 that has a thickness of 6 nm or more and 17 nm or less, and oxygen atoms included in the GaN/InGaN multi-quantum well active layer 105 have a concentration of 3.0×1017 cm?3 or less.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Ryou Kato, Shunji Yoshida, Toshiya Yokogawa
  • Patent number: 8546157
    Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: October 1, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Atul Gupta, Nicholas P. T. Bateman
  • Patent number: 8546163
    Abstract: Provided is a group-III nitride semiconductor laser device with a laser cavity allowing for a low threshold current, on a semipolar surface of a support base in which the c-axis of a hexagonal group-III nitride is tilted toward the m-axis. First and second fractured faces 27, 29 to form the laser cavity intersect with an m-n plane. The group-III nitride semiconductor laser device 11 has a laser waveguide extending in a direction of an intersecting line between the m-n plane and the semipolar surface 17a. In a laser structure 13, a first surface 13a is opposite to a second surface 13b. The first and second fractured faces 27, 29 extend from an edge 13c of the first surface to an edge 13d of the second surface 13b. The fractured faces are not formed by dry etching and are different from conventionally-employed cleaved facets such as c-planes, m-planes, or a-planes.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: October 1, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Yohei Enya, Takashi Kyono, Masahiro Adachi, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Shinji Tokuyama, Koji Katayama, Takao Nakamura, Takatoshi Ikegami
  • Publication number: 20130248816
    Abstract: A light emitting diode (LED) die includes a semiconductor substrate having an n-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the n-type confinement layer configured to emit electromagnetic radiation, a p-type confinement layer in electrical contact with the multiple quantum well (MQW) layer; multiple light extraction structures on the n-type confinement layer configured to scatter the electromagnetic radiation; and an electrode in a recess embedded in the n-type confinement layer proximate to the light extraction structures. A method of fabrication includes: forming the semiconductor substrate; forming a recess in the n-type confinement layer having sidewalls and a planar bottom surface; forming an electrode in the recess comprising a conductive material conforming to the sidewalls and to the bottom surface of the recess; planarizing the electrode; and forming a plurality of light extraction structures in the n-type confinement layer proximate to the electrode.
    Type: Application
    Filed: March 22, 2012
    Publication date: September 26, 2013
    Inventors: Jiunn-Yi CHU, Trung TRI DOAN
  • Publication number: 20130252365
    Abstract: Solid state lighting devices grown on semi-polar facets and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (“GaN”) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (“InGaN”)/GaN multi quantum well (“MQW”) active region directly between the N-type GaN material and the P-type GaN material. At least one of the N-type GaN, InGaN/GaN MQW, and P-type GaN materials is grown a semi-polar sidewall.
    Type: Application
    Filed: May 20, 2013
    Publication date: September 26, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Lifang Xu, Zaiyuan Ren
  • Patent number: 8541252
    Abstract: The use of an abbreviated GaN growth mode on nano-patterned AGOG sapphire substrates, which utilizes a process of using 15 nm low temperature GaN buffer and bypassing etch-back and recovery processes during epitaxy, enables the growth of high-quality GaN template on nano-patterned AGOG sapphire. The GaN template grown on nano-patterned AGOG sapphire by employing abbreviated growth mode has two orders of magnitude lower threading dislocation density than that of conventional GaN template grown on planar sapphire. The use of abbreviated growth mode also leads to significant reduction in cost of the epitaxy. The growths and characteristics of InGaN quantum wells (QWs) light emitting diodes (LEDs) on both templates were compared. The InGaN QWs LEDs grown on the nano-patterned AGOG sapphire demonstrated at least a 24% enhancement of output power enhancement over that of LEDs grown on conventional GaN templates.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: September 24, 2013
    Assignee: Lehigh University
    Inventors: Nelson Tansu, Helen M. Chan, Richard P. Vinci, Yik-Khoon Ee, Jeffrey Biser
  • Patent number: 8541803
    Abstract: Disclosed re-emitting semiconductor constructions (RSCs) may provide full-color RGB or white-light emitting devices that are free of cadmium. Some embodiments may include a potential well that comprises a III-V semiconductor and that converts light of a first photon energy to light of a smaller photon energy, and a window that comprises a II-VI semiconductor having a band gap energy greater than the first photon energy. Some embodiments may include a potential well that converts light having a first photon energy to light having a smaller photon energy and that comprises a II-VI semiconductor that is substantially Cd-free. Some embodiments may include a potential well that comprises a first III-V semiconductor and that converts light having a first photon energy to light having a smaller photon energy, and a window that comprises a second III-V semiconductor and that has a band gap energy greater than the first photon energy.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: September 24, 2013
    Assignee: 3M Innovative Properties Company
    Inventors: Terry L. Smith, Michael A. Haase, Thomas J. Miller, Xiaoguang Sun
  • Patent number: 8541253
    Abstract: A method of fabricating a III-nitride semiconductor laser device includes: preparing a substrate with a semipolar primary surface, the semipolar primary surface including a hexagonal III-nitride semiconductor; forming a substrate product having a laser structure, an anode electrode, and a cathode electrode, the laser structure including a substrate and a semiconductor region, and the semiconductor region being formed on the semipolar primary surface; after forming the substrate product, forming first and second end faces; and forming first and second dielectric multilayer films for an optical cavity of the nitride semiconductor laser device on the first and second end faces, respectively.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: September 24, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Yohei Enya, Takashi Kyono, Masahiro Adachi, Shinji Tokuyama, Takamichi Sumitomo, Masaki Ueno, Takatoshi Ikegami, Koji Katayama, Takao Nakamura
  • Publication number: 20130240831
    Abstract: The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicant: TSMC Solid State Lighting, Ltd.
    Inventors: Ming-Hua Lo, Zhen-Yu Li, Hsing-Kuo Hsia, Hao-Chung Kuo
  • Publication number: 20130244364
    Abstract: In a method according to embodiments of the invention, a III-nitride layer is grown on a growth substrate. The III-nitride layer is connected to a host substrate. The growth substrate is removed. The growth substrate is a non-III-nitride material. The growth substrate has an in-plane lattice constant a substrate. The III-nitride layer has a bulk lattice constant a layer. In some embodiments, [(|a substrate?a layer|)/asubstrate]*100% is no more than 1%.
    Type: Application
    Filed: October 26, 2011
    Publication date: September 19, 2013
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Nathan Frederick Gardner, Melvin Barker McLaurin, Michael Jason Grundmann, Werner Goetz, John Edward Epler, Qi Ye
  • Patent number: 8536595
    Abstract: Solid state lighting (“SSL”) devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device also includes a contact on one of the first or second semiconductor materials. The contact includes a first conductive material and a plurality of contact elements in contact with one of the first or second conductive materials. The contact elements individually include a portion of a second conductive material that is different from the first conductive material.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: September 17, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Martin F. Schubert
  • Publication number: 20130234110
    Abstract: A gallium nitride based compound semiconductor light-emitting element according to an embodiment of the present disclosure includes: an n-type gallium nitride based compound semiconductor layer; a p-type gallium nitride based compound semiconductor layer; and an active layer which is arranged between the n- and p-type gallium nitride based compound semiconductor layers. The active layer and the p-type gallium nitride based compound semiconductor layer are m-plane semiconductor layers. The p-type gallium nitride based compound semiconductor layer includes magnesium at a concentration of 2.0×1018 cm?3 to 2.5×1019 cm?3 and oxygen, of which the concentration is 5% to 15% of the concentration of the magnesium.
    Type: Application
    Filed: April 23, 2013
    Publication date: September 12, 2013
    Applicant: Panasonic Corporation
    Inventors: Ryou KATO, Shunji YOSHIDA, Songbaek CHOE, Toshiya YOKOGAWA
  • Publication number: 20130234179
    Abstract: A nitride-based semiconductor light-emitting element disclosed in the present application includes: an active layer having a growing plane which is an m-plane and which is made of a GaN-based semiconductor; and at least one radiation surface at which light from the active layer is to be radiated. The radiation surface has a plurality of protrusions on the m-plane. A base of each of the plurality of protrusions is a region inside a closed curve, and a shape of the base has a major axis and a minor axis. An angle between the major axis and an extending direction of an a-axis of a crystal is not more than 45°.
    Type: Application
    Filed: April 23, 2013
    Publication date: September 12, 2013
    Applicant: Panasonic Corporation
    Inventors: Atsushi YAMADA, Akira INOUE, Toshiya YOKOGAWA
  • Patent number: 8530257
    Abstract: Methods for improving the temperature performance of AlInGaP based light emitters. Nitrogen is added to the quantum wells in small quantities. Nitrogen is added in a range of about 0.5 percent to 2 percent. The addition of nitrogen increases the conduction band offset and increases the separation of the indirect conduction band. To keep the emission wavelength in a particular range, the concentration of In in the quantum wells may be decreased or the concentration of Al in the quantum wells may be increased. The net result is an increase in the conduction band offset and an increase in the separation of the indirect conduction band.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: September 10, 2013
    Assignee: Finisar Corporation
    Inventor: Ralph Herbert Johnson
  • Publication number: 20130230938
    Abstract: The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate and formed with reference to the n-type nitride semiconductor layer.
    Type: Application
    Filed: April 1, 2013
    Publication date: September 5, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Won KANG, Yong Chun KIM, Dong Hyun CHO, Jeong Tak OH, Dong Joon KIM
  • Publication number: 20130228745
    Abstract: According to one embodiment, a nitride semiconductor device includes a first layer and a functional layer. The first layer is formed on an amorphous layer, includes aluminum nitride, and has a compressive strain or a tensile strain. The functional layer is formed on the first layer and includes a nitride semiconductor.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 5, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi ONO, Tomonari Shioda, Naoharu Sugiyama, Toshiyuki Oka, Shinya Nunoue
  • Patent number: 8525150
    Abstract: A semiconductor light emission device is disclosed. The semiconductor light emission device includes: a substrate; a current concentration preventing pattern formed in a mesh net shape on the substrate; an n-type clad layer formed on the substrate loaded with the current concentration preventing pattern; an active layer and a p-type clad layer sequentially formed on the n-type clad layer; an n-type electrode formed on a part of the n-type clad layer which is exposed by partially etching the p-type clad layer and active layer; and a p-type electrode formed on the p-type clad layer. The current concentration preventing pattern is formed in a double layer structure which includes a first layer formed from one material of SiO and SiN and on the substrate, and a second layer formed from a metal material and on the first layer.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: September 3, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Min Ki Yoo, Koo Hwa Lee, Rok Hee Lee, Geun Woo Lee
  • Patent number: 8525194
    Abstract: According to one embodiment, a nitride semiconductor device includes a foundation layer and a functional layer. The foundation layer is formed on an Al-containing nitride semiconductor layer formed on a silicon substrate. The foundation layer has a thickness not less than 1 micrometer and including GaN. The functional layer is provided on the foundation layer. The functional layer includes a first semiconductor layer. The first semiconductor layer has an impurity concentration higher than an impurity concentration in the foundation layer and includes GaN of a first conductivity type.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hung Hung, Jongil Hwang, Taisuke Sato, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8525197
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Harada, Toshiki Hikosaka, Tomonari Shioda, Koichi Tachibana, Hajime Nago, Shinya Nunoue
  • Patent number: 8524517
    Abstract: Implementations and techniques for semiconductor light-emitting devices including one or more copper blend I-VII compound semiconductor material barrier layers are generally disclosed.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: September 3, 2013
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventor: Doyeol Ahn
  • Patent number: 8524012
    Abstract: A method for growing planar, semi-polar nitride film on a miscut spinel substrate, in which a large area of the planar, semi-polar nitride film is parallel to the substrate's surface. The planar films and substrates are: (1) {1011} gallium nitride (GaN) grown on a {100} spinel substrate miscut in specific directions, (2) {1013} gallium nitride (GaN) grown on a {110} spinel substrate, (3) {1122} gallium nitride (GaN) grown on a {1100} sapphire substrate, and (4) {1013} gallium nitride (GaN) grown on a {1100} sapphire substrate.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: September 3, 2013
    Assignees: The Regents of the University of California, Japan Science and Technology Agency
    Inventors: Troy J. Baker, Benjamin A. Haskell, Paul T. Fini, Steven P. DenBaars, James S. Speck, Shuji Nakamua
  • Publication number: 20130221326
    Abstract: High bandgap alloys for high efficiency optoelectronics are disclosed. An exemplary optoelectronic device may include a substrate, at least one Al1-xInxP layer, and a step-grade buffer between the substrate and at least one Al1-xInxP layer. The buffer may begin with a layer that is substantially lattice matched to GaAs, and may then incrementally increase the lattice constant in each sequential layer until a predetermined lattice constant of Al1-xInxP is reached.
    Type: Application
    Filed: October 12, 2011
    Publication date: August 29, 2013
    Applicant: Alliance for Substainable Energy, LLC
    Inventors: Kirstin Alberi, Angelo Mascarenhas, Mark Wanlass
  • Publication number: 20130221324
    Abstract: Embodiments of the invention provide a semiconductor light emitting diode having an ohmic electrode structure, and a method of manufacturing the same. The semiconductor light emitting diode includes a light emitting structure having an upper surface constituting an N-face; and an ohmic electrode structure located on the light emitting structure. Here, the ohmic electrode structure includes a lower diffusion preventing layer, a contact layer, an upper diffusion preventing layer, and an Al protective layer from the N-face of the light emitting structure.
    Type: Application
    Filed: August 9, 2011
    Publication date: August 29, 2013
    Applicants: POSTECH ACADEMY-INDUSTRY FOUNDATION, SEOUL OPTO DEVICE CO., LTD.
    Inventors: Jong Lam Lee, Yang Hee Song
  • Patent number: 8518727
    Abstract: An organic light emitting diode (OLED) display device and method of fabrication that includes a substrate having a device region, an outer dam region and an encapsulation region. The encapsulation region includes an inner dam region, an outer dam region and an encapsulation region that correspond to the device region. An encapsulation agent is formed in the encapsulation region of the encapsulation substrate, and filling dams are formed of the same material in the outer dam region and the inner dam region of the encapsulation substrate.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: August 27, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ji-Hun Ryu, Seung-Yong Song, Young-Seo Choi, Oh-June Kwon, Kwan-Hee Lee
  • Patent number: 8519430
    Abstract: An optoelectronic device includes a substrate and a first transition stack formed on the substrate including at least a first transition layer formed on the substrate and having at least one hollow component formed inside the first transition layer, and a second transition layer wherein the second transition layer is an unintentional doped layer or an undoped layer formed on the first transition layer.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: August 27, 2013
    Assignee: Epistar Corporation
    Inventors: Wei-Chih Peng, Min-Hsun Hsieh, Ming-Chi Hsu, Wei-Yu Yen, Chun-Kai Wang, Yen-Chih Chen, Schang-Jing Hon, Hsin-Ying Wang, Chien-Kai Chung
  • Publication number: 20130214251
    Abstract: The present invention discloses a method for manufacturing a solid state light emitting device having a plurality of light-sources, the method comprising the steps of: providing a substrate having a growth surface; providing a mask layer on the growth surface, the mask layer having a plurality of openings through which the growth surface is exposed, wherein a largest lateral dimension of each of said openings is less than 0.
    Type: Application
    Filed: October 20, 2011
    Publication date: August 22, 2013
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Abraham Rudolf Balkenende, Marcus Antonius Verschuuren, George Immink
  • Publication number: 20130214247
    Abstract: The present invention relates to a plurality of light emitting diodes connected in series to elevate the working voltage and to enable the devices to be connected directly to the AC voltage sources. The LED device has five pluralities of series-connected diodes. Four pluralities of series-connected diodes are arranged to at as a rectifier bridge so the fifth plurality of diodes is always forward biased and energized. The light emitting diodes in the device are arranged to accommodate various AC line voltages, diode operating voltages, and diode reverse breakdown voltages. The plurality of diodes was manufactured by first etching epitaxial layer to the insulating substrate to isolate individual diodes, and then use metal lines to interconnect them according to the layout design. The number of die-attach and wire-bonding steps used in the subsequent chip array and lamp manufacturing process is therefore greatly reduced or eliminated.
    Type: Application
    Filed: January 22, 2013
    Publication date: August 22, 2013
    Inventor: Jianhua Hu
  • Patent number: 8513645
    Abstract: A source gas flows through a flow channel 23 of a metal-organic vapor phase epitaxy reactor 21. The source gas is fed in a direction across a main surface 25a of a susceptor 25. GaN substrates 27a to 27c are placed on the susceptor main surface 25a. An off-angle monotonically varies on a line segment extending from one point on the edges of the main surfaces of the gallium nitride substrates 27a to 27c to another point on the edges. The orientations of the GaN substrates 27a to 27c are represented by the orientations of the orientation flats. By placing the plurality of gallium nitride substrates 27a to 27c on the susceptors 25 of the metal-organic vapor phase epitaxy reactor 21 in these orientations, the influence of the off-angle distribution can be reduced by using the influence originated from the flow of the source gas.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: August 20, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Masaki Ueno, Takao Nakamura
  • Patent number: 8513039
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: August 20, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Tzu-Chien Hung, Ya-Wen Lin
  • Patent number: 8513670
    Abstract: A pixel structure and a pixel circuit having multi-display mediums are provided. A storage capacitor and a first display medium are disposed in different layers, so as to overlap the storage capacitor with a pixel electrode of the first display medium. Accordingly, an area of the first display medium can be increased for enlarging an aperture ratio of the pixel. Furthermore, because a third pixel electrode is disposed in a conductive layer, the third pixel electrode can control/drive a second display medium under a substrate.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: August 20, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Jing-Yi Yan, Yen-Shih Huang, Chen-Wei Lin, Hua-Chi Cheng
  • Patent number: 8513687
    Abstract: A semiconductor light emitting device, includes: a stacked structure unit including a first semiconductor layer, a second semiconductor layer, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer; a first electrode provided on a first major surface of the stacked structure unit on the second semiconductor layer side to connect to the first semiconductor layer; and a second electrode provided on the first major surface of the stacked structure unit to connect to the second semiconductor layer. The second electrode includes: a first film provided on the second semiconductor layer; and a second film provided on a rim of the first film on the second semiconductor layer. The first film has a relatively low contact resistance with the second semiconductor layer. The second film has a relatively high contact resistance with the second semiconductor layer.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: August 20, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Publication number: 20130207077
    Abstract: A novel quantum dot containing two different metals at non-toxic levels which is capable of narrow bandwidth near infrared emissions at wavelengths of 600-1100 nm. The quantum dot is fabricated via an aqueous method which forms a structure having an inner region of one composition and an outer region of a different composition, wherein the inner region contains at least a first metal and the outer region contains at least a second metal. The quantum dots may be enabled for bioconjugation and may be used in a method for tissue imaging and analyte detection.
    Type: Application
    Filed: October 20, 2011
    Publication date: August 15, 2013
    Applicant: DREXEL UNIVERSITY
    Inventors: Wei-Heng Shih, Giang Au, Wan Y. Shih
  • Publication number: 20130207076
    Abstract: A group III nitride semiconductor light emitting device with a satisfactory ohmic contact is provided. The group III nitride semiconductor light emitting device includes a junction JC which tilts with respect to the reference plane that is orthogonal to a c-axis of a gallium nitride based semiconductor layer. An electrode forms the junction with the semipolar surface of the gallium nitride based semiconductor layer. The oxygen concentration of the grown gallium nitride based semiconductor layer that will form the junction JC is reduced. Since the electrode is in contact with the semipolar surface of the gallium nitride based semiconductor layer so as to form the junction, the metal-semiconductor junction has satisfactory ohmic characteristics.
    Type: Application
    Filed: August 29, 2011
    Publication date: August 15, 2013
    Applicant: Sumitomo Electric Industries ,Ltd.
    Inventors: Susumu Yoshimoto, Fuminori Mitsuhashi
  • Publication number: 20130210180
    Abstract: A method of producing a light emitting device comprises providing a wafer structure including a light emitting layer of III-nitride semiconductor material; dry etching the wafer at least part way through the light emitting layer so as to leave exposed surfaces of the emitting layer; and treating the exposed surfaces of the emitting layer with a plasma. The treatment may be using hot nitric acid or a hydrogen plasma.
    Type: Application
    Filed: July 25, 2011
    Publication date: August 15, 2013
    Applicant: SEREN PHOTONICS LIMITED
    Inventor: Tao Wang
  • Patent number: 8507305
    Abstract: A III-nitride semiconductor laser device is provided with a laser structure and an electrode. The laser structure includes a support base which includes a hexagonal III-nitride semiconductor and a semipolar primary surface, and a semiconductor region provided on the semipolar primary surface. The electrode is provided on the semiconductor region. The semiconductor region includes a first cladding layer of a first conductivity type GaN-based semiconductor, a second cladding layer of a second conductivity type GaN-based semiconductor, and an active layer provided between the first cladding layer and the second cladding layer.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: August 13, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yusuke Yoshizumi, Yohei Enya, Takashi Kyono, Takamichi Sumitomo, Nobuhiro Saga, Masahiro Adachi, Kazuhide Sumiyoshi, Shinji Tokuyama, Shimpei Takagi, Takatoshi Ikegami, Masaki Ueno, Koji Katayama
  • Patent number: 8507929
    Abstract: One or more regions of graded composition are included in a III-P light emitting device, to reduce the Vf associated with interfaces in the device. In accordance with embodiments of the invention, a semiconductor structure comprises a III-P light emitting layer disposed between an n-type region and a p-type region. A graded region is disposed between the p-type region and a GaP window layer. The aluminum composition is graded in the graded region. The graded region may have a thickness of at least 150 nm. In some embodiments, in addition to or instead of a graded region between the p-type region and the GaP window layer, the aluminum composition is graded in a graded region disposed between an etch stop layer and the n-type region.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: August 13, 2013
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Patrick N. Grillot, Rafael I. Aldaz, Eugene I. Chen, Sateria Salim