Abstract: In at least one embodiment, the semiconductor layer sequence (1) is provided for an optoelectronic semiconductor chip (10). The semiconductor layer sequence (1) contains at least three quantum wells (2) which are arranged to generate electromagnetic radiation. Furthermore, the semiconductor layer sequence (1) includes a plurality of barrier layers (3), of which at least one barrier layer is arranged between two adjacent quantum wells (2) in each case. The quantum wells (2) have a first average indium content and the barrier layers (3) have a second, smaller, average indium content. A second average lattice constant of the barrier layers (3) is thereby smaller than a first average lattice constant of the quantum wells (2).

Abstract: Provided are a heterogeneous substrate, a nitride-based semiconductor device using the same, and a manufacturing method thereof to form a high-quality non-polar or semi-polar nitride layer on a non-polar or semi-polar plane of the heterogeneous substrate by adjusting a crystal growth mode. A base substrate having one of a non-polar plane and a semi-polar plane is prepared, and a nitride-based nucleation layer is formed on the plane of the base substrate. A first buffer layer is grown faster in the vertical direction than in the lateral direction on the nucleation layer. A lateral growth layer is grown faster in the lateral direction than in the vertical direction on the first buffer layer. A second buffer layer is formed on the lateral growth layer. A silicon nitride layer having a plurality of holes may be formed between the lateral growth layer on the first buffer layer and the second buffer layer.

Abstract: Portions of a top compound semiconductor layer are recessed employing a gate electrode as an etch mask to form a source trench and a drain trench. A low temperature epitaxy process is employed to deposit a semiconductor material including at least one elemental semiconductor material in the source trench and the drain trench. Metallization is performed on physically exposed surfaces of the elemental semiconductor material portions in the source trench and the drain trench by depositing a metal and inducing interaction with the metal and the at least one elemental semiconductor material. A metal semiconductor alloy of the metal and the at least one elemental semiconductor material can be performed at a temperature lower than 600° C. to provide a high electron mobility transistor with a well-defined device profile and reliable metallization contacts.

Abstract: According to one embodiment, a semiconductor light emitting device includes: first and second semiconductor layers, a light emitting part, and an In-containing layer. The first semiconductor layer is formed on a silicon substrate via a foundation layer. The light emitting part is provided on the first semiconductor layer, and includes barrier layers and a well layer provided between the barrier layers including Ga1-z1Inz1N (0<z1?1). The second semiconductor layer is provided on the light emitting part. The In-containing layer is provided at at least one of first and second positions. The first position is between the first semiconductor layer and the light emitting part. The second position is between the second semiconductor layer and the light emitting part. The In-containing layer includes In with a composition ratio different from the In composition ratio z1 and has a thickness 10 nm to 1000 nm.

Abstract: The present invention provides a quantum rod including a core including zinc compound; and a shell covering the core and including ZnS. The quantum rod emits the short wavelength light.

Abstract: A light emitting diode chip includes a semiconductor layer sequence, the semiconductor layer sequence having an active layer that generates electromagnetic radiation, wherein the light emitting diode chip has a radiation exit area at a front side. At a rear side lying opposite the radiation exit area, the light emitting diode chip has, at least in regions, a mirror layer containing silver. A functional layer that reduces corrosion and/or improves adhesion of the mirror layer is arranged on the mirror layer, wherein a material from which the functional layer is formed is also distributed in the entire mirror layer. The material of the functional layer has a concentration gradient in the mirror layer, wherein the concentration of the material of the functional layer in the mirror layer decreases proceeding from the functional layer in the direction toward the semiconductor layer sequence.

Abstract: A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure includes a light emitting layer disposed between a n-type semiconductor layer and a p-type semiconductor layer, and a hole supply layer disposed between the light emitting layer and the p-type semiconductor layer. The hole supply layer is made from material InxGa1-xN (0<x<1) and is doped with a Group IV-A element at a concentration ranging from 1017 to 1020 cm?3. By being doped with the Group IV-A element, the concentration of holes is increased and inactivation caused by Mg—H bonds is reduced. Thus Mg is activated as acceptors and the light emitting efficiency is further increased.

Abstract: There is embodied a high-reliability high-voltage resistance compound semiconductor device capable of improving the speed of device operation, being high in avalanche resistance, being resistant to surges, eliminating the need to connect any external diodes when applied to, for example, an inverter circuit, and achieving stable operation even if holes are produced, in addition to alleviating the concentration of electric fields on a gate electrode and thereby realizing a further improvement in voltage resistance. A gate electrode is formed so as to fill an electrode recess formed in a structure of stacked compound semiconductors with an electrode material through a gate insulation film, and a field plate recess formed in the structure of stacked compound semiconductors is filled with a p-type semiconductor, thereby forming a field plate the p-type semiconductor layer of which has contact with the structure of stacked compound semiconductors.

Abstract: The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate and formed with reference to the n-type nitride semiconductor layer.

Abstract: An epitaxial structure for a III-Nitride based optical device, comprising an active layer with anisotropic strain on an underlying layer, where a lattice constant and strain in the underlying layer are partially or fully relaxed in at least one direction due to a presence of misfit dislocations, so that the anisotropic strain in the active layer is modulated by the underlying layer.

Abstract: A compound semiconductor light-emitting element characterized by high transmittance of an electrically conductive film, low contact resistance and low sheet resistance of electrically conductive film is manufactured. The manufacturing method for a compound semiconductor light-emitting element of the present invention includes the steps of: forming a semiconductor layer formed of a group III nitride semiconductor, including a light-emitting layer on a substrate; forming an electrically conductive film on the side of the semiconductor layer opposite to the side contacting the substrate; conducting first annealing on the electrically conductive film in an atmosphere containing oxygen; conducting second annealing on the electrically conductive film in an atmosphere not containing oxygen; and exposing the electrically conductive film to atmospheric air between the step of conducting first annealing and the step of conducting second annealing.

Abstract: Solid state lighting devices grown on semi-polar facets and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (“GaN”) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (“InGaN”)/GaN multi quantum well (“MQW”) active region directly between the N-type GaN material and the P-type GaN material. At least one of the N-type GaN, InGaN/GaN MQW, and P-type GaN materials is grown a semi-polar sidewall.

Abstract: Light emitting diodes and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode (LED) includes a substrate, a semiconductor material carried by the substrate, and an active region proximate to the semiconductor material. The semiconductor material has a first surface proximate to the substrate and a second surface opposite the first surface. The second surface of the semiconductor material is generally non-planar, and the active region generally conforms to the non-planar second surface of the semiconductor material.

Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.

Abstract: A method of fabricating a substrate for a semipolar III-nitride device, comprising patterning and forming one or more mesas on a surface of a semipolar III-nitride substrate or epilayer, thereby forming a patterned surface of the semipolar III-nitride substrate or epilayer including each of the mesas with a dimension l along a direction of a threading dislocation glide, wherein the threading dislocation glide results from a III-nitride layer deposited heteroepitaxially and coherently on a non-patterned surface of the substrate or epilayer.

Abstract: An improvement in a method of making a semiconducting device having a hole-collecting electrode includes coating the hole-collecting electrode with a p-type transition metal oxide through a sol-gel process.

Abstract: A semiconductor device includes a plurality of first conductivity type semiconductor nanowire cores located over a support, and an insulating mask layer located over the support. The nanowire cores include semiconductor nanowires epitaxially extending from portions of a semiconductor surface of the support exposed through openings in the insulating mask layer. The device also includes a plurality of second conductivity type semiconductor shells extending over and around the respective nanowire cores, a first electrode layer that contacts the second conductivity type semiconductor shells and extends into spaces between the semiconductor shells, and an insulating layer located between the insulating mask layer and the first electrode in the spaces between the semiconductor shells.

Abstract: A semiconductor nanocrystal that emits green light having a peak emission with a full width at half maximum of about 30 nm or less at 100° C. and a method of making coated semiconductor nanocrystals are provided. Materials and other products including semiconductor nanocrystals described herein and materials and other products including semiconductor nanocrystals prepared by a method described herein are also disclosed.

Abstract: Disclosed is a method of manufacturing a field effect type compound semiconductor device in which leakage current of a device is decreased and breakdown voltage is enhanced.

Abstract: Semiconductor structures include an active region between a plurality of layers of InGaN. The active region may be at least substantially comprised by InGaN. The plurality of layers of InGaN include at least one well layer comprising InwGa1-wN, and at least one barrier layer comprising InbGa1-bN proximate the at least one well layer. In some embodiments, the value of w in the InwGa1-wN of the well layer may be greater than or equal to about 0.10 and less than or equal to about 0.40 in some embodiments, and the value of b in the InbGa1-bN of the at least one barrier layer may be greater than or equal to about 0.01 and less than or equal to about 0.10. Methods of fainting semiconductor structures include growing such layers of InGaN to form an active region of a light emitting device, such as an LED. Luminary devices include such LEDs.

Abstract: A laser active region can include a quantum well barrier having GaPSb. The active region can include one or more quantum wells, and a quantum well barrier having GaPSb bounding each side of each of the one or more quantum wells. The quantum well barrier can be GaP1-wSbw, where w ranges from about 0.12 to about 0.25 mole fraction, and can have a thickness of from about 20 Angstroms to about 50 Angstroms. The one or more quantum wells include InGaAs or InGaAsP. Various types of lasers can have the laser active region. Such a laser can be capable of emitting light having a wavelength of about 850 nm or +/?150 nm. As an example, a vertical cavity surface-emitting laser (VCSEL) having the laser active region. The laser may also be a tunneling laser.

Abstract: Disclosed is a method of preparing metal oxide semiconductor-graphene core-shell quantum dots by chemically linking graphenes with superior electrical properties to a metal oxide semiconductor, and a method of fabricating a light emitting diode by using the same. The light emitting diode according to the present invention has the advantages that it shows excellent power conversion efficiency, the cost for materials and equipments required for its fabrication can be reduced, its fabricating process is simple, and it is possible to mass-produce and enlarge the size of display based on a quantum dot light emitting diode. Further, the present invention relates to core-shell quantum dots that can be used in fabricating a light emitting diode with a different wavelength by using various multi-component metal oxide semiconductors and a fabricating method thereof.

Abstract: A light emitting device having an electrically conductive metal foam or porous metal substrate, one or more light emitting nanowires in contact with the substrate, and a metal or conductive oxide contact layer in contact with each nanowire junction opposite of the substrate. More specifically, a light emitting device having an electrically conductive metal foam substrate, one or more light emitting nanowires in contact with the substrate, a quantum well on the nanowire(s), a p-type shell on the quantum well, a metal or conductive oxide contact layer in contact with the shell, and an energy down-converting material. Also disclosed is the related method of making a light emitting device.

Abstract: Methods of manufacture of advanced heterojunction transistors and transistor lasers, and their related structures, are described herein. Other embodiments are also disclosed herein.

Abstract: Nano-crystalline core and nano-crystalline shell pairings having group I-III-VI material nano-crystalline cores, and methods of fabricating nano-crystalline core and nano-crystalline shell pairings having group I-III-VI material nano-crystalline cores, are described. In an example, a semiconductor structure includes a nano-crystalline core composed of a group I-III-VI semiconductor material. A nano-crystalline shell composed of a second, different, group I-III-VI semiconductor material at least partially surrounds the nano-crystalline core.

Abstract: Described herein is a Förster (or fluorescence) resonance energy transfer (FRET) configuration with three energy transfer pathways between three luminescent components, where two of the energy transfer steps occur in sequence as a relay, and the first step of the relay is in competition with a third energy transfer process (energy transfer from the donor to the intermediary is in competition with energy transfer from the donor directly to the terminal acceptor).

Abstract: A nano-structured light-emitting device (LED) includes: a plurality of nanostructures on a first type semiconductor layer. Each of the plurality of nanostructures includes: a first type semiconductor nanocore on a portion of the first type semiconductor layer; a current spreading layer formed to cover a surface of the first type semiconductor nanocore and formed of an AlxGa1-xN(0<x<1)/GaN superlattice structure; an active layer on the current spreading layer (or on the first type semiconductor nanocore if the current spreading layer is embedded in the first type semiconductor nanocore); and a second type semiconductor layer on the active layer.

Abstract: According to one embodiment, a semiconductor light emitting element includes a first semiconductor layer of an n-type, a second semiconductor layer of a p-type, and a light emitting unit. The first semiconductor layer includes a nitride semiconductor. The second semiconductor layer includes a nitride semiconductor. The light emitting unit is provided between the first semiconductor layer and the second semiconductor layer. The light emitting unit includes a plurality of well layers stacked alternately with a plurality of barrier layers. The well layers include a first p-side well layer most proximal to the second semiconductor layer, and a second p-side well layer second most proximal to the second semiconductor layer. A localization energy of excitons of the first p-side well layer is smaller than a localization energy of excitons of the second p-side well layer.

Abstract: A semiconductor laser diode comprises a semiconductor body having an n-region and a p-region laterally spaced apart within the semiconductor body. The laser diode is provided with an active region between the n-region and the p-region having a front end and a back end section, an n-metallization layer located adjacent the n-region and having a first injector for injecting current into the active region, and a p-metallization layer opposite to the n-metallization layer and adjacent the p-region and having a second injector for injecting current into the active region. The thickness and/or width of at least one metallization layer is chosen so as to control the current injection in a part of the active region near at least one end of the active region compared to the current injection in another part of the active region. The width of the at least one metallization layer is larger than a width of the active region.

Abstract: In a nitride semiconductor light-emitting device having an n-side and a p-side electrode pad formed on the same side of a substrate wherein current distribution in the light-emitting device is improved by forming branch electrodes extended from the p-side electrode pad (and the n-side electrode pad), when sheet resistance values of n-side and p-side layers in the device are low enough, contact resistance between a p-type nitride semiconductor layer and a current diffusion layer of a transparent conductive film formed thereon is reduced and in-plane distribution of the sheet resistance is made uniform whereby improving the optical output, by increasing in a prescribed condition the sheet resistance value of the current diffusion layer.

Abstract: The disclosure discloses a fabrication method for a light absorption layer of a solar cell, including: forming a precursor film on a substrate, wherein the precursor film includes the Group IB-IIB-IVA-VIA amorphous nanoparticles; and conducting a thermal process to the precursor film to form the light absorption layer on the substrate.

Abstract: A method is provided for producing a light-emitting diode. A carrier substrate has a silicon surface. A series of layers is deposited on the silicon surface in a direction of growth and a light-emitting diode structure is deposited on the series of layers. The series of layers includes a GaN layer, which is formed with gallium nitride. The series of layers includes a masking layer, which is formed with silicon nitride. The masking layer follows at least part of the GaN layer in the direction of growth.

Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.

Abstract: In a vertical dynamic memory cell, monocrystalline semiconductor material of improved quality is provided for the channel of an access transistor by lateral epitaxial growth over an insulator material (which complements the capacitor dielectric in completely surrounding the storage node except at a contact connection structure, preferably of metal, from the access transistor to the storage node electrode) and etching away a region of the lateral epitaxial growth including a location where crystal lattice dislocations are most likely to occur; both of which features serve to reduce or avoid leakage of charge from the storage node. An isolation structure can be provided in the etched region such that space is provided for connections to various portions of a memory cell array.

Abstract: III-N material grown on a silicon substrate includes a single crystal buffer positioned on a silicon substrate. The buffer is substantially crystal lattice matched to the surface of the silicon substrate and includes aluminum oxynitride adjacent the substrate and aluminum nitride adjacent the upper surface. A first layer of III-N material is positioned on the upper surface of the buffer. An inter-layer of aluminum nitride (AlN) is positioned on the first III-N layer and an additional layer of III-N material is positioned on the inter-layer. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer.

Abstract: Certain embodiments provide a method for manufacturing a semiconductor light emitting device, including: providing a first stack film on a first substrate, the first stack film being formed by stacking a p-type nitride semiconductor layer, an active layer having a multiquantum well structure of a nitride semiconductor, and an n-type nitride semiconductor layer in this order; forming an n-electrode on an upper face of the n-type nitride semiconductor layer; and forming a concave-convex region on the upper face of the n-type nitride semiconductor layer by performing wet etching on the upper face of the n-type nitride semiconductor layer with the use of an alkaline solution, except for a region in which the n-electrode is formed.

Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.

Abstract: A method of producing a light-emitting semiconductor device of a group III nitride compound includes forming a buffer layer on a sapphire substrate, forming a Si-doped N+-layer with supplying silane, the N+-layer satisfying formula (Alx3Ga1-x3)y3In1-y3N, wherein 0?x3?1, 0?y3?1 and 0?x3+y3?1, forming an emission layer of a group III nitride compound semiconductor satisfying formula Alx1Gay1In1-x1-y1N, where 0?x1?1, 0?y1?1, and 0?x1+y1?1, on the N+-layer, and forming a P-layer of a P-type conduction on the emission layer, the P-layer including aluminum gallium nitride satisfying formula Alx2Ga1-x2N, wherein 0?x2?1.

Abstract: Disclosed is a method of manufacturing a light emitting device. More particularly, disclosed are a growth substrate, a nitride semiconductor device and a method of manufacturing a light emitting device. The method includes preparing a growth substrate including a metal substrate, forming a semiconductor structure including a nitride-based semiconductor on the growth substrate, providing a support structure on the semiconductor structure, and separating the growth substrate from the semiconductor structure.

Abstract: This invention provides a germanium electroluminescence device and a fabricating method of the same for using germanium of an indirect bandgap semiconductor without modifying a bandgap as a light-emitting layer which emits a 1550 nm-wavelength light and enabling to use not only as infrared LEDs itself but also as light sources for optical communication systems.

Abstract: An Al0.95Ga0.05N:Mg (25 nm) single electron barrier can stop electrons having energy levels lower than the barrier height. Meanwhile, a 5-layer Al0.95Ga0.05N (4 nm)/Al0.77Ga0.23N (2 nm) MQB has quantum-mechanical effects so as to stop electrons having energy levels higher than the barrier height. Thus, electrons having energy levels higher than the barrier height can be blocked by making use of multiquantum MQB effects upon electrons. The present inventors found that the use of an MQB allows blocking of electrons having higher energy levels than those blocked using an SQB. In particular, for InAlGaN-based ultraviolet elements, AlGaN having the composition similar to that of AlN is used; however, it is difficult to realize a barrier having the barrier height exceeding that of AlN. Therefore, MQB effects are very important.

Abstract: The present invention provides a Group III nitride semiconductor light-emitting device which is intended to relax stress applied to a light-emitting layer. The light-emitting device includes an MQW layer, and an n-side superlattice layer formed below the MQW layer. The n-side superlattice layer is formed by repeatedly depositing layer units, each unit including an InGaN layer, a GaN layer, and an n-GaN layer which are sequentially deposited from the side of the sapphire substrate. In the n-side superlattice layer, an InGaN layer more proximal to the MQW layer has a higher In compositional proportion. The In compositional proportion of the InGaN layer (which is most proximal to the MQW layer) of the n-side superlattice layer is 70% to 100% of the In compositional proportion of the InGaN layer (which is most proximal to the n-side superlattice layer) of the MQW layer.

Abstract: A method of forming a p-type gallium nitride based semiconductor without activation annealing is provided, and the method can provide a gallium nitride based semiconductor doped with a p-type dopant. A GaN semiconductor region 17 containing a p-type dopant is formed on a supporting base 13 in a reactor 10. An organometallic source and ammonia are supplied to the reactor 10 to grow the GaN semiconductor layer 17 on a GaN semiconductor layer 15. The GaN semiconductor is doped with a p-type dopant. Examples of the p-type dopant include magnesium. After the GaN semiconductor regions 15 and 17 are grown, an atmosphere 19 containing at least one of monomethylamine and monoethylamine is prepared in the reactor 10. After the atmosphere 19 is prepared, a substrate temperature is decreased from the growth temperature of the GaN semiconductor region 17. When the substrate temperature is lowered to room temperature after this film formation, a p-type GaN semiconductor 17a and an epitaxial wafer E has been fabricated.

Abstract: An object of the present invention is to provide a nitride semiconductor device which shifts a luminescence wavelength toward a longer wavelength side without decreasing luminescence efficiency, and the nitride semiconductor device according to an implementation of the present invention includes: a GaN layer having a (0001) plane and a plane other than the (0001) plane; and an InGaN layer which contacts the GaN layer and includes indium, and the InGaN layer has a higher indium composition ratio in a portion that contacts the plane other than the (0001) plane than in a portion that contacts the (0001) plane.

Abstract: Light-emitting devices, and related components, systems, and methods associated therewith are provided.

Abstract: A light emitting device includes a p-side heterostructure having a short period superlattice (SPSL) formed of alternating layers of AlxhighGa1-xhighN doped with a p-type dopant and AlxlowGa1-xlowN doped with the p-type dopant, where xlow?xhigh?0.9. Each layer of the SPSL has a thickness of less than or equal to about six bi-layers of AlGaN.

Abstract: A semiconductor light-emission device includes: a p-type conductive layer that is one or more layers each made of a III-V compound semiconductor; an active layer made of a III-V compound semiconductor; and an electron barrier layer inserted between the p-type conductive layer and the active layer, and made of a III-V compound semiconductor. The electron barrier layer includes first and second regions. The first region is provided closer to the active layer than the second region, has a first interface and a second interface located farther from the active layer than the first interface, and has a band gap of a fixed magnitude. The second region is provided in contact with the second interface, and has a band gap smaller than the band gap of the first region and becomes smaller from an interface with the first region towards an interface with the p-type conductive layer of the second region.

Abstract: Methods for fabricating self-aligned heterostructures and semiconductor arrangements using silicon nanowires are described.

Abstract: A method of generating radiation comprises: manufacturing a structure comprising a substrate supporting a layer of InGaAs, InGaAsP, or InGaAlAs material doped with a dopant, said manufacturing comprising growing said layer such that said dopant is incorporated in said layer during growth of the layer; illuminating a portion of a surface of the structure with radiation having photon energies greater than or equal to a band gap of the doped InGaAs, InGaAsP, or InGaAlAs material so as to create electron-hole pairs in the layer of doped material; and accelerating the electrons and holes of said pairs with an electric field so as to generate radiation. In certain embodiments the dopant is Fe. Corresponding radiation detecting apparatus, spectroscopy systems, and antennas are described.

Abstract: A semiconductor light emitting device and a fabrication method thereof includes: providing a substrate; forming an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer on the substrate; forming a first transparent electrode having holes per a certain region on the p-type semiconductor layer; and forming a first pad on the first transparent electrode. A method of fabricating a semiconductor light emitting device, and which includes forming a light emitting layer on the first type semiconductor layer; forming a second type semiconductor layer on the light emitting layer; forming a first transparent electrode on the second type semiconductor layer, the first transparent electrode having holes per a certain region to thereby expose the second type semiconductor layer; forming a second transparent electrode on the first transparent electrode; forming a first pad on the second transparent electrode; and forming a second pad over the first type semiconductor layer.