Abstract: Provided is an emitting device which is capable of improving the luminous efficiency of an emitting layer formed using a group IV semiconductor material and obtaining an emission spectrum having a narrow band, and a manufacturing method therefor. The emitting device comprises: an emitting layer having a potential confinement structure, comprising: a well region comprising a group IV semiconductor material; and a barrier region being adjacent to the well region and comprising a group IV semiconductor material which is different from the group IV semiconductor material in the well region, wherein: a continuous region from the well region over an interface between the well region and the barrier region to a part of the barrier region comprises fine crystals; and a region in the barrier region, which is other than the continuous region comprising the fine crystals, is amorphous or polycrystalline region.

Abstract: Disclosed herein is a method of forming electronic device having thin-film components by using trenches. One or more of thin-film components is formed by depositing a thin-film in the trench followed by processing the deposited thin-film to have the desired thickness.

Abstract: According to one embodiment, a method is disclosed for manufacturing a nitride semiconductor layer. The method can include forming a first nitride semiconductor layer on a substrate in a reactor supplied with a first carrier gas and a first source gas. The first nitride semiconductor layer includes indium. The first carrier gas includes hydrogen supplied into the reactor at a first flow rate and includes nitrogen supplied into the reactor at a second flow rate. The first source gas includes indium and nitrogen and supplied into the reactor at a third flow rate. The first flow rate is not less than 0.07% and not more than 0.15% of a sum of the first flow rate, the second flow rate, and the third flow rate.

Abstract: A method includes the step of preparing a GaN-based substrate 10, the step of forming on the substrate a nitride-based semiconductor multilayer structure including a p-type AldGaeN layer (p-type semiconductor region) 26, the p-type AldGaeN layer 26 being made of an AlxInyGazN semiconductor (x+y+z=1, x?0, y?0, z?0), and a principal surface of the p-type AldGaeN layer 26 being an m-plane, the step of forming a metal layer 28 which contains at least one of Mg and Zn on the principal surface of the p-type AldGaeN layer 26 and performing a heat treatment, the step of removing the metal layer 28, and the step of forming a p-type electrode on the principal surface of the p-type AldGaeN layer 26, wherein the heat treatment causes a N concentration to be higher than a Ga concentration in the p-type AldGaeN layer 26.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.

Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. The second semiconductor layer is provided on a [0001]-direction side of the first semiconductor layer. The light emitting layer includes a first well layer, a second well layer and a first barrier layer. An In composition ratio of the barrier layer is lower than that of the first well layer and the second well layer. The barrier layer includes a first portion and a second portion. The second portion has a first region and a second region. The first region has a first In composition ratio higher than that of the first portion. The second region is provided between the first region and the first well layer. The second region has a second In composition ratio lower than the first In composition ratio.

Abstract: A method for large scale manufacture of photovoltaic devices includes loading a substrate into a load lock station and transferring the substrate in a controlled ambient to a first process station. The method includes using a first physical deposition process in the first process station to cause formation of a first conductor layer overlying the surface region of the substrate. The method includes transferring the substrate to a second process station, and using a second physical deposition process in the second process station to cause formation of a second layer overlying the surface region of the substrate. The method further includes repeating the transferring and processing until all thin film materials of the photovoltaic devices are formed. In an embodiment, the invention also provides a method for large scale manufacture of photovoltaic devices including feed forward control.

Abstract: A Group III nitride compound semiconductor light emitting device is provided which has: an n-type semiconductor layer (12); an active layer (13) of a multiple quantum well structure laminated on the n-type semiconductor layer (12); a first p-type semiconductor layer (14) that is a layer of a superlattice structure in which an undoped film (14a) that has a composition AlxGa1-xN (x indicating composition ratio, being within a range 0<x?0.4) and that contains no dopant, and a doped film (14b) that has a composition AlyGa1-yN (y indicating composition ratio, being within a range 0?y<0.4) and that contains a dopant, are alternately laminated a plurality of times, and a surface thereof on the active layer side (13) is constituted by the undoped film (14a); and a second p-type semiconductor layer (15) laminated on the first p-type semiconductor layer (14).

Abstract: A light emitting diode (LED) with a vertical structure, including electrical contacts on opposing sides, provides increased brightness. In some embodiments an LED includes a nitride semiconductor light emitting component grown on a sapphire substrate, a Zn(Mg,Cd,Be)O(S,Se) assembly formed on the nitride semiconductor component, and a further Zn(Mg Cd,Be)O(S,Se) assembly bonded on an opposing side of the light emitting component, which is exposed by removing the sapphire substrate. Electrical contacts may be connected to the Zn(Mg,Cd,Be)O(S,Se) assembly and the further Zn(Mg,Cd,Be)O(S,Se) assembly. Herein Zn(Mg,Cd,Be)O(S,Se) is a II-VI semiconductor satisfying a formula Zn1?a?b?cMgaCdbBecO1?p?qSpSeq, wherein a=0˜1, b=0˜1, c=0˜1, p=0˜1, and q=0˜1.

Abstract: A method for making a device, the method comprising: depositing a layer comprising quantum dots over a first electrode, the quantum dots including ligands attached to the outer surfaces thereof; treating the surface of the deposited layer comprising quantum dots to remove the exposed ligands; and forming a device layer thereover. Also disclosed is a device made in accordance with the disclosed method. Another aspect of the invention relates to a device comprising a first electrode and a second electrode, and a layer comprising quantum dots between the two electrodes, the layer comprising quantum dots deposited from a dispersion that have been treated to remove exposed ligands after formation of the layer in the device.

Abstract: A method for producing an integrated optical device includes the steps of preparing a substrate including first and second regions; growing, on the substrate, a first stacked semiconductor layer including a first optical waveguiding layer, first and second cladding layers, and a first etch-stop layer between the first and second cladding layers; etching the first stacked semiconductor layer through a first etching mask formed on the first region; selectively growing, on the second region through the first etching mask, a second stacked semiconductor layer, third and fourth cladding layers, and a second etch-stop layer between the third and fourth cladding layers; and forming a ridge structure by etching the second and fourth cladding layers. The step of etching the first stacked semiconductor layer includes a step of forming a first overhang between the first and second cladding layers by selectively etching the first etch-stop layer by wet etching.

Abstract: A method for producing an integrated optical device includes the steps of growing, on a substrate including first and second regions, a first stacked semiconductor layer, a first cladding layer, and a side-etching layer; etching the first stacked semiconductor layer through a first etching mask formed on the first region; selectively growing, on the second region, a second stacked semiconductor layer and a second cladding layer; growing a third cladding layer and a contact layer on the first and second stacked semiconductor layers; and forming a ridge structure. The step of etching the first stacked semiconductor layer includes a step of forming an overhang between the first cladding layer and the first etching mask. The step of forming a ridge structure includes first, second, and third wet-etching steps in which the third cladding layer, the side-etching layer and the first and second cladding layers are selectively etched, respectively.

Abstract: A light emitting diode (LED) includes a substrate and an eputaxial layer on the substrate. The epitaxial layer includes a N-type GaN-based layer, a light emitting layer, and a P-type GaN-based layer. The LED further includes a first electrode on the N-type GaN-based layer and a second electrode on the P-type GaN-based layer. The P-type GaN-based layer has a inactive portion, and the second electrode is located and covers the inactive portion.

Abstract: A p-type cladding layer (3) of p-type semiconductor is formed over a substrate. An active layer (5) including a p-type semiconductor region is disposed over the p-type cladding layer. A buffer layer (10) of non-doped semiconductor is disposed over the active layer. A ridge-shaped n-type cladding layer (11) of n-type semiconductor is disposed over a partial surface of the buffer layer. The buffer layer on both sides of the ridge-shaped n-type cladding layer is thinner than the buffer layer just under the ridge-shaped n-type cladding layer.

Abstract: A light emitting device using charge accumulation and a method of manufacturing the light emitting device are provided. The light emitting device includes a substrate, a first electrode formed on the substrate, a hole transport layer formed on the first electrode, an electron transport layer formed on the hole transport layer, and a second electrode formed on the electron transport layer. A thickness of the hole transport layer may be greater than 20 nm and a thickness of the electron transport layer may be greater than 40 nm. A quantum dot (QD) layer may be disposed between the hole transport layer and the electron transport layer.

Abstract: A light emitting diode and a method of fabricating a light emitting diode, the diode has a first set of multiple quantum wells (MQWs), each of the MQWs of the first set comprising a wetting layer providing nucleation sites for quantum dots (QDs) or QD-like structures in a well layer of said each MQW; and a second set of MQWs, each of the MQWs of the second set formed so as to exhibit a photoluminescence (PL) peak wavelength shifted compared to the MQWs of the first set.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a dielectric material layer on a silicon substrate, the dielectric material layer being patterned to define a plurality of regions separated by the dielectric material layer; a first buffer layer disposed on the silicon substrate; a heterogeneous buffer layer disposed on the first buffer layer; and a gallium nitride layer grown on the heterogeneous buffer layer only within the plurality of regions.

Abstract: Provided is a photo active layer for a solar cell or a light emitting diode and a fabricating method thereof. The photo active layer is formed by alternately stacking silicon quantum dot layers in which a plurality of silicon quantum dots containing conductive type impurities are formed in a medium, which is a silicon compound, and conductive layers, which are polycrystalline silicon layers, containing the same conductive type impurities as those of the silicon quantum dots.

Abstract: A method of forming a template on a silicon substrate includes providing a single crystal silicon substrate. The method further includes forming an aluminum oxide coating on the surface of the silicon substrate, the aluminum oxide being substantially crystal lattice matched to the surface of the silicon substrate and epitaxially depositing a layer of aluminum nitride (AlN) on the aluminum oxide coating substantially crystal lattice matched to the surface of the aluminum nitride.

Abstract: Electroluminescent devices, methods of forming the same, and methods of generating light using the same are provided. An electroluminescent device can include an active layer and at least one p-n junction in physical contact with the active layer. Each p-n junction can include a p-type semiconductor layer and an n-type semiconductor layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes a substrate, a first electrode, a first conductivity type layer, a light emitting layer, a second conductivity type layer and a second electrode. The first conductivity type layer includes a first contact layer, a window layer having a lower impurity concentration than the first contact layer and a first cladding layer. The second conductivity type layer includes a second cladding layer, a current spreading layer and a second contact layer. The second electrode includes a narrow-line region on the second contact layer and a pad region electrically connected to the narrow-line region. Band gap energies of the first contact and window layers are larger than that of the light emitting layer. The first contact layer is provided selectively between the window layer and the first electrode and without overlapping the second contact layer as viewed from above.

Abstract: A stacking fault and twin blocking barrier for forming a III-V device layer on a silicon substrate and the method of manufacture is described. Embodiments of the present invention enable III-V InSb device layers with defect densities below 1×108 cm?2 to be formed on silicon substrates. In an embodiment of the present invention, a buffer layer is positioned between a III-V device layer and a silicon substrate to glide dislocations. In an embodiment of the present invention, GaSb buffer layer is selected on the basis of lattice constant, band gap, and melting point to prevent many lattice defects from propagating out of the buffer into the III-V device layer. In a specific embodiment, a III-V InSb device layer is formed directly on the GaSb buffer.

Abstract: Solid state lighting devices that can produce white light without a phosphor are disclosed herein. In one embodiment, a solid state lighting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The active region includes a first sub-region having a first center wavelength and a second sub-region having a second center wavelength different from the first center wavelength.

Abstract: Light-emitting devices, and related components, systems, and methods associated therewith are provided.

Abstract: The present invention provides a method of fabricating a semiconductor substrate and a method of fabricating a light emitting device. The method includes forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer, and separating the substrate from the second semiconductor layer by etching at least a second portion of the first semiconductor layer using a chemical solution.

Abstract: A high brightness light-emitting diode free of p-type gallium nitride (GaN) layer is provided, which includes an n-type semiconductor layer, a multi-quantum well (MQW) layer, a p-type indium gallium nitride (InGaN) layer and an indium tin oxide (ITO) layer. The grain size of the ITO layer is ranging from 5 to 1000 angstroms. A method for manufacturing the high brightness light-emitting diode is also provided.

Abstract: A method of fabricating a semiconductor structure involves forming an anisotropic nanocrystalline core from a first semiconductor material, the anisotropic nanocrystalline core having an aspect ratio between, but not including, 1.0 and 2.0, and forming a nanocrystalline shell from a second, different, semiconductor material to at least partially surround the anisotropic nanocrystalline core.

Abstract: A method for improving internal quantum efficiency of a group-III nitride-based light emitting device is disclosed. The method includes the steps of: providing a group-III nitride-based substrate having a single crystalline structure; forming on the group-III nitride-based substrate an oxide layer, having a plurality of particles, without absorption of visible light, size, shape, and density of the particles are controlled by reaction concentration ratio of nitrogen/hydrogen, reaction time and reaction temperature; and growing a group-III nitride-based layer over the oxide layer; wherein the oxide layer prevents threading dislocation of the group-III nitride-based substrate from propagating into the group-III nitride-based layer, thereby improving internal quantum efficiency of the group-III nitride-based light emitting device.

Abstract: According to one embodiment, a semiconductor light-emitting device includes: a first conductivity type first semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in a (0001) surface; a second conductivity type second semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in the (0001) surface; a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, containing a nitride semiconductor crystal, and having an average lattice constant larger than the lattice constant of the first semiconductor layer; and a first stress application layer provided on a side opposite to the light emitting layer of the first semiconductor layer and applying a compressive stress to the first semiconductor layer.

Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits light when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.

Abstract: A gallium nitride based semiconductor device is provided which includes a gallium nitride based semiconductor film with a flat c-plane surface provided on a gallium oxide wafer. A light emitting diode LED includes a gallium oxide support base 32 having a primary surface 32a of monoclinic gallium oxide, and a laminate structure 33 of Group III nitride. A semiconductor mesa of the laminate structure 33 includes a low-temperature GaN buffer layer 35, an n-type GaN layer 37, an active layer 39 of a quantum well structure, and a p-type gallium nitride based semiconductor layer 37. The p-type gallium nitride based semiconductor layer 37 includes, for example, a p-type AlGaN electron block layer and a p-type GaN contact layer. The primary surface 32a of the gallium oxide support base 32 is inclined at an angle of not less than 2 degrees and not more than 4 degrees relative to a (100) plane of monoclinic gallium oxide.

Abstract: Disclosed is a semiconductor light emitting element (1) which includes: plural n-side columnar conductor portions (183), each of which is provided by penetrating a p-type semiconductor layer (160) and a light emitting layer (150), and is electrically connected to an n-type semiconductor layer (140); an n-side layer-like conductor portion (184), which is disposed on the rear surface side of the p-type semiconductor layer (160) to face the surface of the light emitting layer (150) when viewed from the light emitting layer (150), and is electrically connected to the n-side columnar conductor portions (183); plural p-side columnar conductor portions (173), each of which is electrically connected to the p-type semiconductor layer (160); and a p-side layer-like conductor portion (174), which is disposed on the rear surface side of the p-type semiconductor layer (160) to face the light emitting layer (150) when viewed from the light emitting layer (150), and is electrically connected to the p-side columnar conductor

Abstract: Methods of performing laser spike annealing (LSA) in forming gallium nitride (GaN) light-emitting diodes (LEDs) as well as GaN LEDs formed using LSA are disclosed. An exemplary method includes forming atop a substrate a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method also includes performing LSA by scanning a laser beam over the p-GaN layer. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.

Abstract: A nitride light emitting diode, on a patterned substrate, comprising a nitride interlayer having at least two periods of alternating layers of InxGa1-xN and InyGa1-yN where 0<x<1 and 0?y<1, and a nitride based active region having at least one quantum well structure on the nitride interlayer.

Abstract: A compound semiconductor device includes: a substrate; a GaN compound semiconductor multilayer structure disposed over the substrate; and a stress relief layer which is AlN-based and which is disposed between the substrate and the GaN compound semiconductor multilayer structure, wherein a surface of the stress relief layer that is in contact with the GaN compound semiconductor multilayer structure includes recesses that have a depth of 5 nm or more and that are formed at a number density of 2×1010 cm?2 or more.

Abstract: A dual backplate MEMS microphone system including a flexible diaphragm sandwiched between two single-crystal silicon backplates may be formed by fabricating each backplate in a separate wafer, and then transferring one backplate from its wafer to the other wafer, to form two separate capacitors with the diaphragm.

Abstract: Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.

Abstract: According to one embodiment, stacked layers of a nitride semiconductor include a substrate, a single crystal layer and a nitride semiconductor layer. The substrate does not include a nitride semiconductor and has a protrusion on a major surface. The single crystal layer is provided directly on the major surface of the substrate to cover the protrusion, and includes a crack therein. The nitride semiconductor layer is provided on the single crystal layer.

Abstract: Epitaxial formation structures and associated methods of manufacturing solid state lighting (“SSL”) devices with target thermal expansion characteristics are disclosed herein. In one embodiment, an SSL device includes a composite structure having a composite CTE temperature dependency, a formation structure on the composite structure, and an SSL structure on the formation structure. The SSL structure has an SSL temperature dependency, and a difference between the composite CTE and SSL temperature dependencies is below 3 ppm/° C. over the temperature range.

Abstract: The present invention provides a light emitting device and a method for manufacturing a light emitting device. The light emitting device includes a base, an LED inversely mounted on the base. The LED includes an LED chip connected to the base and a buffer layer located on the LED. The buffer layer includes a plurality of depressions with complementary pyramid structure on a surface of the buffer layer not face the LED, the surface being a light-exiting surface of the LED. The buffer layer is made from silicon carbide. The light emitting device has a large area of the light-exiting surface and provides a reflecting film on a base, thus improving the luminous efficiency of the light emitting device. Inversely mounting mode is adopt, which is easy to implement.

Abstract: A light emitting diode (LED) includes a transparent insulating layer; and at least one transparent conductive oxide layer substantially enclosing the transparent insulating layer, wherein the transparent insulating layer and the at least one transparent conductive oxide layer are configured to distribute a current through the LED toward a peripheral region of the LED.

Abstract: A superlattice layer including a plurality of periods, each of which is formed from a plurality of sub-layers is provided. Each sub-layer comprises a different composition than the adjacent sub-layer(s) and comprises a polarization that is opposite a polarization of the adjacent sub-layer(s). In this manner, the polarizations of the respective adjacent sub-layers compensate for one another. Furthermore, the superlattice layer can be configured to be at least partially transparent to radiation, such as ultraviolet radiation.

Abstract: An optoelectronic device, comprising: a substrate; a plurality of the first semiconductor rods formed on the substrate, contacted with the substrate, and exposed partial of the first surface of the substrate; a first protection layer formed on the sidewall of the plurality of the first semiconductor rods and the exposed partial of the first surface of the substrate; a first buffer layer formed on the plurality of the first semiconductor rods wherein the first buffer layer having a first surface and a second surface opposite to the first surface, and the plurality of the first semiconductor rods directly contacted with the first surface; and at least one first hollow component formed among the first semiconductor rods, the first surface of the substrate, and the first surface of the first buffer layer and the ratio of the height and the width of the first hollow component is 1/5-3.

Abstract: Methods of depositing a III-V semiconductor material on a substrate include sequentially introducing a gaseous precursor of a group III element and a gaseous precursor of a group V element to the substrate by altering spatial positioning of the substrate with respect to a plurality of gas columns. For example, the substrate may be moved relative to a plurality of substantially aligned gas columns, each disposing a different precursor. Thermalizing gas injectors for generating the precursors may include an inlet, a thermalizing conduit, a liquid container configured to hold a liquid reagent therein, and an outlet. Deposition systems for forming one or more III-V semiconductor materials on a surface of the substrate may include one or more such thermalizing gas injectors configured to direct the precursor to the substrate via the plurality of gas columns.

Abstract: A semiconductor light emitting device and a fabrication method thereof are provided. The semiconductor light emitting device includes: first and second conductivity-type semiconductor layers; and an active layer disposed between the first and second conductivity-type semiconductor layers and having a structure in which a quantum barrier layer and a quantum well layer are alternately disposed, and the quantum barrier layer includes first and second regions disposed in order of proximity to the first conductivity-type semiconductor layer.

Abstract: Radiation-emitting semiconductor devices include a first base region comprising an n-type III-V semiconductor material, a second base region comprising a p-type III-V semiconductor material, and a multi-quantum well structure disposed between the first base region and the second base region. The multi-quantum well structure includes at least three quantum well regions and at least two barrier regions. An electron hole energy barrier between a third of the quantum well regions and a second of the quantum well regions is less than an electron hole energy barrier between the second of the quantum well regions and a first of the quantum well regions. Methods of forming such devices include sequentially epitaxially depositing layers of such a multi-quantum well structure, and selecting a composition and configuration of the layers such that the electron hole energy barriers vary across the multi-quantum well structure.

Abstract: Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (GaN) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (InGaN) material directly between the N-type GaN material and the P-type GaN material. At least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface.

Abstract: The present disclosure provides a light emitting diode and a method of manufacturing the same. The light emitting diode includes a graphene layer on a second conductive semiconductor layer and a plurality of metal nanoparticles formed on some region of the graphene layer, whereby adhesion between the second conductive semiconductor layer comprised of an inorganic material and the graphene layer is enhanced, thereby securing stability and reliability of the light emitting diode. In addition, the light emitting diode allows uniform spreading of electric current, thereby allowing stable emission of light through a surface area of the light emitting diode.

Abstract: A semiconductor light emitting device including an active layer, a compound semiconductor layer on the active layer, a contact layer on the compound semiconductor layer, and an electrode on the contact layer, where the contact layer is substantially the same size as the electrode.

Abstract: An ultraviolet (UV) light emitting structure, a UV light emitting device, and a method of making a UV light emitting structure or device, wherein the UV light emitting structure or device has an AlN or AlGaN injection layer with high aluminum content between the light emitting active region and the p-doped layers and wherein the injection layer has a thickness such that holes can tunnel from the p-side of the semiconductor-based ultraviolet light emitting diode structure through the injection layer in the active zone and also reducing leakage electrons out of the active zone.