Abstract: A method of producing an SOI substrate is disclosed which comprises a step of preparing an Si substrate prepared by the floating zone process (FZ process), a step of implanting oxygen ions from the principal surface side of the Si substrate thereinto to form an ion-implanted layer in the Si substrate, and a buried Si oxide layer forming step of forming an Si oxide layer buried below the single-crystal Si layer on the principal surface side, by a heat treatment of the Si substrate.

Abstract: A method of producing an SOI substrate is disclosed which comprises a step of preparing an Si substrate prepared by the floating zone process (FZ process), a step of implanting oxygen ions from the principal surface side of the Si substrate thereinto to form an ion-implanted layer in the Si substrate, and a buried Si oxide layer forming step of forming an Si oxide layer buried below the single-crystal Si layer on the principal surface side, by a heat treatment of the Si substrate.

Abstract: After O2+ ions are implanted in a silicon substrate (10), heat treatment is applied to the silicon substrate at a temperature of from 1,200° C. to 1,410° C., both inclusive, in an atmosphere having an oxygen content of from 0.1% to 1%, both inclusive, whereby a buried oxide layer (50) is formed. Subsequent to the above heat treatment, post heat treatment may be applied to the silicon substrate (10) at a temperature of from 1,200° C. to 1,410° C., both inclusive, in an atmosphere having an oxygen content of from 1% to 30%, both inclusive. Further, prior to the heat treatment, provisional heat treatment may be applied to the silicon substrate 10 at a temperature of form 350° C. to 1,000° C., both inclusive, for 1 hour or longer.

Abstract: A method of transforming the OTP ROM manufacturing process into the ROM manufacturing process comprises a check step for checking the OTP ROM manufacturing process to determine which manufacturing step is already performed. If the step of depositing the polysilicon layer, acting a control gate, has already been performed, a standard OTP ROM manufacturing process is then performed. Thereafter, a coding energy is performed, in which the coding energy is about 50 KeV higher than a standard coding energy. If the step of depositing the polysilicon layer, acting a control gate, has not yet been performed, then the coding energy is about a standard coding energy. Whatever step the ongoing OTP ROM manufacturing process is on, the present invention can transform the OTP ROM manufacturing process into the ROM manufacturing process to produce ROM by the direct implanting step. It isn't necessary to redesign the masks. The size of the OTP ROM is approximately the same as the ROM so that no die surface is sacrificed.

Abstract: In a method for forming a bonded semiconductor-on-insulator substrate for the fabrication of semiconductor devices and integrated circuits, a surface of a wafer of a monocrystalline semiconductor material is implanted with ions of the semiconductor material a to a selected depth in the wafer to form, adjacent to the surface, an amorphous layer of the semiconductor material. The layer of amorphous semiconductor material extends to a substantially planar zone disposed at substantially the selected depth and comprising the monocrystalline semiconductor material damaged by lattice defects, i.e., end-of-range implant damage. Undamaged material below the selected depth comprises a first layer of the monocrystalline semiconductor material.

Abstract: The present invention discloses a wafer which includes a semiconductor substrate having a top surface and a device layer disposed near the top surface for fabrication of integrated circuits (ICs) therein. The wafer also includes an insulating layer beneath the device layer for insulating the device layer with the ICs to be fabricated therein. The wafer further includes a doped region in the substrate. The doped region may be a layer beneath the insulating layer. The doped region is a region of sufficient volume whereby the doped region may be used as a charge sink for protecting the IC devices to be fabricated on the device layer from being damaged by the electric static discharge (ESD) and electric over stress (EOS). Furthermore, the doped region is a region of sufficient dopant concentration whereby the doped region may be used as an electrical connecting means for the IC devices to be fabricated in the device layer such that the doped region becomes a part of integration of the IC devices.

Abstract: The present invention provides a method for processing a substrate in which crystal defects occurring according to ion implantation can be prevented from being integrated to form defects such as dislocation or large vacancies in the manufacture of a SIMOX substrate by implanting oxygen atom to a Si base by ion implantation and reacting it with Si to form a buried oxide film. The annealing after ion implantation is performed under a gas atmosphere pressurized to, for example, about 100 MPa. In the pressurized state, a structure having a smaller volume is thermodynamically more stable, and a behavior as increases crystal distortion is arrested in the annealing. Thus, crystal defects can be laid in uniformly dispersed state, vacancies can be also extinguished, and a Si base of good quality suitable for manufacture of ULSI in which defects such as dislocation are reduced can be provided.

Abstract: A method of forming a semiconductor substrate (and the resulting structure), includes etching a groove into a bulk silicon substrate, forming a dielectric in the groove and planarizing the silicon substrate to form at least one patterned dielectric island in the silicon substrate, forming an amorphous silicon (or SiGe) layer on exposed portions of the silicon substrate and the at least one dielectric island, crystallizing the amorphous silicon (or SiGe) layer using the exposed silicon substrate as a seed, the silicon substrate having direct contact with the formed silicon layer serving as a crystal growth seeding for the crystallization process, and converting the silicon (or SiGe) layer to crystallized silicon, and performing a shallow trench isolation (STI) process, to form oxide isolations between devices.

Abstract: Systems and methods are described for semiconductor wafer pretreatment. A method of increasing the selectivity of silicon deposition with regard to an underlying oxide layer during deposition of a silicon containing material by broadening a selective temperature of formation window for said silicon containing material by decreasing a lower temperature endpoint includes: providing a semiconductor wafer with the underlying oxide layer in a processing chamber; then pumping water from then processing chamber; and then depositing the silicon containing material on the semiconductor wafer. A step of seeding the semiconductor wafer can be conducted by exposing the semiconducotor wafer to a germanium containing gas. A chlorine containing precursor and/or hydrogen can be introduced into the processing chamber to increase the selectivity of the silicon containing material to the underlying oxide. The selective HSG temperature of formation window is widened.

Abstract: A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

Abstract: A layer of silicon oxide is first formed on the silicon substrate. A mask is then formed on the oxide layer to define at least one surface region of the oxide that is not covered by the mask and a continuous strip of mask material that extends continuously around the unmasked oxide surface region. The mask is then used to etch the oxide surface region to expose an underlying substrate surface region and, thereby creating a continuous wall of oxide around the substrate surface region. The mask is then removed and oxygen ions are implanted into the silicon substrate to define a horizontal layer of oxide ions within the substrate. The wall of oxide surrounding the substrate surface region impairs the implant of oxygen ions beneath the wall such that a continuous substantially vertical wall of oxygen ions is formed in the substrate extending from the perimeter of the horizontal oxygen ion layer to the surface of the substrate.

Abstract: A method of fabricating layered integrated circuits on a silicon wafer utilizes the buried oxide insulating layer of a SOI structure for isolating junction devices such as diodes, well resistors, N.sup.30 resistors, P.sup.30 resistors, and bipolar junction transistors from MOS transistors. Consequently, junction devices are formed in the semiconductor substrate below the buried oxide insulation layer while the MOS transistors are formed in an epitaxial silicon layer above the buried oxide insulation layer. Furthermore, the MOS transistors located above the epitaxial silicon layer are isolated from each other by trench isolation structures. Since this invention provides a method of fabricating a layered integrated circuit structure whose devices can be stacked on top of each other in separate layers, the degree of integration for each unit area of wafer surface is increased.

Abstract: An SOI substrate and method of forming is described incorporating the steps of implanting oxygen under two conditions and performing two high temperature anneals at temperatures above 1250.degree. C. and above 1300.degree. C., respectively, at two respective oxygen concentrations. The invention overcomes the problem of high SOI substrate fabrication cost due to ion implant time and of getting high quality buried oxide (BOX) layers below a thin layer of single crystal silicon.

Abstract: A method of preparing an AlInAs/GaAs hetero-structure includes forming an Al.sub.1-x In.sub.x As (0<x<1) buffer layer in an amorphous state on a GaAs substrate, annealing the amorphous buffer layer to crystallize the buffer layer into a single crystal buffer layer, and forming a single crystal Al.sub.1-x' In.sub.x' As (0<x'<1) active layer on the single crystal buffer layer.

Abstract: A two-layer buried oxide enables fabrication of a silicon-on-insulator MOSFET with thick-film source/drain regions and a thin-film channel region. After a hole has been etched in the substrate above a first buried oxide layer (i.e., in the upper substrate), oxygen is implanted to form a second buried layer within the substrate below the first buried layer (i.e., within the lower substrate). After a hole (aligned with the hole through the upper substrate) has been etched in the first buried layer, p-type dopants are implanted to form upper doped regions within the upper substrate to either side of the holes and a lower doped region within the lower substrate below the holes but above the second buried layer. An epitaxial layer roughly as thick as first buried layer is grown on the upper and lower substrates, a conformal insulating film is deposited onto the epitaxial layer, and a gate electrode is formed on the on the insulating film.

Abstract: A method for manufacturing an SOI semiconductor substrate and a manufacturing apparatus therefor in which a mean implantation depth and a dose of each of a series of oxygen ion implantations are continuously or stepwise changed, a depthwise distribution of an oxygen atom concentration has a single peak and uniform in a plane at a predetermined depth, a maximum oxygen atom concentration is preferably no larger than 2.25.times.10.sup.22 atoms/cm.sup.3 and no smaller than 1.0.times.10.sup.22 atoms/cm.sup.3, a total oxygen dose is equal to a desired thickness of a buried oxide film multiplied by 4.48.times.10.sup.22 (in ions/cm.sup.3), and preferably a thermal process at a temperature of 1300.degree. C. or higher is applied after the completion of the oxygen ion implantation to form the buried oxide film.

Abstract: A process for the production of a structure having a thin semiconductor film (2) adhering to a target substrate (24). The process which is applicable to the production of electronic components comprises the steps ofa) producing a first structure having a thin semiconductor film (2) on a first substrate, andb) transferring of the thin film (2) from the first substrate to the target substrate.

Abstract: A method of producing an SOI substrate having a single-crystal silicon layer on a buried oxide layer in an electrically insulating state from the substrate by implanting oxygen ions into a single crystal silicon substrate and practicing an anneal processing in an inert gas atmosphere at high temperatures to form the buried oxide layer. After the anneal processing in which the thickness of the buried oxide layer becomes a theoretical value in conformity with the thickness of the buried oxide layer formed by the implanted oxygen, the oxidation processing of the substrate is carried out in a high temperature oxygen atmosphere.

Abstract: A lateral bipolar transistor capable of forming a narrow-sized diffusion region, such as a base width, is disclosed. The transistor exhibits no scattering in the direction of the depth of the width of the diffusion region. Emitter resistance is reduced by varying an impurity diffusion source at substantially a uniform concentration in a semiconductor portion and forming a diffusion region by diffusion from the impurity diffusion source. The bipolar transistor has an SOI structure. A method of making such device is also disclosed.

Abstract: A polysilicon layer is formed on a surface of a silicon substrate after oxygen ions are implanted into the silicon substrate and an SiO.sub.2 film is formed in the silicon substrate at a position in a prescribed depth from the surface of silicon substrate. A heat treatment is performed to a silicon layer between the polysilicon layer and the SiO.sub.2 film, thereby providing an SOI layer with improved crystal quality.

Abstract: Tetraindolylheptamethine ethers and alcohols of the isomeric formulae ##STR1## and ##STR2## and dyestuffs of the formula ##STR3## in which A, B, D and E denote ##STR4## and D'.sup..sym. denotes ##STR5## and the remaining symbols have the meanings given in the description, are used in pressure- and heat-sensitive recording materials.