Deposition Utilizing Plasma (e.g., Glow Discharge, Etc.) Patents (Class 438/485)
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Patent number: 6162717Abstract: A method of forming the gate structure of a MOS device forms a gate structure over a semiconductor substrate and then treats the sidewalls of the gate structure with nitrous oxide plasma so that the silicon and tungsten atoms within the gate structure can react with activated nitrogen in the plasma to form chemical bonds. Hence, a protective layer is formed on the gate sidewalls, thereby increasing thermal stability of the tungsten suicide layer and the polysilicon layer within the gate structure. Thereafter, an oxide material is formed over the protective layer using a rapid thermal oxidation. Next, spacers are formed over the sidewall oxide layer. Finally, subsequent operations necessary for forming a complete MOS device are performed.Type: GrantFiled: August 3, 1998Date of Patent: December 19, 2000Assignees: ProMOS Technologies, Inc, Mosel Vitelic, Inc., Siemens AGInventor: Ta-Hsun Yeh
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Patent number: 6159763Abstract: There is provided a method of forming a photovoltaic element, in which a p-type semiconductor layer is formed in a device for forming a semiconductor thin film having a cathod electrode structure, in which in a plasma discharge space, the surface area of a cathod electrode in a plasma discharge space is larger than the sum of surface areas of a belt-like member and an anode electrode, a potential of said cathod electrode at the time of excitation of glow discharge is positive relative to the belt-like member and the anode electrode, and a separator electrode partially constituting the cathod electrode is configured to have a form of a fin or a block, and an n-type semiconductor layer is formed in a device for forming a semiconductor thin film having a cathod electrode structure of a capacitive-coupling, parallel-plate type.Type: GrantFiled: September 10, 1997Date of Patent: December 12, 2000Assignee: Canon Kabushiki KaishaInventors: Akira Sakai, Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Yuzo Kohda, Tadashi Hori, Takahiro Yajima
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Patent number: 6150199Abstract: In one method for forming amorphous silicon antifuses with significantly reduced leakage current, a film of amorphous silicon is formed in a antifuse via between two electrodes. The amorphous silicon film is deposited using plasma enhanced chemical vapor deposition, preferably in an silane-argon environment and at a temperature between 200 and 500 degrees C., or reactively sputtered in a variety of reactive gases. In another method, an oxide layer is placed between two amorphous silicon film layers. In yet another method, one of the amorphous silicon film layers about the oxide layer is doped. In another embodiment, a layer of conductive, highly diffusible material is formed either on or under the amorphous silicon film. The feature size and thickness of the amorphous silicon film are selected to minimize further the leakage current while providing the desired programming voltage. A method also is described for for forming a field programmable gate array with antifuses.Type: GrantFiled: September 27, 1999Date of Patent: November 21, 2000Assignee: QuickLogic CorporationInventors: Ralph G. Whitten, Richard L. Bechtel, Mammen Thomas, Hua-Thye Chua, Andrew K. Chan, John M. Birkner
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Patent number: 6139701Abstract: A copper sputtering target is provided for producing copper films having reduced in-film defect densities. In addition to reducing dielectric inclusion content of the copper target material, the hardness of the copper target is maintained within a range greater than 45 Rockwell. Within this range defect generation from arc-induced mechanical failure is reduced. Preferably hardness is achieved by limiting grain size to less than 50 microns, and most preferably to less than 25 microns. The surface roughness preferably is limited to less than 20 micro inches, or more preferably, less than 5 micro inches to reduce defect generation from field-enhanced emission. This grain size range preferably is achieved by limiting the purity level of the copper target material to a level less than 99.9999%, preferably within a range between 99.995% to 99.9999%, while reducing particular impurity levels.Type: GrantFiled: March 18, 1999Date of Patent: October 31, 2000Assignee: Applied Materials, Inc.Inventors: Vikram Pavate, Seshadri Ramaswami, Murali Abburi, Murali Narasimhan
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Patent number: 6124186Abstract: A method or producing hydrogenated amorphous silicon on a substrate, comprising the steps of: positioning the substrate in a deposition chamber at a distance of about 0.5 to 3.0 cm from a heatable filament in the deposition chamber; maintaining a pressure in said deposition chamber in the range of about 10 to 100 millitorr and pressure times substrate-filament spacing in the range of about 10 to 100 millitorr-cm, heating the filament to a temperature in the range of about 1,500 to 2,000.degree. C., and heating the substrate to a surface temperature in the range of about 280 to 475.degree. C.Type: GrantFiled: April 24, 1998Date of Patent: September 26, 2000Assignee: Midwest Research InstituteInventors: Edith C. Molenbroek, Archie Harvin Mahan, Alan C. Gallagher
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Patent number: 6100466Abstract: Provided is a method of forming a microcrystalline silicon film by a plasma CVD, which comprises introducing a high frequency electromagnetic wave into a film forming space through an electrode to induce a plasma thereby forming a deposited film on a substrate, wherein the relation of 400<Q<10000 is satisfied when Q is defined as Q=P.multidot.f.sup.2 /d where d (cm) is the distance between the substrate and the electrode, P (Torr) is the pressure of the film forming space during formation of the deposited film, and f (MHz) is the frequency of the high frequency electromagnetic wave-forming method of microcrystalline silicon film for forming a microcrystalline silicon film by plasma CVD, wherein Q defined as Q=P.multidot.f.sup.Type: GrantFiled: November 23, 1998Date of Patent: August 8, 2000Assignee: Canon Kabushiki KaishaInventor: Tomonori Nishimoto
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Patent number: 6086726Abstract: The present invention provides a surface modification method that provides beneficial changes in surface properties, can modify a surface to a greater depth than previous methods, and that is suitable for industrial application. The present method comprises applying a thin-film coating to a surface of a substrate, then subjecting the coated surface to an ion beam. The ion beam power pulse heats the coated surface, leading to alloying between the material in the coating and the material of the substrate. Rapid cooling of the alloyed layer after an ion beam pulse can lead to formation of metastable alloys and microstructures not accessible by conventional alloying methods or intense ion beam treatment of the substrate alone.Type: GrantFiled: May 19, 1998Date of Patent: July 11, 2000Assignee: Sandia CorporationInventors: Timothy J. Renk, Neil R. Sorensen, Donna Cowell Senft, Rudolph G. Buchheit, Jr., Michael O. Thompson, Kenneth S. Grabowski
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Patent number: 6077759Abstract: A silicon oxide film is formed as an under film on a glass substrate and then an amorphous silicon film is formed thereon. Using hydrogen plasma produced by a frequency of 50 to 100 MHz, the amorphous silicon film formed on the glass substrate is processed. In this plasma processing, hydrogen atoms in the amorphous silicon film is combined with hydrogen atoms in the plasma with a high energy state, so that a gas is generated and the dehydrogenation from the amorphous silicon film progresses. After the dehydrogenation is completed, the heating treatment is performed to crystallize the amorphous silicon film and to transform the amorphous silicon film into a crystalline silicon film.Type: GrantFiled: September 12, 1997Date of Patent: June 20, 2000Assignee: Semiconductor Energy Laboratory Co.,Inventors: Shunpei Yamazaki, Satoshi Teramoto
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Patent number: 6015762Abstract: In a process of forming a silicon oxide film 116 that constitutes an interlayer insulating film with TEOS as a raw material through the plasma CVD method, the RF output is oscillated at 50 W, and the RF output is gradually increased from 50 W to 250 W (an output value at the time of forming a film) after discharging (after the generation of O.sub.2 -plasma). A TEOS gas is supplied to start the film formation simultaneously when the RF output becomes 250 W, or while the timing is shifted. As a result, because the RF power supply is oscillated at a low output when starting discharging, a voltage between the RF electrodes can be prevented from changing transitionally and largely.Type: GrantFiled: November 12, 1996Date of Patent: January 18, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Mitsunori Sakama, Masaaki Hiroki
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Patent number: 5989943Abstract: In one method for forming amorphous silicon antifuses with significantly reduced leakage current, a film of amorphous silicon is formed in a antifuse via between two electrodes. The amorphous silicon film is deposited using plasma enhanced chemical vapor deposition, preferably in an silane-argon environment and at a temperature between 200 and 500 degrees C., or reactively sputtered in a variety of reactive gases. In another method, an oxide layer is placed between two amorphous silicon film layers. In yet another method, one of the amorphous silicon film layers about the oxide layer is doped. In another embodiment, a layer of conductive, highly diffusible material is formed either on or under the amorphous silicon film. The feature size and thickness of the amorphous silicon film are selected to minimize further the leakage current while providing the desired programming voltage. A method also is described for for forming a field programmable gate array with antifuses.Type: GrantFiled: December 8, 1989Date of Patent: November 23, 1999Assignee: QuickLogic CorporationInventors: Ralph G. Whitten, Richard L. Bechtel, Mammen Thomas, Hua-Thye Chua, Andrew K. Chan, John M. Birkner
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Patent number: 5981388Abstract: A plasma CVD method for forming a film of a metal such as Ti on a substrate using a mixed gas including a metal-halogen compound and hydrogen with which the surface morphology of the metal film obtained is good, there is no corrosion of a conducting material layer or the like below the metal film and residual halogen in the film is low, and a semiconductor device having a metal film formed by this method. The plasma CVD method comprises employing prescribed plasma CVD conditions such that there are more activated hydrogen species present in the plasma than are consumed in the reduction of the metal-halogen compound and surplus activated hydrogen species uniformly terminate the substrate surface so that precursors produced by dissociation of the metal-halogen compound can freely migrate over the substrate and the metal film formed has a uniform thickness and good surface morphology.Type: GrantFiled: January 22, 1997Date of Patent: November 9, 1999Assignee: Sony CorporationInventor: Takaaki Miyamoto
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Patent number: 5904770Abstract: A method of manufacturing a semiconductor device which has a crystalline silicon film comprises the steps of forming crystal nuclei in a surface region of an amorphous silicon film and then growing the crystals from the nuclei by a laser light. Typically the crystal nuclei are silicon crystals or metal silicides having an equivalent structure as silicon crystal.Type: GrantFiled: July 29, 1996Date of Patent: May 18, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hisashi Ohtani, Akiharu Miyanaga, Junichi Takeyama
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Patent number: 5897332Abstract: A method for manufacturing a photoelectric conversion element containing at least one pin junction, wherein a diffusion preventing layer is provided between an n-type layer and an i-type layer and/or between an i-type layer and a p-type layer, and the diffusion preventing layer is deposited such that deposition temperature differs in its thickness direction.Type: GrantFiled: September 23, 1996Date of Patent: April 27, 1999Assignee: Canon Kabushiki KaishaInventors: Tadashi Hori, Shotaro Okabe, Masahiro Kanai, Akira Sakai, Yuzo Kohda, Tomonori Nishimoto, Takahiro Yajima
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Patent number: 5874350Abstract: A method for forming a functional silicon- or germanium-containing amorphous deposited film on a substrate which comprises a film-forming chamber having a film-forming space, a substrate holder and an electric heater for positioning the substrate in the film-forming chamber, an exhaust pipe in fluid communication with the film-forming chamber, a first gas-introducing portion for providing an active species (H), having an activation space for generating the active species (H), a microwave discharge supply source and a passage for providing a gaseous hydrogen-containing material into the activation space in order to produce the active species (H), a second gas-introducing portion for providing a gaseous silicon- or germanium-containing material (X), capable of reacting with the active species (H) to form a reaction product (HX) that is capable of forming the functional deposited film on the substrate, and a transportation path having a mixing space and a second microwave discharge energy supply source for promoType: GrantFiled: October 13, 1994Date of Patent: February 23, 1999Assignee: Canon Kabushiki KaishaInventor: Katsumi Nakagawa
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Patent number: 5851904Abstract: The invention relates to a method of manufacturing microcrystalline layers from elements of the principal group IV, particularly Si, Ge, Sn or their alloys such as SiC or SiGe by means of cyclic CVD or related methods, a cycle comprising two steps. a first step for producing an amorphous layer of the element in such a way that compounds and hydrogen are passed under conventional CVD conditions through separate access means into the reactor over the substrate, and in that in a second step, a hydrogen treatment takes place, the supply of the process gas flow, the hydrogen flow and the connection of the CVD reactor to the pump being closed at least intermittently during the second step, so that the hydrogen treatment takes place in a closed CVD process (CC-CVD process) with the quantity of hydrogen or element hydrogen compounds located in the reactor.Type: GrantFiled: May 17, 1996Date of Patent: December 22, 1998Inventors: Reinhard Schwarz, Svetoslav Koynov, Thomas Fischer
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Patent number: 5807495Abstract: Dielectrics represented by (Sr.sub.x Bi.sub.1-x)Bi.sub.2 Ta.sub.2 O.sub.y, wherein 0<x<1, and y represents the total number of oxygen atoms bonded to the respective metals, and thin films thereof, can be prepared by repeating the steps of applying compositions for forming the Sr--Bi--Ta--O-based dielectric thin films on substrates, drying and conducting a first-firing a plurality of times until the desired film thickness is achieved, and then conducting a second-firing for crystallization and compositions for forming Bi-based ferroelectric thin films and target materials for forming Bi-based ferroelectric thin films, both represented by the metal composition ((Sr.sub.a (Ba.sub.b, Pb.sub.c)).sub.x Bi.sub.y (Ta and/or Nb).sub.z wherein 0.4.ltoreq.X<1.0, 1.5.ltoreq.Y.ltoreq.3.5, Z=2, 0.7X.ltoreq.a<X, and 0<b+c.ltoreq.0.Type: GrantFiled: May 22, 1996Date of Patent: September 15, 1998Assignee: Mitsubishi Materials CorporationInventors: Katsumi Ogi, Tadashi Yonezawa, Tsutomu Atsuki
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Patent number: 5783492Abstract: A plasma processing method of performing plasma processing such as plasma film formation processing on a target object arranged in a processing vessel is disclosed. This method includes the first step of introducing an inert gas into the processing vessel, the second step of generating a plasma of the inert gas in the processing vessel, the third step of introducing a processing gas for processing the target object into the processing vessel, and the fourth step of generating a plasma of the processing gas in the processing vessel to process the target object.Type: GrantFiled: March 3, 1995Date of Patent: July 21, 1998Assignee: Tokyo Electron LimitedInventors: Kimihiro Higuchi, Chishio Koshimizu, Ryoichiro Koshi, Teruo Iwata, Nobuo Ishii
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Patent number: 5780355Abstract: A method for producing Group III nitride films with high indium content and superior optical quality. The Group III nitride film will produce light in the ultraviolet, blue, green, yellow, and red spectral regions. This will enable fabrication of full-color displays and produce a reliable white light source. A metal organic chemical vapor deposition (MOCVD) process in combination with a photochemical process reduces the growth temperature required to produce optical quality Group III nitride films.Type: GrantFiled: November 27, 1996Date of Patent: July 14, 1998Assignee: The Regents of the University of CaliforniaInventors: Umesh Kumar Mishra, Steven P. DenBaars, Stacia Keller
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Patent number: 5776819Abstract: A method of producing hydrogenated amorphous silicon on a substrate by flowing a stream of safe (diluted to less than 1%) silane gas past a heated filament.Type: GrantFiled: May 25, 1994Date of Patent: July 7, 1998Assignee: Midwest Research InstituteInventors: Archie Harvin Mahan, Edith C. Molenbroek, Brent P. Nelson
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Patent number: 5730808Abstract: Attractive multi-junction solar cells and single junction solar cells with excellent conversion efficiency can be produced with a microcrystalline tunnel junction, microcrystalline recombination junction or one or more microcrystalline doped layers by special plasma deposition processes which includes plasma etching with only hydrogen or other specified etchants to enhance microcrystalline growth followed by microcrystalline. nucleation with a doped hydrogen-diluted feedstock.Type: GrantFiled: June 27, 1996Date of Patent: March 24, 1998Assignee: Amoco/Enron SolarInventors: Liyou Yang, Liangfan Chen
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Patent number: 5720826Abstract: Provided are a photovoltaic element suitable for practical use, low in cost, high in reliability, and high in photoelectric conversion efficiency, and a fabrication process thereof. In the photovoltaic element having stacked layers of non-single-crystal semiconductors, at least an i-type semiconductor layer and a second conductivity type semiconductor layer are stacked on a first conductivity type semiconductor layer, and the second conduction type semiconductor layer has a layer A formed by exposing the surface of the i-type semiconductor layer to a plasma containing a valence electron controlling agent and a layer B deposited on the layer A by a CVD process using at least the valence electron controlling agent and the main constituent elements of the i-type semiconductor layer.Type: GrantFiled: May 29, 1996Date of Patent: February 24, 1998Assignee: Canon Kabushiki KaishaInventors: Ryo Hayashi, Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Jinsho Matsuyama, Akira Sakai, Yuzo Koda, Tadashi Hori, Takahiro Yajima
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Patent number: 5618758Abstract: A method for producing a thin semiconductor film according to the present invention includes the steps of: placing a group-IV compound or a derivative thereof in a plasma state; decomposing the group-IV compound or the derivative thereof into active species; and depositing the active species on a substrate, wherein energy for generating plasma is intermittently supplied at a supply time interval which is equal to or less than a reciprocal of {(secondary reaction rate constant of a source gas reacting with active species other than long-life active species within the plasma).times.(number of source gas molecules)}.Type: GrantFiled: February 15, 1996Date of Patent: April 8, 1997Assignee: Sharp Kabushiki KaishaInventors: Takashi Tomita, Katsuhiko Nomoto, Yoshihiro Yamamoto, Hitoshi Sannomiya, Sae Takagi