Abstract: A method for fabricating a semiconductor device includes forming a fuse over a substrate, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked, selectively removing the anti-reflective layer, forming an insulation layer over a whole surface of the resultant structure including the fuse, and performing repair-etching such that part of the insulation layer remains above the fuse.

Abstract: A simple active device array substrate and an easy repairing method thereof are provided. The pattern layer of the drain electrode has an extended portion extending to the region between an adjacent pixel electrode and the substrate. Once the pixel is found to be a white defect, a laser beam is used to irradiate the overlapped region of the extended portion of the pattern layer of the drain electrode and the adjacent pixel electrode. Then, the current pixel will have the same brightness and color with the adjacent pixel, such that the repairing purpose is achieved.

Abstract: Provided is a method for repairing a LCD panel. An opaque substance is disposed within a region on the thin film transistor panel of LCD panel corresponding to at least one pixel with the bright spot defect before forming a cell, or within a region on the LCD panel corresponding to at least one pixel with the bright spot defect after forming a cell.

Abstract: A method for restoring a dielectric constant of a layer of a silicon-containing dielectric material having a first dielectric constant and at least one surface, wherein the first dielectric constant of the layer of silicon-containing dielectric material has increased to a second dielectric constant, the method comprising the steps of: contacting the at least one surface of the layer of silicon-containing dielectric material with a silicon-containing fluid; and exposing the at least one surface of the layer of silicon-containing dielectric material to an energy source selected from the group consisting of: UV radiation, heat, and an electron beam, wherein the layer of silicon-containing dielectric material has a third dielectric constant that is lower than the second dielectric constant after exposing the layer of silicon-containing dielectric material to the energy source.

Abstract: An effective electropurge process and apparatus for wet processing of semiconductor wafers applies electrical charges to the wafer surface with an ample voltage sufficient to provide an effective field intensity which can substantially eliminate intolerable sub-0.05 micron “killer” defects when making highly advanced microchips with a feature size or line width less than 0.15 micron. The process can be used with frequent voltage reversal for automated wet-batch cleaning operations using cassettes that hold 10 to 50 wafers at a time and in various other operations involving megasonic transducers, mechanical brush scrubbers, laser cleaners and CMP equipment. The electropurge process is primarily intended for Fab plants where large wafers with a diameter of 200 to 400 mm require 250 to 350 steps including many dry layering, patterning and doping operations and at least 30 wet processing steps.

Abstract: In a lapping process for lapping away layers from a semiconductor device, where the region of interest is located near an edge or corner of the device, the method includes adding additional semiconductor material adjacent the region of interest.

Abstract: A failure analysis method according to the invention includes inputting the positions of failures in multiple wafers of an input device; preparing multiple sections in the multiple wafers; calculating feature amounts, which are represented by at least one numerical value representing a distribution of the failures in the multiple wafers, for each of the multiple sections; and representing by a first numerical value, the degree of similarity between the multiple wafers in terms of the feature amounts. Subsequently, the method includes detecting another wafer, which has the first numerical value greater than a predetermined first threshold, for each of the multiple wafers and forming a similar wafer group of multiple wafers with similar distributions of the failures.

Abstract: An exemplary repairing method includes providing a substrate having a plurality of conducting lines; detecting a broken position of one of the conducting lines; switching on a nozzle; and forming a copper layer at the broken position on the substrate. The repairing method of the present invention employing a repairing device for performing a chemical vapor deposition (CVD) method to forming the copper layer at a position of the broken defect of one of the conducting lines.

Abstract: Techniques for forming a magnetic device are provided. In one aspect, a method of forming a via hole self-aligned with a magnetic device comprises the following steps. A dielectric layer is formed over at least a portion of the magnetic device. The dielectric layer is configured to have an underlayer proximate to the magnetic device which comprises a first material, and an overlayer on a side of the underlayer opposite the magnetic device which comprises a second material. The first material is different from the second material. In a first etching phase, a first etchant is used to etch the dielectric layer, beginning with the overlayer, and through the overlayer. In a second etching phase, a second etchant which is selective for etching the underlayer is used to etch the dielectric layer through the underlayer.

Abstract: A method of making a nitride semiconductor substrate having the steps of providing a free-standing substrate that is of a nitride semiconductor and has one of a penetrating pit and a penetrating crack that penetrate from a top surface to a back surface of the free-standing substrate, attaching a metal to the penetrating pit or the penetrating crack, the metal being adapted to be nitrided, and nitriding the metal to form a nitride that seals the penetrating pit or the penetrating crack. A nitride semiconductor substrate has a free-standing substrate that is formed of a nitride semiconductor and has one of a penetrating pit and a penetrating crack that penetrate from a top surface to a back surface of the free-standing substrate, and a metal nitride that seals the penetrating pit or the penetrating crack. The metal nitride is formed of GaN, InN and AlN.

Abstract: The present invention provides a method for repairing a damaged insulating layer in a semiconductor device comprising pre-cleaning the damaged insulating layer of the semiconductor device, depositing a CNH polymeric cap material on said damaged insulating layer, wherein said polymeric cap material comprises between about 10 and about 90 atomic percent C, between about 10 and about 70 atomic percent N, between about 10 and about 55 atomic percent H and at least one active vinyl group following deposition, depositing a further polymeric cap material on said deposited CNH polymeric cap material and treating said semiconductor device with UV irradiation to effectively repair the damaged insulating layer.

Abstract: A process for fabricating an MOS device specifically a DRAM device, featuring passivation of defects in regions of a semiconductor substrate wherein defects left unpassivated can deleteriously influence data retention time, has been developed. A high density plasma dry etching procedure used to define the DRAM conductive gate electrode can create unwanted defects in a region near the surface of uncovered portions of the semiconductor substrate during the high density plasma procedure over etch cycle. Implantation of a group V element such as arsenic can be used to passivate the unwanted plasma etch defects, thus reducing the risk of defect related device leakage phenomena.

Abstract: A pixel structure includes a backup thin film transistor with a float gate electrode or a float drain electrode and a working thin film transistor. When the pixel of the working thin film transistor does not work, the backup thin film transistor replaces the working thin film transistor to drive the pixel. The method of repairing the pixel is to cut off the connection between the drain electrode of the working thin film transistor and the pixel electrode, and then to connect the gate electrode or the drain electrode of the backup thin film transistor to the gate electrode or the drain electrode of the working thin film transistor, such that the backup thin film transistor can replace the working thin film transistor to drive the pixel electrode.

Abstract: The present invention provides a method for restoring the dielectric properties of a porous dielectric material. The method comprises providing a substrate comprising at least one layer of a porous dielectric material comprising a contaminant comprising at least one entrapped liquid having a surface tension, wherein the porous dielectric material comprising the at least one contaminant has a first dielectric constant. The substrate is contacted with a restoration fluid comprising water and at least one compound having a surface tension that is less than the surface tension of the at least one entrapped liquid in the at least one layer of a porous dielectric material. Upon drying, the porous dielectric material has a second dielectric constant that is lower than the first dielectric constant and all constituents of the restoration fluid are removed upon drying.

Abstract: An improved compensation circuit that compensates for lifetime performance drifts due to aging of integrated circuits to improve the circuit performance.

Abstract: A method is used to prevent unwanted electrical contacts between various electrically conducting surfaces and lines in a display panel due to an n+ a-Si residue and/or ITO debris. The method provides a clearing pattern including at least a cleared area in the passivation layer for preventing the residue or debris from locating at the cleared area. As such, if an n+ a-Si residue happens to be deposited under the passivation layer, the part of the residue located in the cleared area is removed by an a-Si selective etching process, for example. Furthermore, with the cleared area, ITO debris deposited on the section of the dielectric layer deposited on the signal line can be electrically isolated from the electrode.

Abstract: The present invention provides a method of manufacturing a silicon wafer where a defect does not exist at a wafer surface layer part on which a device is formed, without affecting productivity and production costs of the wafer. An ingot of a silicon single crystal is grown by way of Czochralski single crystal pulling method, this silicon single crystal ingot is sliced to produce a wafer, then a surface layer of the wafer is annealed for between 0.01 microseconds and 10 seconds (inclusive) by means of a laser spike annealing apparatus such that a temperature of a wafer surface layer part is between 1250° C. and 1400° C. (inclusive).

Abstract: A method for fabricating a semiconductor device, includes forming a porous dielectric film above a substrate using a porous insulating material, forming an opening in the porous dielectric film, repairing film quality of the porous dielectric film on a surface of the opening by feeding a predetermined gas replacing a Si—OH group to the opening, and performing pore sealing of the surface of the opening using the same predetermined gas as that used for film quality repairs after repairing the film quality.

Abstract: A method of repairing a bonded metallic structure having a first metallic member bonded to a second metallic member is provided. The method includes the steps of: A) forming a hole in at least one of the first metallic member and second metallic member, wherein said hole is sufficiently configured to receive a slug; B) inserting said slug into said hole; and C) passing electrical current through said slug of sufficient intensity to promote melting at the interface between the first metallic member, second metallic member, and said slug, thereby securing the first metallic member with respect to the second metallic member. Alternately, the method may include: D) positioning said slug near said hole; E) passing electrical current through said slug of sufficient intensity to promote arcing between said slug and the bonded metallic structure; and F) inserting said slug into said hole thereby securing the first metallic member with respect to the second metallic member.

Abstract: The pixel structure and the repairing method of the TFT array substrate are provided. The pixel has a semiconductor electrode which is partially overlapped with a floating metal located in the first conductive layer. Both the data line and the drain electrode have protruded regions partially overlapped with the semiconductor electrode and the floating metal. Once the pixel is found to be a white defect, a laser beam is used to irradiate the protruded region of the data line to electrically connect the data line and the floating metal and so as to form a diode structure having the rectified effect. Consequently, after the laser repair, the pixel defect will display as the non-flicked white point and black point in the white-picture inspection and the black-picture inspection respectively.

Abstract: A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

Abstract: A packaging substrate and a method of manufacturing the same are provided. The method includes following steps. First, a first substrate including at least one defected packaging unit and several first packaging units is provided. The defected packaging unit and the first packaging units are arranged in an array on the first substrate. Next, the defected packaging unit is removed from the first substrate to correspondingly form at least one opening in the first substrate. Then, a second substrate including at least one second packaging unit is provided. Later, the second packaging unit is separated from the second substrate. The area of the second packaging unit is less than that of the opening. Subsequently, the second packaging unit is disposed in the opening. The edge of the second packaging unit is placed partially against an inner wall of the opening.

Abstract: Various embodiments of methods and systems for designing and constructing displays from multiple light-modulating elements are disclosed. Display elements having different light-modulating and self-assembling characteristics may be used during display assembly and operation.

Abstract: A method for the manufacture of solar panels from scrapped wafers and/or scrapped dies is provided, including the following steps: identifying scrap wafers and/or scrap dies; cleaning and removing remaining structures from the surface of the wafers/dies; grinding both surfaces of the wafers/dies down to a required thickness; doping the wafers/dies; and further processing the wafers/dies using a solar panel manufacturing method.

Abstract: A semiconductor device may include multiple fuses spaced at a same pitch from each other and a check pattern spaced a predetermined distance from one side of the fuses, where the check pattern has the same width, height, and pitch as the fuses, and the fuses may be formed of a conductive material that may be one of W, WSi, Al or Cu.

Abstract: A method to correct critical dimension errors during a semiconductor manufacturing process. The method includes providing a first semiconductor device. The first semiconductor device is analyzed to determine at least one critical dimension error within the first semiconductor device. A dose of electron beam exposure to correct the at least one critical dimension error during a subsequent process to form a second semiconductor device, or during modification of the first semiconductor device is determined. The subsequent process comprises providing a semiconductor structure. The semiconductor structure comprises a photoresist layer on a semiconductor substrate. A plurality of features are formed in the photoresist layer. At least one feature of the plurality of features comprises the at least one critical dimension error.

Abstract: A process for treating substrates for the microelectronics or optoelectronics industry, wherein the substrates include on at least one of their faces a working layer in which components are intended to be formed. The process includes a step of annealing under a reductive atmosphere followed by a step of chemical-mechanical polishing on the free surface of the working layer.

Abstract: In a production method of an electron source wherein a plurality of electron-emitting devices are connected by and driven by matrix wirings, the upper wiring of the matrix wiring is partially removed at a short circuit region at a cross portion between the matrix wirings, thereby removing the short circuit and effectively repairing an electrical connecting relation of the matrix wirings.

Abstract: A method to de-packaging a semiconductor device to access and test the die within the package. The method involves initially removing molding compound from a first surface of the package to expose the underlying die attach pad of the package. A mask is then formed over the die attach-pad. An etching solution is subsequently introduced through an opening in the mask to etch away the die attach pad. Once the etching is complete, the die attach film is removed. An ohmic contact is then formed on the exposed back surface of the die. The ohmic contact is used to ground the die so that the electrical circuitry on the device will operate properly. Once grounded, the circuitry on the die can be electrically tested and debugged.

Abstract: Methods for repairing an electrical circuit; compositions, inks and equipment for making such repairs; and repair structures formed by the methods. The method generally includes the steps of: (a) depositing a composition comprising nanoparticles of an electrically functional material such that it contacts first and second elements of the circuit; and (b) sufficiently irradiating at least part of the composition with light to fuse or bind the nanoparticles to each other. The composition and ink generally comprise such nanoparticles and a sensitizer having a light absorption maximum at a wavelength different from that of the nanoparticles. The apparatus comprises: (1) a deposition apparatus configured to deposit a liquid film of an electrically functional material on the circuit; (2) a light source configured to irradiate at least part of the thin film; and (3) a table configured to secure the substrate.

Abstract: When any of pixels is not lit in an organic EL display having an organic EL layer between a first electrode and a second electrode, an organic layer of the pixel is observed. If the organic layer of the pixel contains foreign matter, the second electrode is separated into a region in contact with the foreign matter and a region not in contact with both the contact region and the foreign matter. Thus, not-lit display regions are reduced as less as possible, making it possible to manufacture an organic EL display excellent in display performance.

Abstract: A method for patching up thin-film transistor (TFT) circuit patterns on a display panel comprises the following steps. Firstly, a mask having an opening is placed above the display panel and the opening corresponds to the location of the cracks of the circuits on the display panel. Subsequently, a plasma sputtering procedure is performed to deposit a metal thin film through the opening of the mask on the display panel so as to connect the broken circuits. When the metal thin film is covered on a plurality of the circuits, a laser cut-out procedure is performed to cut apart the metal thin film on the plurality of the circuits so as to prevent the different circuits from short circuits.

Abstract: Systems and methods for repairing defects on a specimen are provided. A method may include processing a specimen, detecting defects on the specimen, and repairing one or more of the defects. An additional method may include detecting defects on a specimen, repairing one or more of the defects, and inspecting the specimen to detect defects remaining on the specimen subsequent to repair. A system may include a process chamber, a measurement device configured to detect defects on a specimen, and a repair tool configured to repair one or more of the defects detected on the specimen. An additional system may include a measurement device, a repair tool, and an inspection tool configured to detect defects remaining on the specimen subsequent to repair. The systems may also include a processor configured to alter a parameter of an instrument coupled to the repair tool in response to output from the measurement device.

Abstract: The invention relates to a method for enabling repair of a defect in a substrate, particularly the invention provides a method and apparatus for enabling repair of a pattern shape in a semiconductor device, which has not been able to be practiced because of lack of a suitable method, and further provides a method for manufacturing the semiconductor device using those. A method for repairing the pattern shape of a substrate having an imperfect pattern is used, which includes (a) a step for inspecting the substrate and thus detecting the imperfect pattern, and (b) a step for repairing the pattern shape by performing etching or deposition to the detected imperfect-pattern using radiation rays. Moreover, apparatus for repairing a pattern shape of a via-hole in a wafer having an imperfect via-hole is used, which has a defect inspection section for detecting the imperfect via-hole, and an etching section for etching the imperfect via-hole using a fast atom beam.

Abstract: A method, apparatus, and computer program product for flattening a warped substrate. The substrate is placed on a planar surface of a clamping apparatus in direct mechanical contact with the planar surface. The substrate comprises surface regions S1, S2, . . . , SN having an average warpage of W1, W2, . . . , WN, respectively, wherein W1?W2? . . . ?WN and W1?WN. Zones Z1, Z2, . . . , ZN of the planar surface respectively comprise vacuum port groups G1, G2, . . . , GN. Each group comprises at least one vacuum port. N is at least 2. A vacuum pressure PV1, PV2, . . . , PVN is generated at each vacuum port within group G1, G2, . . . , GN, at a time of T1, T2, . . . , TN to clamp surface region S1, S2, . . . , SN to zone Z1, Z2, . . . , ZN, respectively. The vacuum pressure PV1, PV2, . . . , PVN is maintained at the vacuum ports of group G1, G2, . . . , GN, respectively, until time TN+1. T1<T2< . . . <TN<TN+1.

Abstract: A low-k dielectric layer having a composition of silicon, oxygen and carbon is removed from a wafer. The low-k dielectric layer is removed by exposing a surface of the low-k dielectric layer to an oxygen-containing gas to oxidized the surface. The oxidized surface is immersed in an etching solution having HF and H2SO4 to etch the low-k dielectric layer. The etched surface is exposed to at least one of (i) an etching solution having H2SO4 and H2O2, and (ii) an RF or microwave energized oxygen-containing gas, to remove the low-k dielectric layer from the wafer.

Abstract: A method for monitoring an ion implanter is disclosed. In one embodiment, the method comprises providing a wafer, forming a barrier layer on the surface of the wafer wherein the barrier layer has a substantial blocking effect on ion implantation, performing an ion implantation process to the wafer, performing a thermal treatment process, removing the barrier layer, and measuring a physical property of the wafer. The measured physical property of the wafer can be used to ascertain the status of the ion implanter. For instance, the measured physical property can be used to determine whether the ion implanter has problems when the energy or concentration of the implanted ions is changed.

Abstract: Disclosed is an IC package including an interpose substrate and lands for external connection disposed on a face of the interpose substrate in a grid pattern, the interpose substrate having a penetration hole on at least a position between the lands for external connection disposed in a grid pattern. Besides, there are disclosed an inspection method of an IC package mounting body mounting this IC package, a repairing method of an IC package mounting body mounting this IC package, and an inspection pin for an IC package mounting body used for such an inspection.

Abstract: The present invention is generally directed to various methods and systems for calibrating degradable components using process state data. In one illustrative embodiment, the method includes providing a tool comprised of at least one process chamber, providing at least one process state sensor that is adapted to obtain process state data regarding at least one characteristic of a process environment established in the chamber in performance of a process operation, operatively coupling at least one of a new or repaired degradable component to the tool, and calibrating the new or repaired degradable component based upon the process state data. In further embodiments, the method comprises processing a plurality of additional workpieces in the tool after the new or repaired degradable components have been calibrated using process state data in accordance with one aspect of the present invention.

Abstract: Methods and systems for preparing a substrate for analysis are provided. One method includes removing a portion of a copper structure on the substrate using an etch chemistry in combination with an electron beam. The etch chemistry is substantially inert with respect to the copper structure except in the presence of the electron beam. Other methods involve forming masking layers on a substrate that will protect the substrate during etching. For example, one method includes exposing a first portion of the substrate to an electron beam. A second portion of the substrate not exposed to the electron beam includes a copper structure. The method also includes exposing the substrate to a fluorine containing chemical. The fluorine containing chemical bonds to the first portion but not the second portion to form a fluorine containing layer on the first portion.

Abstract: A method and apparatus for oxidizing conductive redeposition in TMR sensors is disclosed. A TMR barrier layer is etched. Redeposition material is oxidized and the barrier is healed using an oxidizing agent selected from the group consisting of ozone and water vapor.

Abstract: A modifiable circuit structure and its method of formation are disclosed. The modifiable circuit structure electrically couples one portion of an interconnect with another portion of the interconnect through vias disposed in a dielectric layer. The combination of the modifiable circuit structure, the interconnect portions, and the vias provide a signal path between transistors in an integrated circuit. In one embodiment the modifiable circuit structure is a polysilicon feature formed over regions of a semiconductor substrate. In an alternative embodiment, the modifiable circuit structure is a diffusion region formed in region the semiconductor substrate.

Abstract: In a method of opening of a housing of a plastic-housed electronic module by a laser, the electronic module is protected from the effects of the laser beam and the laser beam is stopped at a suitable time by providing an end point signal detection due to the laser beam impinging on a protective layer. Thereby, after opening the housing, electrical measurements can be carried out on the electronic module.

Abstract: A method is described for repairing failure points, regions or locations in an electronic device to have a perfect function when a semiconductor device including an LCD of other electronic device has defects. Described is a method of transferring a single or multi-layer thin film piece into a recess with the physical properties of the thin film piece unchanged. An electronic device is described incorporating a substrate; and a plurality of thin films laminated on the substrate and part of the thin films are formed on a predetermined circuit pattern, wherein a transfer film for repairing a defect is fitted into a recess where the low layers of the thin films are exposed by removing part of a single or multi-layer thin films covering a defective portion included on the thin films and its surrounding portion.

Abstract: Method and apparatus for using a silylating agent after exposure to an oxidizing environment for repairing damage to low-k dielectric films are described. Plasma photoresist removal, or ashing, may damage bonds in the low-k materials, which may lead to a significant increase in the dielectric constant of the materials. The silylating agent may be used to repair damage to the low-k films after the ashing process. Additionally, a curing process using an oxidizing environment may damage bonds in low-k materials, which may subsequently be repaired by a silylating process. The described method and apparatus may be used with low-k dielectric films including hydrophobic porous oxide films. A chamber for processing a wafer in an oxidizing environment and subsequently performing a silylation process includes an oxidizing agent inlet and a silylating agent inlet.

Abstract: A method for removing a die from a plastic package. The first step of the method is to remove the package's cap. Next, the package and the die within it are placed on a hot plate and heated up. When the plastic package's temperature reaches a certain limit, the plastic package cracks, resulting in at least one fracture in the package. Each side of the cracked plastic package along the fracture is then grasped by a pair of pliers and the two pairs of pliers are pulled in opposite directions. As a result, the die is detached from the plastic package.

Abstract: Backside failure analysis of integrated circuits. In one embodiment, a method of preparing a device under test (DUT) for an image based diagnostic testing is disclosed. The method comprises removing a portion of the backside package of the DUT to allow for the implementation of an image based diagnostic test through the backside of the DUT. The functionality of DUT is destroyed by the removal of the portion of the backside package of the DUT. Further, restoring the functionality of the DUT with an interface carrier before an image based diagnostic test is conducted.

Abstract: A method of repairing a light emitting device which makes high quality image display possible even if a pin hole is formed during formation of an EL layer is provided. The method of repairing a light emitting device is characterized in that a reverse bias voltage is applied to an EL element at given time intervals to thereby reduce a current flowing into an EL element when the reverse bias voltage is applied to the EL element.

Abstract: Method and device for cutting a wire with a small number of processing operations. The method includes forming a cut portion by scanning the semiconductor substrate with a focused ion beam to cut the wire. The method further includes forming a clear region continuously from the cut portion by scanning the semiconductor substrate with the focused ion beam. The clear region is free of stray material of the wire.

Abstract: A method of repairing a defect in an integrated electronic circuit caused by an incorrect lithographic mask includes the formation of an electrical isolation between two conducting parts of the circuit. The electrical isolation is obtained by at least partly filling, with an electrically insulating material, a volume hollowed out beforehand which would otherwise, and incorrectly, form an electrical connection between the two conducting parts. To do this, a mask having an aperture revealing the hollowed out volume is formed on the circuit, and the mask used to direct the filling of the electrically insulating material and correction of the lithography defined defect.