Abstract: A method of preparing GaN material includes subjecting a GaN substrate to at least two cycles of Ga deposition and desorption, then applying a layer of AlN to the GaN substrate, then growing GaN on the AlN layer by molecular beam epitaxy. This results in reduced concentrations of oxygen, carbon, and silicon impurities.

Abstract: Disclosed herein are various methods of forming a silicon seed layer and layers of silicon and silicon-containing material therefrom. In one example, the method includes forming a layer of silicon dioxide above a structure, converting at least a portion of the layer of silicon dioxide into a silicon-salt layer and converting at least a portion of the silicon-salt layer to a layer of silicon.

Abstract: A carbon-rich carbon boron nitride dielectric film having a dielectric constant of equal to, or less than 3.6 is provided that can be used as a component in various electronic devices. The carbon-rich carbon boron nitride dielectric film has a formula of CxByNz wherein x is 35 atomic percent or greater, y is from 6 atomic percent to 32 atomic percent and z is from 8 atomic percent to 33 atomic percent.

Abstract: A method is provided for fabricating a light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures with planar surfaces. The method forms a plurality of GaN pillar structures, each with an n-doped GaN (n-GaN) pillar and planar sidewalls perpendicular to the c-plane, formed in either an m-plane or a-plane family. A multiple quantum well (MQW) layer is formed overlying the n-GaN pillar sidewalls, and a layer of p-doped GaN (p-GaN) is formed overlying the MQW layer. The plurality of GaN pillar structures are deposited on a first substrate, with the n-doped GaN pillar sidewalls aligned parallel to a top surface of the first substrate. A first end of each GaN pillar structure is connected to a first metal layer. The second end of each GaN pillar structure is etched to expose the n-GaN pillar second end and connected to a second metal layer.

Abstract: Provided is a method for manufacturing a nitride semiconductor device, including the steps of: forming an AlNO buffer layer containing at least aluminum, nitrogen, and oxygen on a substrate; and forming a nitride semiconductor layer on the AlNO buffer layer, wherein, in the step of forming the AlNO buffer layer, the AlNO buffer layer is formed by a reactive sputtering method using aluminum as a target in an atmosphere to and from which nitrogen gas and oxygen gas are continuously introduced and exhausted, and the atmosphere is an atmosphere in which a ratio of a flow rate of the oxygen gas to a sum of a flow rate of the nitrogen gas and the flow rate of the oxygen gas is not more than 0.5%.

Abstract: A method of removing at least one oxide from a surface of a body of semiconductor material is disclosed, the method comprising: arranging the body in a vacuum chamber; and maintaining a temperature of the body in the vacuum chamber within a predetermined range, or substantially at a predetermined value, while exposing said surface to a flux of indium atoms. Corresponding methods of processing an oxidised surface of a body of semiconductor material to prepare the surface for epitaxial growth of at least one epitaxial layer or film over said surface, and methods of manufacturing a semiconductor device are also disclosed.

Abstract: An epitaxial growth method includes plasma treating a surface of a bulk crystalline Aluminum Nitride (AlN) substrate and subsequently heating the substrate in an ammonia-rich ambient to a temperature of above 1000° C. for at least 5 minutes without epitaxial growth. After heating the surface, a III-nitride layer is epitaxially grown on the surface.

Abstract: A main surface of a silicon carbide substrate is inclined by an off angle in an off direction from {0001} plane of a hexagonal crystal. The main surface has such a characteristic that, among emitting regions emitting photoluminescent light having a wavelength exceeding 650 nm of the main surface caused by excitation light having higher energy than band-gap of the hexagonal silicon carbide, the number of those having a dimension of at most 15 ?m in a direction perpendicular to the off direction and a dimension in a direction parallel to the off direction not larger than a value obtained by dividing penetration length of the excitation light in the hexagonal silicon carbide by a tangent of the off angle is at most 1×104 per 1 cm2. Accordingly, reverse leakage current can be reduced.

Abstract: The present invention relates to a method of manufacturing a semiconductor device by which the length of nanowires perpendicularly formed can be fabricated with high reproducibility. The method of manufacturing a semiconductor device includes the steps of forming a first layer; forming a stop layer on the first layer, the stop layer having a higher Young's modulus than the first layer; forming a recess by partially removing the first layer and the stop layer; growing nanowires in the recess; forming a planarizing layer; removing the planarizing layer to the level of the stop layer to expose the nanowires from the surface of the planarizing layer; and forming an electrode so as to be in contact with the upper ends of the nanowires.

Abstract: A stress sensor is disclosed herein. The stress sensor includes a plurality of carbon nanotubes in a substrate, and first and second contacts electrically connectable with the plurality of carbon nanotubes. Methods of making and using the stress sensor are also disclosed.

Abstract: A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer.

Abstract: A method for producing a Ga-containing group III nitride semiconductor having reduced threading dislocation is disclosed. A buffer layer in a polycrystal, amorphous or polycrystal/amorphous mixed state, comprising AlGaN is formed on a substrate. The substrate having the buffer layer formed thereon is heat-treated at a temperature higher than a temperature at which a single crystal of a Ga-containing group III nitride semiconductor grows on the buffer layer and at a temperature that the Ga-containing group III nitride semiconductor does not grow, to reduce crystal nucleus density of the buffer layer as compared with the density before the heat treatment. After the heat treatment, the temperature of the substrate is decreased to a temperature that the Ga-containing group III nitride semiconductor grows, the temperature is maintained, and the Ga-containing group III nitride semiconductor is grown on the buffer layer.

Abstract: Bulk III-nitride semiconductor materials are deposited in an HPVE process using a metal trichloride precursor on a metal nitride template layer of a growth substrate. Deposition of the bulk III-nitride semiconductor material may be performed without ex situ formation of the template layer using a MOCVD process. In some embodiments, a nucleation template layer is formed ex situ using a non-MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In additional embodiments, a nucleation template layer is formed in situ using an MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In further embodiments, a nucleation template layer is formed in situ using an HVPE process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process.

Abstract: A method of manufacturing carbon cylindrical structures, as represented by carbon nanotubes, by growing them on a substrate using a chemical vapor deposition (CVD) method, comprising the steps of implanting metal ions to the substrate surface and then growing the carbon cylindrical structures using the metal ions as a catalyst. A method of manufacturing carbon nanotubes comprising a step of using nano-carbon material as seed material for growing carbon nanotubes is also disclosed. A biopolymer detection device comprising vibration inducing part for inducing vibration, binding part capable of resonating with the vibration induced by the vibration inducing part and capable of binding or interacting with a target biopolymer, and detection part for detecting whether or not the binding part have bound or interacted with the target biopolymer, is also disclosed.

Abstract: A photovoltaic device includes a semiconductor nanocrystal and a charge transporting layer that includes an inorganic material. The charge transporting layer can be a hole or electron transporting layer. The inorganic material can be an inorganic semiconductor.

Abstract: Methods and apparatus for depositing thin films incorporating the use of a surfactant are described. Methods and apparatuses include a deposition process and system comprising multiple isolated processing regions which enables rapid repetition of sub-monolayer deposition of thin films. The use of surfactants allows the deposition of high quality epitaxial films at lower temperatures having low values of surface roughness. The deposition of Group III-V thin films such as GaN is used as an example.

Abstract: A first processing gas containing a first element and a second processing gas containing a second element are alternately supplied to a surface of a substrate placed in a processing chamber, to thereby form a first thin film, and a second processing gas and a third processing containing the first element and different from the first processing gas are alternately supplied, to thereby form a second thin film on the first thin film, having the same element component as that of the first thin film.

Abstract: A method for producing a group III nitride crystal in the present invention includes the steps of cutting a plurality of group III nitride crystal substrates 10p and 10q having a main plane from a group III nitride bulk crystal 1, the main planes 10pm and 10qm having a plane orientation with an off-angle of five degrees or less with respect to a crystal-geometrically equivalent plane orientation selected from the group consisting of {20-21}, {20-2-1}, {22-41}, and {22-4-1}, transversely arranging the substrates 10p and 10q adjacent to each other such that the main planes 10pm and 10qm of the substrates 10p and 10q are parallel to each other and each [0001] direction of the substrates 10p and 10q coincides with each other, and growing a group III nitride crystal 20 on the main planes 10pm and 10qm of the substrates 10p and 10q.

Abstract: The present invention provides novel silicon-germanium hydride compounds, methods for their synthesis, methods for their deposition, and semiconductor structures made using the novel compounds.

Abstract: The present invention provides novel silicon-germanium hydride compounds, methods for their synthesis, methods for their deposition, and semiconductor structures made using the novel compounds.

Abstract: A method of synthesizing a nanowire. The method includes disposing a first oxide layer including germanium (Ge) on a substrate, forming a second oxide layer including a nucleus by annealing the first oxide layer, and growing a nanowire including Ge from the nucleus by a chemical vapor deposition (“CVD”) method.

Abstract: A method of producing a semiconductor wafer includes placing a base wafer within a reaction chamber, and epitaxially growing a p-type Group 3-5 compound semiconductor on the base wafer by supplying, into the reaction chamber, a Group 3 source gas consisting of an organometallic compound of a Group 3 element, a Group 5 source gas consisting of a compound of a Group 5 element, and an impurity gas including an impurity that is to be incorporated as a dopant into a semiconductor to serve as a donor. Here, during the epitaxial growth of the p-type Group 3-5 compound semiconductor, the flow rate of the impurity gas and the flow rate ratio of the Group 5 source gas to the Group 3 source gas are set so that the product N×d (cm?2) of the residual carrier concentration N (cm?3) and the thickness d (cm) of the p-type Group 3-5 compound semiconductor may be 8.0×1011 or less.

Abstract: A manufacturing method of a microelectronic device including at least one semi-conductor zone which rests on a support and which exhibits a germanium concentration gradient in a direction parallel to the principal pane of the support.

Abstract: Embodiments of methods for depositing silicon germanium (SiGe) layers on a substrate are disclosed herein. In some embodiments, the method may include depositing a first layer comprising silicon and germanium (e.g., a seed layer) atop the substrate using a first precursor comprising silicon and chlorine; and depositing a second layer comprising silicon and germanium (e.g., a bulk layer) atop the silicon germanium seed layer using a second precursor comprising silicon and hydrogen. In some embodiments, the first silicon precursor gas may comprise at least one of dichlorosilane (H2SiCl2), trichlorosilane (HSiCl3), or silicon tetrachloride (SiCl4). In some embodiments, the second silicon precursor gas may comprise at least one of silane (SiH4), or disilane (Si2H6).

Abstract: Non-destructive pretreatment methods are generally provided for a surface of a SiC substrate with substantially no degradation of surface morphology thereon. In one particular embodiment, a molten mixture (e.g., including KOH and a buffering agent) is applied directly onto the surface of the SiC substrate to form a treated surface thereon. An epitaxial film (e.g., SiC) can then be grown on the treated surface to achieve very high (e.g., up to and including 100%) BPD to TED conversion rate close to the epilayer/substrate interface.

Abstract: Reusing a Si wafer for the formation of wire arrays by transferring the wire arrays to a polymer matrix, reusing a patterned oxide for several array growths, and finally polishing and reoxidizing the wafer surface and reapplying the patterned oxide.

Abstract: An array of sensor devices, each sensor including a set of semiconducting nanotraces having a width less than about 100 nm is provided. Method for fabricating the arrays is disclosed, providing a top-down approach for large arrays with multiple copies of the detection device in a single processing step. Nanodimensional sensing elements with precise dimensions and spacing to avoid the influence of electrodes are provided. The arrays may be used for multiplex detection of chemical and biomolecular species. The regular arrays may be combined with parallel synthesis of anchor probe libraries to provide a multiplex diagnostic device. Applications for gas phase sensing, chemical sensing and solution phase biomolecular sensing are disclosed.

Abstract: Methods of forming polysilicon layers are described. The methods include forming a high-density plasma from a silicon precursor in a substrate processing region containing the deposition substrate. The described methods produce polycrystalline films at reduced substrate temperature (e.g. <500° C.) relative to prior art techniques. The availability of a bias plasma power adjustment further enables adjustment of conformality of the formed polysilicon layer. When dopants are included in the high density plasma, they may be incorporated into the polysilicon layer in such a way that they do not require a separate activation step.

Abstract: A method of fabricating an epitaxial layer includes providing a substrate. The substrate is etched to form at least a recess within the substrate. A surface treatment is performed on the recess to form a Si—OH containing surface. An in-situ epitaxial process is performed to form an epitaxial layer within the recess, wherein the epitaxial process is performed in a hydrogen-free atmosphere and at a temperature lower than 800° C.

Abstract: A gas dispersion apparatus for use with a process chamber, comprising: a quartz body having a top, a ring coupled to a bottom surface of the top and a bottom plate having dispersion holes coupled to the ring opposite the top; a plurality of quartz plates disposed between the top and the bottom plate, wherein the plurality of plates are positioned above one another and spaced apart to form a plenum above each of the plurality of plates and the bottom plate; a plurality of quartz tubes to couple the plenums to the plurality of dispersion holes, each of the plurality of quartz tubes having a first end disposed within one of the plenums and having a second end coupled to one of the dispersion holes; and a plurality of conduits disposed through the top, wherein each of the plurality of conduits is coupled to one of the plenums.

Abstract: Atomic layer deposition (ALD) processes for forming thin films comprising InN are provided. The thin films may find use, for example, in light-emitting diodes.

Abstract: A semiconductor device with a metal gate is disclosed. The device includes a semiconductor substrate, source and drain features on the semiconductor substrate, and a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes an interfacial layer (IL) layer, a high-k (HK) dielectric layer formed over the semiconductor substrate, an oxygen scavenging metal formed on top of the HK dielectric layer, a scaling equivalent oxide thickness (EOT) formed by using a low temperature oxygen scavenging technique, and a stack of metals gate layers deposited over the oxygen scavenging metal layer.

Abstract: In a semiconductor device, a YAG substrate is formed as a single-crystal substrate of any of surface orientations (100), (110), and (111). In the fabrication of the semiconductor device, a TMAl gas is first fed onto the YAG substrate so as to form a nucleation layer made of aluminum, which is a group-III element. Then, an NH3 gas is fed onto the nucleation layer. This turns the surface of the nucleation layer into a group-V element and then forms a group-III-V compound layer of AlN. Then, a mixed gas of TMAl gas and NH3 gas is fed onto the group-III-V compound layer so as to form another group-III-V compound layer. Finally, a group-III nitride semiconductor layer is crystal-grown on the group-III compound layer.

Abstract: A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.

Abstract: Provided is a film deposition method capable of improving the crystal characteristic near an interface according to the lattice constant of a material that will constitute a thin film to be deposited. Specifically, a substrate is curved relative to the direction along one main surface on which the thin film is to be deposited, according to the lattice constant the material that will constitute the thin film to be deposited and the lattice constant of a material constituting the one main surface. The thin film is deposited on the one main surface of the substrate with the substrate curved.

Abstract: A method for fabricating an epitaxizl structure is provided, wherein the method comprises steps as follows: a reactive gas containing nitrogen and fluorine atoms is firstly applied to react with an oxygen-atom-containing residue residing on a surface of a substrate so as to form a solid compound on the surface. Subsequently, an anneal process is performed to sublimate the solid compound. A semiconductor deposition process is then performed on the substrate.

Abstract: A method of depositing an epitaxial layer that includes chemically cleaning the deposition surface of a semiconductor substrate and treating the deposition surface of the semiconductor substrate with a hydrogen containing gas at a pre-bake temperature. The hydrogen containing gas treatment may be conducted in an epitaxial deposition chamber. The hydrogen containing gas removes oxygen-containing material from the deposition surface of the semiconductor substrate. The deposition surface of the semiconductor substrate may then be treated with a gas flow comprised of at least one of hydrochloric acid (HCl), germane (GeH4), and dichlorosilane (H2SiCl2) that is introduced to the epitaxial deposition chamber as temperature is decreased from the pre-bake temperature to an epitaxial deposition temperature. At least one source gas may be applied to the deposition surface for epitaxial deposition of a material layer.

Abstract: A method for forming multiple layers in a single process chamber includes placing a substrate in the process chamber having multiple processing sources and iteratively forming a copper indium gallium selenium (CIGS) including forming multiple relatively thin CIGS layers including forming a copper indium gallium (CIG) layer on the substrate, the CIG layer having a thickness of between less than about 50 angstroms and about 200 angstroms, forming a selenium layer on the CIG layer, the selenium layer having a thickness of between less than about 50 angstroms and about 200 angstroms and heating the substrate, the CIG layer and the selenium layer. A processing chamber system is also disclosed.

Abstract: A method of manufacturing a free-standing gallium nitride (GaN) substrate, by which a free-standing GaN substrate can be manufactured without warping or cracks. The method includes the steps of collecting polycrystalline GaN powder that is deposited in a reactor or on a susceptor in a process of growing single crystalline GaN, loading the collected polycrystalline GaN powder into a forming mold, preparing a polycrystalline GaN substrate by sintering the loaded polycrystalline GaN powder, and forming a single crystalline GaN layer by growing single crystalline GaN over the polycrystalline GaN substrate. It is possible to reduce warping and cracks that are caused, due to the difference in the coefficient of thermal expansion, during the growth or cooling of single crystalline GaN in the process of manufacturing the free-standing GaN substrate.

Abstract: A substrate processing apparatus having a processing chamber for processing a substrate; a processing gas feeding line for feeding a processing gas into the processing chamber; an inert gas feeding line for feeding an inert gas into the processing chamber; an inert gas vent line provided in the inert gas feeding line, for exhausting the inert gas fed into the inert gas feeding line without feeding the inert gas into the processing chamber; a first valve provided in the inert gas feeding line, on a downstream side of a part where the inert gas vent line is provided in the inert gas feeding line; a second valve provided in the inert gas vent line; and an exhaust line that exhausts an inside of the processing chamber.

Abstract: A method and apparatus that may be utilized for chemical vapor deposition and/or hydride vapor phase epitaxial (HVPE) deposition are provided. In one embodiment, the apparatus a processing chamber that includes a showerhead with separate inlets and channels for delivering separate processing gases into a processing volume of the chamber without mixing the gases prior to entering the processing volume. In one embodiment, the showerhead includes one or more cleaning gas conduits configured to deliver a cleaning gas directly into the processing volume of the chamber while by-passing the processing gas channels. In one embodiment, the showerhead includes a plurality of metrology ports configured to deliver a cleaning gas directly into the processing volume of the chamber while by-passing the processing gas channels. As a result, the processing chamber components can be cleaned more efficiently and effectively than by introducing cleaning gas into the chamber only through the processing gas channels.

Abstract: Described herein are methods for forming a semiconductor structure. The methods involve forming a doped semiconductor film, amorphizing the doped semiconductor film through ion implantation; and annealing the doped semiconductor film. The ion implantation and the annealing can increase an activation efficiency of the dopant. The ion implantation and the annealing can also reduce a number of crystalline defects in the doped semiconductor film.

Abstract: A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.

Abstract: A method for manufacturing a microcrystalline semiconductor film having high crystallinity is provided. A method for manufacturing a semiconductor device which has favorable electric characteristics with high productivity is provided. After a first microcrystalline semiconductor film is formed over a substrate, treatment for flattening a surface of the first microcrystalline semiconductor film is performed. Then, treatment for removing an amorphous semiconductor region on a surface side of the flattened first microcrystalline semiconductor film is performed so that a second microcrystalline semiconductor film having high crystallinity and flatness is formed. After that, a third microcrystalline semiconductor film is formed over the second microcrystalline semiconductor film.

Abstract: A process of producing a diamond thin-film includes implanting dopant into a diamond by an ion implantation technique, forming a protective layer on at least part of the surface of the ion-implanted diamond, and firing the protected ion-implanted diamond at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C. A process of producing a diamond semiconductor includes implanting dopant into each of two diamonds by an ion implantation technique and superimposing the two ion-implanted diamonds on each other such that at least part of the surfaces of each of the ion-implanted diamonds makes contact with each other, and firing the ion implanted diamonds at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C.

Abstract: A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.

Abstract: Methods and apparatus for deposition of materials on a substrate are provided herein. In some embodiments, an apparatus for processing a substrate may include a process chamber having a substrate support disposed therein to support a processing surface of a substrate, an injector disposed to a first side of the substrate support and having a first flow path to provide a first process gas and a second flow path to provide a second process gas independent of the first process gas, wherein the injector is positioned to provide the first and second process gases across the processing surface of the substrate, a showerhead disposed above the substrate support to provide the first process gas to the processing surface of the substrate, and an exhaust port disposed to a second side of the substrate support, opposite the injector, to exhaust the first and second process gases from the process chamber.

Abstract: An off-axis cut of a nonpolar III-nitride wafer towards a polar (?c) orientation results in higher polarization ratios for light emission than wafers without such off-axis cuts. A 5° angle for an off-axis cut has been confirmed to provide the highest polarization ratio (0.9) than any other examined angles for off-axis cuts between 0° and 27°.

Abstract: The disclosure relates to a high purity 2H-SiC composition and methods for making same. The embodiments represented herein apply to both thin film and bulk growth of 2H-SiC. According to one embodiment, the disclosure relates to doping an underlying substrate or support layer with one or more surfactants to nucleate and grow high purity 2H-SiC. In another embodiment, the disclosure relates to a method for preparing 2H-SiC compositions by nucleating 2H-SiC on another SiC polytype using one or more surfactants. The surfactants can include AlN, Te, Sb and similar compositions. These nucleate SiC into disc form which changes to hexagonal 2H-SiC material.

Abstract: A method of positioning a catalyst nanoparticle that facilitates nanowire growth for nanowire-based device fabrication employs a structure having a vertical sidewall formed on a substrate. The methods include forming the structure, forming a targeted region in a surface of either the structure or the substrate, and forming a catalyst nanoparticle in the targeted region using one of a variety of techniques. The techniques control the position of the catalyst nanoparticle for subsequent nanowire growth. A resonant sensor system includes a nanowire-based resonant sensor and means for accessing the nanowire. The sensor includes an electrode and a nanowire resonator. The electrode is electrically isolated from the substrate. One or more of the substrate is electrically conductive, the nanowire resonator is electrically conductive, and the sensor further comprises another electrode. The nanowire resonator responds to an environmental change by displaying a change in oscillatory behavior.