Abstract: Processes for forming full graphene wafers on silicon or silicon-on-insulator substrates. The processes comprise formation of a metal carbide layer on the substrate and annealing of the metal carbide layer under high vacuum. For volatile metals, this annealing step results in volatilization of the metal species of the metal carbide layer and reformation of the carbon atoms into the desired graphene wafer. Alternatively, for non-volatile metals, the annealing step results in migration of the metal in the metal carbide layer to the top surface of the layer, thereby forming a metal rich top layer. The desired graphene layer is formed by the carbon atoms left at the interface with the metal rich top layer. The thickness of the graphene layer is controlled by the thickness of the metal carbide layer and by solid phase reactions.

Abstract: Silicon deposits are suppressed at the wall of a fluidized bed reactor by a process in which an etching gas is fed near the wall of the reactor. The etching gas includes tetrachlorosilane. A Siemens reactor may be integrated into the process such that the vent gas from the Siemens reactor is used to form a feed gas and/or etching gas fed to the fluidized bed reactor.

Abstract: Reusing a Si wafer for the formation of wire arrays by transferring the wire arrays to a polymer matrix, reusing a patterned oxide for several array growths, and finally polishing and reoxidizing the wafer surface and reapplying the patterned oxide.

Abstract: A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.

Abstract: In a method for making a GaN article, an epitaxial nitride layer is deposited on a single-crystal substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a substantially 3D growth mode. A GaN transitional layer is grown on the 3D nucleation layer by HVPE under a condition that changes the growth mode from the substantially 3D growth mode to a substantially 2D growth mode. A bulk GaN layer is grown on the transitional layer by HVPE under the substantially 2D growth mode. A polycrystalline GaN layer is grown on the bulk GaN layer to form a GaN/substrate bi-layer. The GaN/substrate bi-layer may be cooled from the growth temperature to an ambient temperature, wherein GaN material cracks laterally and separates from the substrate, forming a free-standing article.

Abstract: Methods for formation of epitaxial layers containing silicon are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of the epitaxial layer involves exposing a substrate in a process chamber to deposition gases including two or more silicon source such as silane and a higher order silane. Embodiments include flowing dopant source such as a phosphorus dopant, during formation of the epitaxial layer, and continuing the deposition with the silicon source gas without the phosphorus dopant.

Abstract: A method of selectively forming a germanium structure within semiconductor manufacturing processes removes the native oxide from a nitride surface in a chemical oxide removal (COR) process and then exposes the heated nitride and oxide surface to a heated germanium containing gas to selectively form germanium only on the nitride surface but not the oxide surface.

Abstract: A method of forming a nanostructure having the form of a tree, comprises a first stage and a second stage. The first stage includes providing one or more catalytic particles on a substrate surface, and growing a first nanowhisker via each catalytic particle. The second stage includes providing, on the periphery of each first nanowhisker, one or more second catalytic particles, and growing, from each second catalytic particle, a second nanowhisker extending transversely from the periphery of the respective first nanowhisker. Further stages may be included to grow one or more further nanowhiskers extending from the nanowhisker(s) of the preceding stage. Heterostructures may be created within the nanowhiskers. Such nanostructures may form the components of a solar cell array or a light emitting flat panel, where the nanowhiskers are formed of a photosensitive material.

Abstract: A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.

Abstract: This invention provides a selfsupporting substrate which consists of a n-type conductive aluminum nitride semiconductor crystal and is useful for manufacturing the vertical conductive type AlN semiconductor device. The n-type conductive aluminum nitride semiconductor crystal, by which the selfsupporting substrate is made up, contains Si atom at a concentration of 1×1018 to 5×1020 cm?3, is substantially free from halogen atoms, and substantially does not absorb the light having the energy of not more than 5.9 eV. The selfsupporting substrate can be obtained by a method comprising the steps of forming an AlN crystal layer on a single crystal substrate such as a sapphire by the HVPE method, preheating the obtained substrate having the AlN crystal layer to a temperature of 1,200° C. or more, forming a second layer consisting of the n-type conductive aluminum nitride semiconductor crystal is formed on the AlN crystal layer in high rate by the HVPE method and separating the second layer from the obtained laminate.

Abstract: A GaN layer functions as an electron transit layer and is formed to exhibit, at least at a portion thereof, A/B ratio of 0.2 or less obtained by a photoluminescence measurement, where “A” is the light-emission intensity in the 500-600 nm band, and “B” is the light-emission intensity at the GaN band-edge.

Abstract: A hybrid beam deposition (HBD) system and methods according to the present invention utilizes a unique combination of pulsed laser deposition (PLD) technique and equipment with equipment and techniques that provide a radical oxygen rf-plasma stream to effectively increase the flux density of available reactive oxygen at a deposition substrate for the effective synthesis of metal oxide thin films. The HBD system and methods of the present invention further integrate molecular beam epitaxy (MBE) and/or chemical vapor deposition (CVD) techniques and equipment in combination with the PLD equipment and technique and the radical oxygen rf-plasma stream to provide elemental source materials for the synthesis of undoped and/or doped metal oxide thin films as well as the synthesis of undoped and/or doped metal-based oxide alloy thin films.

Abstract: A high-quality epitaxial silicon thin layer is formed on an upgraded metallurgical grade silicon (UMG-Si) substrate. A thin film interface is fabricated between the UMG-Si substrate and the epitaxial silicon thin layer. The interface is capable of internal light reflection and impurities isolation. With the interface, photoelectrical conversion efficiency is improved. Thus, the present invention is fit to be applied for making solar cell having epitaxial silicon thin layer.

Abstract: Nanosized filamentary carbon structures (CNTs) nucleating over a catalyzed surface may be grown in an up-right direction reaching a second surface, spaced from the first surface, without the need of applying any external voltage source bias. The growth process may be inherently self-stopping, upon reaching a significant population of grown CNTs on the second surface. A gap between the two surfaces may be defined for CNT devices being simultaneously fabricated by common integrated circuit integration techniques. The process includes finding that for separation gaps of up to a hundred or more nanometers, a difference between the respective work functions of the materials delimiting the gap space, for example, different metallic materials or a doped semiconductor of different dopant concentration or type, may produce an electric field intensity orienting the growth of nucleated CNTs from the surface of one of the materials toward the surface of the other material.

Abstract: A GaN substrate having a large diameter of two inches or more by which a semiconductor device such as a light emitting element with improved characteristics such as luminance efficiency, an operating life and the like can be obtained at low cost industrially, a substrate having an epitaxial layer formed on the GaN substrate, a semiconductor device, and a method of manufacturing the GaN substrate are provided. A GaN substrate has a main surface and contains a low-defect crystal region and a defect concentrated region adjacent to low-defect crystal region. Low-defect crystal region and defect concentrated region extend from the main surface to a back surface positioned on the opposite side of the main surface. A plane direction [0001] is inclined in an off-angle direction with respect to a normal vector of the main surface.

Abstract: A method for manufacturing a semiconductor device includes providing a substrate comprising silicon, cleaning the substrate, performing a first low pressure chemical vapor deposition (LPCVD) process using a first source gas to selectively deposit a seeding layer of silicon (Si) over the substrate, performing a second LPCVD process using a second source gas to selectively deposit a first layer of silicon germanium (SiGe) over the layer of Si, the second source gas including hydrochloride at a first flow rate, and performing a third LPCVD process using a third source gas including hydrochloride at a second flow rate. The first flow rate is substantially lower than the second flow rate.

Abstract: Affords a method of storing GaN substrates from which semiconductor devices of favorable properties can be manufactured, the stored substrates, and semiconductor devices and methods of manufacturing the semiconductor devices. In the GaN substrate storing method, a GaN substrate (1) is stored in an atmosphere having an oxygen concentration of 18 vol. % or less, and/or a water-vapor concentration of 12 g/m3 or less. Surface roughness Ra of a first principal face on, and roughness Ra of a second principal face on, the GaN substrate stored by the storing method are brought to no more than 20 nm and to no more than 20 ?m, respectively. In addition, the GaN substrates are rendered such that the principal faces form an off-axis angle with the (0001) plane of from 0.05° to 2° in the <1 100> direction, and from 0° to 1° in the <11 20> direction.

Abstract: A metal insulator semiconductor field effect transistor (MISFET) having a strained channel region is disclosed. Also disclosed is a method of fabricating a semiconductor device having a low-resistance junction interface. This fabrication method includes the step of forming a gate electrode above a silicon substrate with a gate insulator film being sandwiched therebetween. Then, form a pair of heavily-doped p (p+) type diffusion layers in or on the substrate surface at both sides of the gate electrode to a concentration of 5×1019 atoms/cm3 or more and yet less than or equal to 1×1021 atoms/cm3. Next, silicidize the p+-type layers by reaction with a metal in the state that each layer is applied a compressive strain.

Abstract: Epitaxially coated silicon wafers have a rounded and polished edge region and a region adjacent to the edge having a width of 3 mm on the front and rear sides, a surface roughness in edge region of 0.1-1.5 nm RMS relative to a spatial wavelength range of 10-80 ?m, and a variation of surface roughness of 1-10%. The wafer edges, after polishing, are examined for defects and roughness at the edge and surrounding region. Silicon wafers having a surface roughness of less than 1 nm RMS are pretreated in single wafer epitaxy reactors, first in a hydrogen atmosphere at a flow rate of 1-100 slm and in a second step, an etching medium with a flow rate of 0.5-5 slm is conducted onto the edge region of the wafer by a gas distribution device. The wafer is then epitaxially coated.

Abstract: Affords a manufacturing method enabling nitride-based semiconductor devices containing epitaxial films excelling in flatness and crystallinity to be easily produced. Method of manufacturing nitride semiconductor devices that are formed onto a semiconductor substrate being a compound containing nitrogen, and a Group IIIA element for forming compounds with nitrogen, including steps of: heating the semiconductor substrate (1) to a film-deposition temperature; supplying to the substrate a film-deposition gas containing a source gas for the Group IIIA element and a nitrogen source gas; and epitaxially growing onto the semiconductor substrate a thin film (2) of a compound containing nitrogen and the Group IIIA element; and being furnished with a step, in advance of the epitaxial growth step, of heating the semiconductor substrate to a pretreating temperature less than the film-deposition temperature, to clean the surface of the semiconductor substrate.

Abstract: A pn junction type Group III nitride semiconductor light-emitting device 10 (11) of the present invention has a light-emitting layer 2 of multiple quantum well structure in which well layers 22 and barrier layers 21 including Group III nitride semiconductors are alternately stacked periodically between an n-type clad layer 105 and a p-type clad layer 107 which are formed on a crystal substrate and which include Group III nitride semiconductors, in which one end layer 21m of the light-emitting layer 2 is closest to and opposed to the n-type clad layer, and the other end layer 21n of the light-emitting layer 2 is closest to and opposed to the p-type clad layer, both the one and the other end layers are barrier layers, and the other end layer 21n is thicker than the barrier layer of the one end layer.

Abstract: Semiconductor devices and methods of manufacturing thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes providing a workpiece, and forming a recess in the workpiece. The recess has a depth having a first dimension. A first semiconductive material is formed in the recess to partially fill the recess in a central region to a height having a second dimension. The second dimension is about one-half or greater of the first dimension. A second semiconductive material is formed over the first semiconductive material in the recess to completely fill the recess, the second semiconductive material being different than the first semiconductive material.

Abstract: A light emitting element array including an active layer commonly used for light emitting element regions, carrier injection layers which are electrically isolated from each other and which are provided in the respective light emitting element regions, and a resistive layer which has a resistance higher than that of the carrier injection layers and which is provided between the active layer and the carrier injection layers.

Abstract: Methods and apparatus for fabricating IB-IIIA-VIA2 compound semiconductor thin films are provided. A method for fabricating IB-IIIA-VIA2 compound semiconductor thin films includes providing a substrate with a precursor film thereover, wherein the precursor film includes elements of group IB and group IIIA. An annealing process is performed on the substrate and the precursor film thereover and forms a group IB-IIIA alloy thin film over the substrate. A surface treatment is performed by transporting ionized group VIA elements to the group IB-IIIA alloy thin film to react therewith to thereby form an IB-IIIA-VIA2 compound semiconductor thin film.

Abstract: A method for fabricating a semiconductor device is provided. The method comprises selectively forming a first layer over a first and second exposed portions of a substrate. The first and second exposed portions are of different sizes and are located adjacent to a first and second active devices. During the first layer formation, a gas mixture comprising first and second source gases that function as growth components for forming the first layer and a reactant gas that functions as an etching component for controlling selectivity of the first layer growth is provided. The reactant gas is different from the first and second source gases and one of first and second source gases forms the first layer at a faster rate over the first exposed portion as compared to the second exposed portion and the other source gas exhibits an opposite behavior.

Abstract: A method for forming vertically oriented, crystallographically aligned nanowires (nanocolumns) using monolayer or submonolayer quantities of metal atoms to form uniformly sized metal islands that serve as catalysts for MOCVD growth of Group III nitride nanowires.

Abstract: In a light or radiation detector manufacturing method and a light or radiation detector of this invention, when forming a semiconductor, the semiconductor is formed in a predetermined thickness on a dummy substrate by vapor deposition, subsequently the dummy substrate is replaced with a graphite substrate which is a supporting substrate, and the semiconductor continues to be formed on the graphite substrate by vapor deposition. The time when forming the semiconductor in the predetermined thickness on the dummy substrate by vapor deposition is an initial state, and a defective film inevitably to be formed is formed on the dummy substrate. Subsequently, a semiconductor not in the initial state is formed on the graphite substrate put as replacement. This realizes a detector having the semiconductor of higher quality than in the prior art. The semiconductor manufactured in this way is formed continuously at least in a direction of thickness.

Abstract: A process for coating a substrate at atmospheric pressure is disclosed, the process comprising the steps of vaporizing a mass of semiconductor material within a heated inert gas stream to create a fluid mixture having a temperature above the condensation temperature of the semiconductor material, directing the fluid mixture at the substrate, the substrate having a temperature below the condensation temperature of the semiconductor material thereby depositing a layer of the semiconductor material onto a surface of the substrate, extracting undeposited semiconductor material; and circulating the undeposited semiconductor material into the fluid mixture having a temperature above the condensation temperature.

Abstract: A method is disclosed that uses solid precursors for semiconductor processing. A solid precursor is provided in a storage container. The solid precursor is transformed into a liquid state in the storage container. The liquid state precursor is transported from the storage container to a liquid holding container. The liquid state precursor is transported from the liquid holding container to a reaction chamber. The molten precursor allows the precursor to be metered in the liquid state. The storage container can be heated only when necessary to replenish the liquid holding container, thereby reducing the possibility of thermal decomposition of the precursor.

Abstract: A method of manufacturing carbon cylindrical structures, as represented by carbon nanotubes, by growing them on a substrate using a chemical vapor deposition (CVD) method, comprising the steps of implanting metal ions to the substrate surface and then growing the carbon cylindrical structures using the metal ions as a catalyst. A method of manufacturing carbon nanotubes comprising a step of using nano-carbon material as seed material for growing carbon nanotubes is also disclosed. A biopolymer detection device comprising vibration inducing part for inducing vibration, binding part capable of resonating with the vibration induced by the vibration inducing part and capable of binding or interacting with a target biopolymer, and detection part for detecting whether or not the binding part have bound or interacted with the target biopolymer, is also disclosed.

Abstract: A silicon epitaxial layer 2 is grown in vapor phase on a silicon single crystal substrate 1 manufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 ?·cm or below, oxygen precipitation nuclei 11 are formed in the silicon single crystal substrate 1, by carrying out annealing at 450° C. to 750° C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layer 2 as a result of the annealing, and thus-formed silicon oxide film 3 is etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.

Abstract: An object is to provide a single crystal semiconductor layer with extremely favorable characteristics without performing CMP treatment or heat treatment at high temperature. Further, an object is to provide a semiconductor substrate (or an SOI substrate) having the above single crystal semiconductor layer. A first single crystal semiconductor layer is formed by a vapor-phase epitaxial growth method on a surface of a second single crystal semiconductor layer over a substrate; the first single crystal semiconductor layer and a base substrate are bonded to each other with an insulating layer interposed therebetween; and the first single crystal semiconductor layer and the second single crystal semiconductor layer are separated from each other at an interface therebetween so as to provide the first single crystal semiconductor layer over the base substrate with the insulating layer interposed therebetween. Thus, an SOI substrate can be manufactured.

Abstract: A fabricating method of nitride semiconductor substrate is provided. First, a first substrate including a first base material, a nitride semiconductor template layer stacked on the first base material, and a first dielectric layer stacked on the nitride semiconductor template layer is provided. Then, the first dielectric layer and the nitride semiconductor template layer are patterned, and a second substrate including a second base material and a second dielectric layer stacked on the second base material is provided. Next, the nitride semiconductor template layer and the first dielectric layer of the first substrate are transferred onto the second dielectric layer of the second substrate through bonding and transferring processes, and then a nitride semiconductor thick film is grown from the nitride semiconductor template layer through an epitaxy process. After that, the nitride semiconductor thick film and the second substrate are separated.

Abstract: A method of making a group III nitride-based compound semiconductor has the steps of: providing a semiconductor substrate with a polished surface, the semiconductor substrate being of group III nitride-based compound semiconductor; and growing a semiconductor epitaxial growth layer of group III nitride-based compound semiconductor on the semiconductor substrate. The polished surface is an inclined surface that has an off-angle ? of 0.15 degrees or more and 0.6 degrees or less to a-face, c-face or m-face of the semiconductor substrate.

Abstract: A structure and method of forming same, comprising a low threading density alloy graded layer, deposited according to a deposition temperature profile in correspondence with increasing alloy composition. In one embodiment, a first substantially relaxed alloy graded layer is deposited while varying a deposition temperature according to a first temperature profile. A second substantially relaxed alloy graded layer is deposited over the first graded layer while varying a deposition temperature according to a second temperature profile. Preferably, the minimum signed rate of change of the second temperature profile is less than the maximum signed rate of change of the first temperature profile.

Abstract: A Group III-nitride semiconductor film containing aluminum, and methods for growing this film. A film is grown by patterning a substrate, and growing the Group III-nitride semi-conductor film containing aluminum on the substrate at a temperature designed to increase the mobility of aluminum atoms to increase a lateral growth rate of the Group III-nitride semiconductor film. The film optionally includes a substrate patterned with elevated stripes separated by trench regions, wherein the stripes have a height chosen to allow the Group III-nitride semiconductor film to coalesce prior to growth from the bottom of the trenches reaching the top of the stripes, the temperature being greater than 1075° C., the Group III-nitride semiconductor film being grown using hydride vapor phase epitaxy, the stripes being oriented along a (1-100) direction of the substrate or the growing film, and a dislocation density of the grown film being less than 107 cm?2.

Abstract: A method for growing high quality, nonpolar Group III nitrides using lateral growth from Group III nitride nanowires. The method of nanowire-templated lateral epitaxial growth (NTLEG) employs crystallographically aligned, substantially vertical Group III nitride nanowire arrays grown by metal-catalyzed metal-organic chemical vapor deposition (MOCVD) as templates for the lateral growth and coalescence of virtually crack-free Group III nitride films. This method requires no patterning or separate nitride growth step.

Abstract: Provided are a silicon nitride layer for a light emitting device, light emitting device using the same, and method of forming the silicon nitride layer for the light emitting device. The silicon nitride layer of the light emitting device includes a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix. A light emitting device manufactured by the silicon nitride layer has a good luminous efficiency and emits light in the visible region including the short-wavelength blue/violet region and the near infrared region.

Abstract: A method of synthesizing silicon wires is provided. A substrate is provided. A copper catalyst particle layer is formed on a top surface of the substrate. The reactive device is heated at a temperature of above 450° C. in a flowing protective gas. A mixture of a protective gas and a silicon-based reactive gas is introduced at a temperature above 450° C. at a pressure below 700 Torr to form the silicon wires on the substrate.

Abstract: A method of forming a nanostructure having the form of a tree, comprises a first stage and a second stage. The first stage includes providing one or more catalytic particles on a substrate surface, and growing a first nanowhisker via each catalytic particle. The second stage includes providing, on the periphery of each first nanowhisker, one or more second catalytic particles, and growing, from each second catalytic particle, a second nanowhisker extending transversely from the periphery of the respective first nanowhisker. Further stages may be included to grow one or more further nanowhiskers extending from the nanowhisker(s) of the preceding stage. Heterostructures may be created within the nanowhiskers. Such nanostructures may form the components of a solar cell array or a light emitting flat panel, where the nanowhiskers are formed of a photosensitive material.

Abstract: The invention relates to a manufacturing method for a structure comprising semi-conductor material nanocrystals on a dielectric material substrate by chemical vapour deposition (CVD), the nanocrystals being covered by a layer of semi-conductor material nitride. The method comprises a step for forming stable nuclei on the substrate by CVD from a first gaseous precursor of the nuclei; a step of nanocrystal growth from stable nuclei by CVD from a second gaseous precursor; and a step for forming a layer of semi-conductor material nitride on the nanocrystals. The method is characterised in that the passivation step is carried out by selective and stoichiometric CVD of semi-conductor material nitride only on the nanocrystals from a mixture of the second and a third gaseous precursor selected to cause selective and stoichiometric deposition of the nitride only on said nanocrystals, wherein steps for forming the nuclei, forming the nanocrystals and passivation are carried out inside a same, single chamber.

Abstract: A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.

Abstract: A method for manufacturing a semiconductor device includes steps of: forming a first epitaxial film on a silicon substrate; forming a trench in the first epitaxial film; and forming a second epitaxial film on the first epitaxial film and in the trench. The step of forming the second epitaxial film includes a final step, in which a mixed gas of a silicon source gas and a halide gas is used. The silicon substrate has an arsenic concentration defined as ?. The second epitaxial film has an impurity concentration defined as ?. The arsenic concentration and the impurity concentration has a relationship of: ??3×1019×ln(?)?1×1021.

Abstract: A silicon carbide single crystal wafer wherein a substrate is cut out at an OFF angle from a (0001) c plane of an ?-type silicon carbide single crystal of less than 2° and in an OFF direction in which a deviation from a (11-20) direction is less than 10°, the number of substantially triangular lamination defects exposed from a surface of a wafer which is epitaxial grown on the substrate is less than 4/cm2 over the entire surface of the wafer. The invention provides a producing method of a silicon carbide single crystal wafer capable of enhancing the utility ratio of the bulk silicon carbide single crystal, the element characteristics and the cleavage, as well as a silicon carbide single crystal wafer obtained by such a producing method.

Abstract: In a method of making a c-Si-based cell or a ?c-Si-based cell, the improvement of increasing the minority charge carrier's lifetime, comprising: a) placing a c-Si or polysilicon wafer into CVD reaction chamber under a low vacuum condition and subjecting the substrate of the wafer to heating; and b) passing mixing gases comprising NH3/H2 through the reaction chamber at a low vacuum pressure for a sufficient time and at a sufficient flow rate to enable growth of an a-Si:H layer sufficient to increase the lifetime of the c-Si or polysilicon cell beyond that of the growth of an a-Si:H layer without treatment of the wafer with NH3/H2.

Abstract: A method of forming an epitaxially grown layer, preferably by providing a region of weakness in a support substrate and transferring a nucleation portion to the support substrate by bonding. A remainder portion of the support substrate is detached at the region of weakness and an epitaxial layer is grown on the nucleation portion. The remainder portion is separated or otherwise removed from the support portion.

Abstract: A method of epitaxially growing a SiC layer on a single crystal SiC substrate is described. The method includes heating a single-crystal SiC substrate to a first temperature of at least 1400° C. in a chamber, introducing a carrier gas, a silicon containing gas and carbon containing gas into the chamber; and epitaxially growing a layer of SiC on a surface of the SiC substrate. The SiC substrate is heated to the first temperature at a rate of at least 30° C./minute. The surface of the SiC substrate is inclined at an angle of from 1° to 3° with respect to a basal plane of the substrate material.

Abstract: The present III-nitride crystal manufacturing method, a method of manufacturing a III-nitride crystal (20) having a major surface (20m) of plane orientation other than {0001}, designated by choice, includes: a step of slicing III-nitride bulk crystal (1) into a plurality of III-nitride crystal substrates (10p), (10q) having major surfaces (10pm), (10qm) of the designated plane orientation; a step of disposing the substrates (10p), (10q) adjoining each other sideways in such a way that the major surfaces (10pm), (10qm) of the substrates (10p), (10q) parallel each other and so that the [0001] directions in the substrates (10p), (10q) are oriented in the same way; and a step of growing III-nitride crystal (20) onto the major surfaces (10pm), (10qm) of the substrates (10p), (10q).

Abstract: Provided are a method of growing a group III-V compound semiconductor, and method of manufacturing a light-emitting device and an electron device, in which risks are reduced and nitrogen can be efficiently supplied at low temperatures. The method of growing a group III-V compound semiconductor includes the following processes. First, gas containing at least one selected from the group consisting of monomethylamine and monoethylamine is prepared as a nitrogen raw material. Then, the group III-V compound semiconductor is grown using the gas by vapor phase growth.

Abstract: The present invention provides processes for producing horizontal nanowires that are separate and oriented and allow for processing directly on a substrate material. The nanowires grow horizontally by suppressing vertical growth from a nucleating particle, such as a metal film. The present invention also provides for horizontal nanowire growth from nucleating particles on the edges of nanometer-sized steps. Following processing, the nanowires can be removed from the substrate and transferred to other substrates. The present invention also provides for nanowires produced by these processes and electronic devices comprising these nanowires. The present invention also provides for nanowire growth apparatus that provide horizontal nanowires, and processes for producing nanowire devices.