Abstract: The present invention provides a structure and a method of fabricating a thermoelectric Cooler directly on the backside of a semiconductor substrate. The thermoelectric (TE) cooler (thermoelectric cooler) disperses heat from an integrated circuit (IC) that is formed on the front-side of the silicon substrate. Spaced first bonding pad holes 28 are formed in the backside of a substrate that expose bonding pads 24. Second holes 32 are formed between the spaced first bonding pad holes 28. A first insulating layer 34 is formed over the backside of the substrate, but not over the bonding pad 24. A metal layer is formed lining the first bonding pad holes 28. A polysilicon layer 46 is formed over the surface of the backside of the substrate in the second holes. The polysilicon layer is implanted thereby forming alternating adjacent N and P doped sections 46p 46n in the second holes. The adjacent N and P doped polysilicon sections 46n 46p are electrically connected to the bonding pads 24 by the metal layer 38.

Abstract: A method and device to monitor integrated temperature in a heat cycle process is disclosed. A monitor wafer, according to one embodiment, comprises a substrate, typically a silicon wafer, having films of two conductive materials of selected electrical resistances, sequentially deposited thereon. Suitable conductive materials react with each other in the presence of heat to yield a layer of a third, non-conductive or less conductive, material at the interface of the two conductive materials. The thickness of each of the films of the two conductive materials is selected such that the entire thickness is not consumed in the formation of the layer of a third material. Following the heat exposure, electrical resistance of the monitor wafer is determined and compared with the monitor wafer's selected pre-heat electrical resistance. The change in electrical resistance is then correlated to temperature by a thermocouple probe on a set of test wafers having the same blanket metal structure as the monitor wafer.

Abstract: A method for fabricating a thermoelectric module with thermoelectric elements installed in an gapless eggcrate. This gapless eggcrate provides insulated spaces for a large number of p-type and n-type thermoelectric elements. The absence of gaps in the walls of the spaces virtually eliminates the possibility of interwall shorts between the elements. Thermoelectric elements, both p-type and n-type, are inserted into the insulated spaces in the gapless eggcrate to provide the desired thermoelectric effects . Electrical connections are established on both the hot and cold sides of the module to connect the thermoelectric elements in series or parallel as desired. Normally, most or all of the elements will be connected in series. In a preferred embodiment the gapless eggcrate is formed from a high temperature plastic. P-type thermoelectric material is extruded and then sliced to form p-type thermoelectric elements, and n-type thermoelectric material is extruded and sliced to form n-type thermoelectric elements.

Abstract: Semiconductor component with monolithically integrated electronic circuits and monolithically integrated sensor/actuator, whereby the sensor/actuator is manufactured with methods of surface micromachining in a sensor layer (3) of polysilicon that is structured, for example, with sensor webs (6), and these sensor webs (6) are thermally insulated from a silicon substrate (1) by a cavity (4) that is produced in a sacrificial layer (2) and is closed gas-tight toward the outside with a closure layer (5).

Abstract: A gas sensor and a method for measuring gas constituents, particularly exhaust gas constituents for an internal combustion engine, comprising a pair of polysilicon plates, each plate supporting a pair of resistors, one serving as a heater and the other as a thermometer, one plate being coated with a catalyst to promote combustion of unburned combustible gas constituents, wherein provision is made for reducing temperature gradients across the plates and for effecting temperature uniformity of the catalyst while maintaining a high degree of structural integrity.

Abstract: An array of thermal sensitive elements (16) may be formed from a pyroelectric substrate (46) having an infrared absorber and common electrode assembly (18) attached thereto. A first layer of electrically conductive contacts (60) is formed to define in part masked (61) and unmasked (68) regions of the substrate (46). A second layer of electrically conductive contacts (62) may be formed on the first layer of contacts (60). A mask layer (66) is formed to encapsulate the exposed portions of the second layer of contacts (62). The unmasked regions (68) are exposed to an etchant (70) and irradiated to substantially increase the reactivity between the unmasked regions (68) and the etchant (70) such that during irradiation, the etchant (70) removes the unmasked regions (68) substantially faster than the first layer of contacts (60) and the mask layer (66).

Abstract: An electronic module is provided comprising integrated circuit chips mounted on a substrate and having a specially designed cooling plate overlying the chip producing a gap above about 1 mil and a thermal paste or thermal adhesive between the cooling plate and the chip to facilitate heat transfer from the chip to the cooling plate. The cooling plate has a roughened area made by grit blasting and the like and having a roughness of about 0.4 to 6.4 microns or comprising a plurality of channels and corresponding protrusions overlying the chip area which roughened area penetrates the thermal paste and thermal adhesive and improves the adhesion and inhibits the flow of thermal paste from between the lower surface of the cooling plate and the upper surface of the chip during operation of the electronic module.