Abstract: A mass storage device includes a probe that has a cantilever having a first end region operatively connected to a substrate and a second end region rotated in a direction such that the second end region is opposed to the first end region. A tip is disposed on the second end region, with the tip pointing in a direction opposed to the first end region.

Abstract: A method of manufacturing a thermoelectric module is provided. The method includes mounting a thermoelectric material to a substrate such that a portion of the thermoelectric material covers a removable pattern. The thermoelectric material is then segmented and the removable pattern is removed. The portions of the thermoelectric material which were covering the removable pattern are also removed, leaving the portions of the thermoelectric material not covering the removable pattern attached to the substrate.

Abstract: Phase-changeable memory devices include non-volatile memory cells. Each of these non-volatile memory cells may include a phase-changeable diode on a semiconductor substrate and a phase-changeable memory element having a first terminal electrically coupled to a terminal of the phase-changeable diode. This phase-changeable diode may include a lower electrode pattern on the semiconductor substrate, a first phase-changeable pattern on the lower electrode pattern and a gate switching layer pattern on the first phase-changeable pattern. The phase-changeable memory element includes a second phase-changeable pattern electrically coupled to the terminal of the phase-changeable diode and a memory switching layer pattern on the second phase-changeable pattern. The memory switching layer pattern may include a composite of a titanium layer pattern contacting the phase-changeable memory element and a titanium nitride layer pattern contacting the titanium layer pattern.

Abstract: Thermally actuated valves, photovoltaic cells and arrays comprising same, and methods for producing same are disclosed. In some embodiments, thermally actuated valves are provided, comprising: a first material defining at least one opening; and a beam attached to the first material so as to at least partially cover the at least one opening, wherein the first material and the beam comprise different thermal expansion properties, such that, when a temperature is applied to at least one of the first material and the beam, the beam buckles so as to at least partially uncover the at least one opening. In some embodiments, photovoltaic cells and arrays comprising thermally actuated valves, and methods for producing thermally actuated valves are provided.

Abstract: A memory device having a vacuum jacket around the first electrode element for improved thermal isolation. The memory unit includes a first electrode element; a phase change memory element in contact with the first electrode element; a dielectric fill layer surrounding the phase change memory element and the first electrode element, wherein the dielectric layer is spaced from the first electrode element to define a chamber between the first electrode element and the dielectric fill layer; and wherein the phase change memory layer is sealed to the dielectric fill layer to define a thermal isolation jacket around the first electrode element.

Abstract: The present invention provides a temperature measuring apparatus with favorable temperature measuring performance and a method of manufacturing the same. A temperature measuring apparatus (10) provided with a temperature sensor (11) arranged on a bottom surface of a depressed section (12c) of a semiconductor wafer (12). The semiconductor wafer (12) and temperature sensor (11) are contacted together through a first contact layer (14) and second contact layer (24). The first and second contact layers (14) and (24) are formed from the same material, concretely a metal with high heat conductivity, and formed to provide virtually even thickness in surface direction. By such first and second contact layers (14) and (24), heat is conducted from the semiconductor wafer (12) to the temperature sensor (11) favorably. Therefore, the temperature measuring apparatus (10) has favorable temperature measuring performance.

Abstract: Current manufacturing of miniature or micro electronic mechanical optical chemical or biophysical devices utilizes discrete substrates holding one or more said devices. The use of discrete substrates entails several disadvantages with respect to economical manufacturing. This invention is a method of manufacturing devices using flexible carrier sheets with device substrates attached to the carrier sheet, storage/transport devices for the carrier sheet, and process tools capable of continuous processing of the carrier sheets.

Abstract: A system manages the temperature of thermoplastic material by initiating a default heating cycle in response to a sensor failure. The system may thus continue to heat the thermoplastic material according to the default heating cycle until the sensor can be repaired or replaced. A system controller implements the default heating cycle using a stored profile. That is, the controller causes a heating element to generate heat according to a default heating profile retrieved from a memory. The profile may be determined using historical heating data, user input and/or a factory setting.

Abstract: Techniques of sensing a temperature of a heat source disposed in a substrate of an integrated circuit are provided. According to one exemplary method, a Magnetic Tunnel Junction (“MTJ”) temperature sensor is provided over the heat source. The MTJ temperature sensor comprises an MTJ core configured to output a current during operation thereof. The value of the current varies based on a resistance value of the particular MTJ core. The resistance value of the MTJ core varies as a function of the temperature of the heat source. A value of the current of the MTJ core can then be associated with a corresponding temperature of the heat source.

Abstract: A memory cell (and method of fabricating the memory cell) includes a stencil layer having a first opening, a phase-change material layer formed on a first electrode layer, and an electrically conductive layer formed on the first electrode layer, the electrically conductive layer having a pillar-shaped portion which is formed on the phase-change material layer and fills the first opening.

Abstract: In a semiconductor memory device and a method of fabricating the same, a semiconductor memory device having a transistor and a data storing portion includes a heating portion interposed between the transistor and the data storing portion and a metal interconnection layer connected to the data storing portion, wherein the data storing portion includes a chalcogenide material layer, which undergoes a phase change due to a heating of the heating portion, for storing data therein.

Abstract: Provided is a phase-change random access memory (PRAM). The PRAM includes a bottom electrode, a bottom electrode contact layer, which is formed on one area of the bottom electrode, and an insulating layer, which is formed on a side of the bottom electrode contact layer, a phase-change layer, which is formed on the bottom electrode contact layer and the insulating layer and is formed of a phase-change material having a crystallization temperature between 100° C. and 150° C., and a top electrode, which is formed on the phase-change layer.

Abstract: An semiconductor device package (10) includes a semiconductor device (die) (12) and passive devices (14) electrically connected to a common lead frame (17). The lead frame (17) is formed from a stamped and/or etched metallic structure and includes a plurality of conductive leads (16) and a plurality of interposers (20). The passive devices (14) are electrically connected to the interposers (20), and I/O pads (22) on the die (12) are electrically connected to the leads (16). The die (12), passive devices (14), and lead frame (17) are encapsulated in a molding compound (28), which forms a package body (30). Bottom surfaces (38) of the leads (16) are exposed at a bottom face (34) of the package (10).

Abstract: A compact, high-performance thermoelectric conversion module includes a laminate having a plurality of insulating layers, p-type thermoelectric semiconductors and n-type thermoelectric semiconductors formed by a technique for manufacturing a multilayer circuit board, particularly a technique for forming a via-conductor. Pairs of the p-type thermoelectric semiconductors and the n-type thermoelectric semiconductors are electrically connected to each other in series through p-n connection conductors to define thermoelectric conversion element pairs. The thermoelectric conversion element pairs are connected in series through, for example, series wiring conductors. The thermoelectric semiconductors each have a plurality of portions in which the peak temperatures of thermoelectric figures of merit are different from each other. These portions are distributed in the stacking direction of the laminate.

Abstract: A method of forming a phase change memory device includes forming a core pattern on a substrate, conformally forming a heat conductive layer on the substrate including the core pattern, anisotropically etching the heat conductive layer down to a top surface of the core pattern to form a heat electrode surrounding a sidewall of the core pattern, and forming a phase change memory pattern connected to a top surface of the heat electrode.

Abstract: Methods and structures for discharging plasma formed during the fabrication of semiconductor device are disclosed. The semiconductor device includes a wordline, a common ground line and a fuse structure for electrically coupling the wordline and the common ground line until a break signal is applied via the fuse structure.

Abstract: A packaged micromechanical device (100) having a blocking material (116) encapsulating debris-generating regions thereof. The blocking material (116) prevents the generation of debris that could interfere with the operation of the micromechanical device (100). Debris-generating regions of the device (100), including debris-creating sidewalls and any debris-harboring cavities, as well as electrical connections (108) linking the device (100) to the package substrate (102) are encapsulated by the blocking material (116). The blocking material (116) avoids contact with any debris-intolerant regions (118) of the device (100). A package lid (122), which is glass in the case of many DMD packages, seals the device (100) in package cavity (120).

Abstract: An integrated circuit includes a first electrode and a first resistivity changing material coupled to the first electrode. The first resistivity changing material has a planarized surface. The integrated circuit includes a second resistivity changing material contacting the planarized surface of the first resistivity changing material and a second electrode coupled to the second resistivity changing material. A cross-sectional width of the first resistivity changing material is less than a cross-sectional width of the second resistivity changing material.

Abstract: An apparatus comprising a microelectromechanical system (MEMS) device. The MEMS device includes a substrate having an anchoring pad thereon and a structural element. The structural element has a beam that includes a first part and a second part. The first part is attached to both the anchoring pad and to the second part. The second part is movable with respect to the substrate and made of an electrically conductive material. Additionally, at least one of the following conditions hold: the first part is made of a material having: a first yield stress that is greater than a second yield stress of the electrically conductive material of the second part; a fatigue resistance that is greater than a second fatigue resistance of the electrically conductive material of the second part; or, a creep rate that is less than a second creep rate of the electrically conductive material of the second part.

Abstract: An integrated circuit includes a logic portion including M conductive layers, a memory portion including N conductive layers, and at least one common top conductive layer over the logic portion and the memory portion. M is greater than N.

Abstract: A vanadium oxide film is formed on an interlayer insulating layer, and a silicon oxide film and a silicon nitride film are formed on the vanadium oxide film in this order. With a resist pattern used as a mask, the silicon nitride film is patterned. Then, the resist pattern is removed using a stripping solution or oxygen plasma ashing. Next, with the patterned silicon nitride film used as a mask, the silicon oxide film and the vanadium oxide film are etched to form a resistor film of vanadium oxide.

Abstract: Phase change memory devices and fabrication methods thereof. A phase change memory device includes an array of phase change memory cells. Each phase change memory cell includes a selecting transistor disposed on a substrate. An upright electrode structure is electrically connected to the selecting transistor. An upright phase change memory layer is stacked on the upright electrode structure with a contact area therebetween, wherein the contact area serves as the location where phase transition takes place.

Abstract: The present disclosure describes a improved composite thermoelectric and an accompanying method. In accordance with one embodiment of the invention, the thermoelectric is constructed in layers from a perform of a stack of layers, and then treated or otherwise modified in order to create a thinner thermoelectric structure.

Abstract: The present invention relates to an integrated device, comprising a semiconductor device formed on a semiconductor substrate, a temperature sensing element formed within a semi-conductive layer formed on the semiconductor substrate, an electrically insulating layer formed over the semi-conductive layer, a metal layer formed over the insulation layer and forming an electrical contact of the semiconductor device, and a thermal contact extending from the metal layer through the electrically insulating layer to a first region of the semi-conductive layer, wherein the first region of the semi-conductive layer is electrically isolated from the temperature sensing element. The present invention also relates to a method of forming a temperature sensing element for integration with a semiconductor device.

Abstract: A method comprising forming a structural element 115 on a surface 620 of a layer 510 via an electroless plating of nickel or cobalt 130 onto the surface, the layer being rigidly fixed to an underlying substrate 110. The method also comprises etching away a portion of the layer such that a part of the structural element is able to move with respect to the substrate.

Abstract: The present invention provides nanowires and nanoribbons that are well suited for use in thermoelectric applications. The nanowires and nanoribbons are characterized by a periodic longitudinal modulation, which may be a compositional modulation or a strain-induced modulation. The nanowires are constructed using lithographic techniques from thin semiconductor membranes, or “nanomembranes.

Abstract: A method of manufacturing high temperature thermistors. A polycrystalline thermistor body is formed from a material selected from a list consisting of bulk polycrystalline Si with intrinsic conductivity and bulk polycrystalline Ge with intrinsic conductivity. At least one ohmic contact is formed on at least one surface of the polycrystalline thermistor body.

Abstract: A temperature sensor structure for a semiconductor device. One embodiment provides a semiconductor substrate including the semiconductor device. A dissipation region of the semiconductor device is adjacent to a main surface of the semiconductor substrate. A first layer arrangement is disposed on the main surface of the semiconductor substrate adjacent to the dissipation region of the semiconductor device. A second layer arrangement is disposed on the first layer arrangement with an insulation layer for galvanic separation therebetween. The first and second layer arrangements and the insulation layer form a layer structure on the main surface above the dissipation region. A circuit element is disposed in the second layer arrangement, the circuit element having a temperature-dependent characteristic and being coupled thermally to the dissipation region.

Abstract: A system and method for manufacturing semiconductor wafers comprising an RFID temperature sensor and generally described herein. Other embodiments may be described and claimed.

Abstract: A thermoelectric converter including p-type semiconductors and n-type semiconductors alternately provided in corresponding first and second through holes, respectively, in a ceramic honeycomb. The first and second through holes have different cross-sectional shapes and are alternately arranged. The semiconductors have respective first and second ends thereof successively connected to different ones of the semiconductors on first and second sides, respectively, of the corresponding through holes.

Abstract: An image sensor package includes a molding having a locking feature. The package further includes a snap lid having a tab, where the tab is attached to the locking feature of the molding. To form the image sensor package, a window is placed in a pocket of the molding. The snap lid is secured in place. Once secured, the snap lid presses against a peripheral region of an exterior surface of the window. The window is sandwiched between the molding and the snap lid and held in place.

Abstract: The invention relates to a data memorisation device (100, 200, 300) comprising at least: a stack of layers comprising at least one memory layer (106.1 to 106.3) based on a phase change material arranged between at least two insulating layers, placed on a substrate (102), of plurality of columns (110) arranged in the stack of layers (106.1 to 106.3, 108), and passing through each layer of this stack, each of the columns (110) being based on at least one electrically conducting material, a plurality of memory elements formed by annular portions of the memory layer (106.1 to 106.3) surround said columns (110).

Abstract: A biometric sensing device includes a sensor manufacture for sensing a biometric stimulus. The sensor manufacture is also configured to persistently store data electronically, such as security data.

Abstract: A thermoelectric conversion material having a novel composition is provided. The thermoelectric conversion material comprises a first dielectric material layer, a second dielectric material layer, and an electron localization layer that is present between the first dielectric material layer and the second dielectric material layer and that has a thickness of 1 nm.

Abstract: In a semiconductor device including a heater electrode formed in a contact hole formed in an interlayer insulation film to expose a lower electrode, the heater electrode includes at least three heater electrode layers which are successively laminated and successively increased in specific resistivity in a direction from the lower electrode towards a phase change film in this order. The interlayer insulation film is formed on a semiconductor substrate to cover the lower electrode. The phase change film is formed in contact with an upper surface of the heater electrode. An upper electrode is formed on an upper surface of the phase change film.

Abstract: A semiconductor apparatus is provided. The semiconductor apparatus includes a semiconductor substrate and a temperature sensing diode that is disposed on a surface part of the semiconductor substrate. A relation between a forward current flowing through the temperature sensing diode and a corresponding voltage drop across the temperature sensing diode varies with temperature. The semiconductor apparatus further includes a capacitor that is coupled with the temperature sensing diode, configured to reduce noise to act on the temperature sensing diode, and disposed such that the capacitor and the temperature sensing diode have a layered structure in a thickness direction of the semiconductor substrate.

Abstract: A double-sided etching method using an embedded alignment mark includes: preparing a substrate having first and second alignment marks embedded in an intermediate portion thereof; etching an upper portion of the substrate so as to expose the first alignment mark from a first surface of the substrate; etching the upper portion of the substrate using the exposed first alignment mark; etching a lower portion of the substrate so as to expose the second alignment mark from a second surface of the substrate; and etching the lower portion of the substrate using the exposed second alignment mark.

Abstract: A separated MEMS thermal actuator is disclosed which is largely insensitive to creep in the cantilevered beams of the thermal actuator. In the separated MEMS thermal actuator, a inlaid cantilevered drive beam formed in the same plane, but separated from a passive beam by a small gap. Because the inlaid cantilevered drive beam and the passive beam are not directly coupled, any changes in the quiescent position of the inlaid cantilevered drive beam may not be transmitted to the passive beam, if the magnitude of the changes are less than the size of the gap.

Abstract: Resistor elements are formed by doping impurity into a single crystal film formed on a substrate such as a silicon-on-insulator substrate. A semiconductor device having such resistor elements is used as a detector for detecting an amount of airflow, for example. The impurity density in the single crystal silicon is made lower than 1×1020/cm3 to suppress a resistance change by aging especially at a temperature higher than 310° C. To obtain a high temperature coefficient of the resistor element as well as a low resistance change by aging, the impurity density is set in a range from 4×1019/cm3 to 1×1020/cm3, and more preferably in a range from 7×1019/cm3 to 1×1020/cm3. As the impurity, N-type impurity such as phosphor or P-type impurity such as boron may be used. It is preferable to use the impurity having a low diffusion coefficient to attain a low resistance change by aging.

Abstract: A substrate is provided including a growth surface that is offcut relative to a plane defined by a crystallographic orientation of the substrate at an offcut angle of about 5 degrees to about 45 degrees. A thermoelectric film is epitaxially grown on the growth surface. A crystallographic orientation of the thermoelectric film may be tilted about 5 degrees to about 30 degrees relative to the growth surface. The growth surface of the substrate may also be patterned to define a plurality of mesas protruding therefrom prior to epitaxial growth of the thermoelectric film. Related methods and thermoelectric devices are also discussed.

Abstract: An MOCVD process provides aligned p- and n- type nanowire arrays which are then filled with p- and n-type thermoelectric films to form the respective p-leg and n-leg of a thermoelectric device. The thermoelectric nanowire synthesis process is integrated with a photolithographic microfabrication process. The locations of the p- and n-type nanowire micro arrays are defined by photolithography. Metal contact pads at the bottom and top of these nanowire arrays which link the p- and n-type nanowires in series are defined and aligned by photolithography.

Abstract: A high temperature NTC thermistor includes a polycrystalline thermistor body, selected from a list consisting of polycrystalline Si with intrinsic conductivity and polycrystalline Ge with intrinsic conductivity. At least one ohmic contact is disposed on at least one surface of the polycrystalline thermistor body.

Abstract: A thermoelectric material includes a composite having a first electrically conducting component and second low thermal conductivity component. The first component may include a semiconductor and the second component may include an inorganic oxide. The thermoelectric composite includes a network of the first component having nanoparticles of the second component dispersed in the network.

Abstract: Provided are a phase change layer and a method of forming the phase change layer and a phase change memory device including the phase change layer, and methods of manufacturing and operating the phase change memory device. The phase change layer may be formed of a quaternary compound including an amount of indium (In) ranging from about 15 at. % to about 20 at. %. The phase change layer may be InaGebSbcTed, wherein an amount of germanium (Ge) ranges from about 10 at. %?b?about 15 at. %, an amount of antimony (Sb) ranges from about 20 at. %?c?about 25 at. %, and an amount of tellurium (Te) ranges from about 40 at. %?d?about 55 at. %.

Abstract: A semiconductor laser device aimed to be reduced in size and that can maintain high position accuracy, and a fabrication method of such a semiconductor laser device are achieved. A semiconductor laser device includes a stem as a base member, and a cap member. The stem includes a main unit having a reference plane, and a heat sink platform as an element mount unit, located on the reference plane for mounting a laser element. The cap member is set on the reference plane of the stem so as to cover the heat sink platform. A hole is formed at the sidewall of the cap member facing the heat sink platform. Fixation between the cap member and the stem is established by fixedly attaching the portion at the inner side of the sidewall of the cap member adjacent the hole to the outer circumferential plane of a heat sink platform.

Abstract: A method and system for using a method of pre-equilibrium ballistic charge carrier refraction comprises fabricating one or more solid-state electric generators. The solid-state electric generators include one or more of a chemically energized solid-state electric generator and a thermionic solid-state electric generator. A first material having a first charge carrier effective mass is used in a solid-state junction. A second material having a second charge carrier effective mass greater than the first charge carrier effective mass is used in the solid-state junction. A charge carrier effective mass ratio between the second effective mass and the first effective mass is greater than or equal to two.

Abstract: A memory cell has thermal isolation material between a bottom electrode and a plug contact to confine heat in a memory element during programming and reset operations. In a particular embodiment, the memory element is a chalcogenide, such as GST. An electrically conductive barrier layer deposited over the contact and on sidewalls of a recess formed over the contact electrically couples the bottom electrode to the contact.

Abstract: A thermopile-based thermal detector is provided by a thermocouple, formed from a single sheet of material, which is made dissimilar with a P-doped and an N-doped junction electrically isolated via a naturally forming depletion region. The thermopile P-N sheet is uniform and planar, addressing stress and manufacturing issues. The usual non-active area of a conventional thermopile is significantly reduced or eliminated, and thus the output signal per unit diaphragm area of the detector is substantially increased, without the typical reduction in the signal-to-noise ratio. Also, a significant reduction in size of the thermal detector area is provided without a reduction in signal or signal-to-noise ratio. In an aspect, a second layer of thermocouples is axially positioned over, and connected with, a first layer of thermocouples. Additional axially stacked thermopiles can be provided within the same fabrication process. Signal processing circuitry may be electrically interconnected with the thermocouple.

Abstract: The invention relates to an optoelectronic component for converting electromagnetic radiation into an intensity-dependent photoelectric current. The component includes one substrate which is formed especially according to CMOS technology. The substrate has an integrated semiconductor structure and an optically active thin layer structure which is situated upstream in the direction of light incidence. The structure includes a layer of a transparent conductive material and at least one layer of semiconductor material, which are arranged on an isolating layer, inside which connection means are provided for establishing a connection between the optically active thin layer structure and the integrated semiconductor structure arranged on the substrate. The aim of the invention is to develop one such optoelectronic component in such a way that the electrical connection between the layer of transparent conductive material and an electrical potential connection can be established in a technically simple manner.

Abstract: The present invention provides a method for controlling power change for a semiconductor module. Specifically, under the present invention power is applied to, or removed from a semiconductor module between a lower power state such as a zero power, nap or sleep state and a full power state over a predetermined time period. This allows the rate of movement and strain rate of the thermal interface material within the semiconductor module to be controlled, thus preserving the reliability of the material. Typically, the power is changed over time between the lower power state and the full power state in a linear fashion or incrementally.