Abstract: The invention provides a sensor array with different nanodisk sensors that may be fabricated by direct site-specific dip-pen nanopatterning (DPN) using precursor inks. The good flow characteristics and strong affinity of the sols to measurement electrodes enable intimate ohmic contact. The measurable, reproducible and proportionate changes in the resistance of the sensors when exposed to trace quantities of oxidative and reducing gases constitute the basis for nanodisk gas sensors. The nanodisk sensors show rapid response and ultra-fast recovery for the detection of nitrogen dioxide and acetic acid vapor. Based on the principles of pattern recognition of the olfactory system, an electronic nose that can “smell” different gaseous species is provided with the multiple nanodisk sensor array.

Abstract: A temperature measuring method for a target substrate to be thermally processed in a semiconductor processing apparatus under a predetermined process condition is provided. This method includes the steps of detecting a heat flux supplied from at least part of the target substrate and detecting a temperature of a sensor by using the sensor facing the target substrate, and calculating a temperature of the target substrate from a parameter, including a thermal resistance between the sensor and the target substrate under the predetermined process condition, the detected heat flux, and the temperature of the sensor. The sensor is arranged opposite to heating means, through the target substrate, which heats the target substrate. The parameter may be obtained in advance by calibration.

Abstract: A high temperature hybrid-circuit structure includes a temperature sensitive device which comprises SiC, AlN and/or AlxGa1-xN(x>0.69) connected via electrodes to an electrically conductive mounting layer that is physically bonded to an AlN die. The die, temperature sensitive device and mounting layer, which can be a thin film of W, WC or W2C less than 10 micrometers thick, have temperature coefficients of expansion within 1.06 of each other. The mounting layer can consist entirely of a W, WC or W2C adhesive layer, or an adhesive layer with an overlay metallization having a thermal coefficient of expansion not greater than about 3.5 times that of the adhesive layer. Applications include temperature sensors, pressure sensors, chemical sensors and high temperature and high power electronic circuits. Without the mounting layer, a thin film piezoelectric layer of SiC, AlN and/or AlxGa1-xN(x>0.69), less than 10 micrometers thick, can be secured to the die.

Abstract: A method for measuring temperature T over a wide range by exploiting a tunnel junction, in which the tunnel junction includes two metallic conductors and a thin insulating layer between the conductors. The resistance R of the insulating layer is measured over the linear section of the voltage-current curve and the temperature T is determined from the equation: 1 R = 1 R 0 ⁢ ( 1 + ( T T 0 ) 2 ) , in which R0 is a previously calibrated constant and T0 is a material constant.

Abstract: The present invention includes electronic device workpieces, methods of semiconductor processing and methods of sensing temperature of an electronic device workpiece. In one aspect, the invention provides an electronic device workpiece including: a substrate having a surface; a temperature sensing device borne by the substrate; and an electrical interconnect formed upon the surface of the substrate, the electrical interconnect being electrically coupled with the temperature sensing device. In another aspect, a method of sensing temperature of an electronic device workpiece includes: providing an electronic device workpiece; supporting a temperature sensing device using the electronic device workpiece; providing an electrical interconnect upon a surface of the electronic device workpiece; electrically coupling the electrical interconnect with the temperature sensing device; and sensing temperature of the electronic device workpiece using the temperature sensing device.

Abstract: A method of fabricating a reference microbolometer structure on a substrate comprises the steps of applying a sacrificial layer to the substrate; applying a further layer to the sacrificial layer, the further layer incorporating a temperature sensitive material; and partially removing the sacrificial layer from the substrate such that a portion of the sacrificial layer is not removed at least in a region between temperature sensitive material and the substrate. The portion of the sacrificial layer that is not removed thereby forms a body of solid material, and a path of low thermal impedance, between the temperature sensitive material and the substrate.

Abstract: A Seebeck effect thermal sensor is formed in an integrated fashion with a power-dissipating device such as a power MOSFET. The integrated device generates a temperature difference between a relatively cold peripheral area and a relatively warm central area, the temperature difference having a known relationship to electrical operating conditions of the device. A structure for a power MOSFET includes two side-by-side arrays of source/drain diffusions. The Seebeck sensor has warm junctions at the central area and cold junctions at the peripheral area, and generates an electrical output signal having a known relationship to the temperature difference between the peripheral and central areas to provide an indication of the electrical operating conditions of the device. One Seebeck sensor includes alternating metal and polysilicon traces, wherein the polysilicon traces lie between source and drain diffusions of a power MOSFET just as do active polysilicon gates.

Abstract: Semiconductor chip structures are provided with embedded thermal conductors for removing heat from one or more electrically conductive circuit members thereof, wherein the circuit members are formed on one or more dielectric layers above a substrate, each layer having a low dielectric constant and a low thermal conductivity. One or more cooling posts, for example, multiple thermally conductive plugs, are selectively disposed within the semiconductor chip structure adjacent to one or more electrically conductive members and thermally coupled thereto so that heat produced by the members is transferred into and through the cooling posts for forwarding to the substrate and/or to an upper surface of the semiconductor chip structure. The backside of the substrate has a thermal sink thermally coupled thereto and electrically isolated from the substrate.

Abstract: A method for making a solid-state imaging device that can form a first P-type well region deep in a substrate without being affected by the heat applied during an epitaxial growth process is disclosed. The method includes a first step of preparing a substrate composite comprising an first substrate and a second substrate on the first substrate, a second step of implanting impurity ions from the surface of the second substrate at an energy exceeding 3 MeV so as to form a barrier layer, and a third step of forming a photosensor in the second substrate.

Abstract: A thermoelectric module includes plural thermoelectric semiconductor chips connected in series, first and second substrates, plural first and second electrodes formed on the first and second substrates, first solder through which the first and second electrodes are bonded to end portions of the thermoelectric semiconductor chips. The first substrate includes two or more protrusions protruding toward opposite sides with respect to the second substrate when being viewed vertically. A method of assembling a thermoelectric module in a radiating member includes the steps of mounting the first substrate on a radiating member through the second solder having a liquidus temperature lower than a solidus temperature of the first solder; holding the protrusions by leading edges of support arms where the second solder is melted to push the first substrate toward the radiating member under pressure while rocking the first substrate in a direction orthogonal to the pushing direction.

Abstract: A method for manufacturing a semiconductor component (100; . . . ; 700), a multilayer semiconductor component in particular, preferably a micromechanical component, such as a heat transfer sensor in particular having a semiconductor substrate (101), in particular made of silicon, and a sensor region (404).

Abstract: A method, and associated structure, for monitoring temperature and temperature distributions in a heating chamber for a temperature range of 200 to 600° C., wherein the heating chamber may be used in the fabrication of a semiconductor device. A copper layer is deposited over a surface of a semiconductor wafer. Next, the wafer is heated in an ambient oxygen atmosphere to a temperature in the range of 200-600° C. The heating of the wafer oxidizes a portion of the copper layer, which generates an oxide layer. After being heated, the wafer is removed and a sheet resistance is measured at points on the wafer surface. Since the local sheet resistance is a function of the local thickness of the oxide layer, a spatial distribution of sheet resistance over the wafer surface reflects a distribution of wafer temperature across the wafer surface during the heating of the wafer.

Abstract: A heat sink/heat spreader structure utilizing thermoelectric effects to efficiently transport thermal energy from a variety of heat sources including integrated circuits and other electronic components. A method for manufacturing the heat sink/spreader is also disclosed.

Abstract: Method for manufacturing a plurality of pyroelectric sensors by forming a thin pyroelectric film or layer on one face of a silicon wafer or substrate, wherein electric polarization of this film is provided between lower and upper electrodes defining pixels forming these sensors. In order to protect the wafer in the event of a short-circuit between two electrodes of a pixel, resistors are arranged in series with the lower or upper electrodes by connecting these electrodes to each other by subsets in order to carry out the electric polarization. Once this polarization has been carried out, the electric connections connecting the upper or lower electrodes are removed to allow each pixel to supply an elementary electric signal when the sensor is operating. In order to minimize the risk of short-circuits and in order to reduce the stray capacity of the electrodes, the upper and lower electrodes of the pixels are structured.

Abstract: A method of fabricating an uncooled ferroelectric/pyroelectric infrared detector having a semi-transparent electrode material includes using a lattice matched substrate material and a crystallographically oriented bottom electrode material as a template for the growth of a crystallographically oriented ferroelectric/pyroelectric film. In a second preferred embodiment, the method includes fabricating a detector assembly, inverting the assembly, and attaching the inverted assembly to a circuit. This embodiment avoids temperature processing constraints associated with the circuit, and thus facilitates the use of higher growth temperatures. Advantages associated with the embodiments of the present invention include the ability to fabricate a crystallographically oriented bottom electrode material as a template for the growth of a crystallographically oriented ferroelectric/pyroelectric film. Furthermore, once the fabrication is complete, the substrate upon which the electrode is deposited can be easily removed.

Abstract: A thermoelectric cooler utilizing superlattice and quantum-well materials may be deposited directly onto a die using thin-film deposition techniques. The materials may have a figure-of-merit of greater than one.

Abstract: A method of manufacturing a component, in particular a thermal sensor, and a thermal sensor. The component has at least two regions having different heat conductivities, a surface region being created in a substrate and the heat conductivity of the surface region being lower than that of the surrounding substrate. For producing a flat topography on the component a layer is created which covers the surface region. The layer and the surface region have at least approximately similar physical properties.

Abstract: A manufacturing method for a three dimensional conical horn antenna coupled image detector includes depositing a sacrificial layer on the upper section of the substrate, and forming a pattern for the sacrificial layer is by performing a patterning process using the first etching mask. The method further includes depositing a first silicon nitride layer, forming a first silicon nitride layer, depositing a vanadium oxide layer, forming a vanadium oxide layer pattern, depositing a conductive layer, forming a conductive layer pattern, depositing a second silicon nitride layer, forming a second silicon nitride layer pattern, depositing a third silicon nitride layer, forming a side wall space pattern, and after the sacrificial layer is removed, performing an aligning process using a seventh etching mask.

Abstract: A method and structure for a semiconductor structure that includes a substrate having at least one integrated circuit heat generating structure is disclosed. The invention has at least one integrated circuit cooling device on the substrate adjacent the heat generating structure. The cooling device is adapted to remove heat from the heat generating structure. The cooling device includes a cold region and a hot region. The cold region is positioned adjacent the heat generating structure. The cooling device has one of a silicon germanium super lattice structure. The cooling device also has a plurality of cooling devices that surround the heat generating structure. The cooling device includes a thermoelectric cooler.

Abstract: A radiation sensor which includes a thermopile for detecting radiant energy. The thermopile and a support rim for the thermopile are fabricated as an integrated unit to form a support chip. The support chip is mated to a mating chip so that the thermopile is positioned in an inner cavity region of the radiation sensor. The sensor has a window which permits the transmission of radiant energy into the enclosure such that the radiant energy impinges upon a central absorber region of the thermopile.

Abstract: A regenerative photoelectrochemical (RPEC) device comprising two substrates, wherein: one or both substrates are transparent and are coated with transparent electrical conductor (TEC) layer; one or more layers of porous wide band gap semiconductor is/are applied to selected area of said TEC layer and sensitised with dye; electrolyte is placed between said two substrates; hole(s) made in one or both said substrates to enable external electrical connection(s) to said RPEC device.

Abstract: A wafer-level packaging process for MEMS applications, and a MEMS package produced thereby, in which a SOI wafer is bonded to a MEMS wafer and the electrical feed-throughs are made through the SOI wafer. The method includes providing a first substrate having the functional element thereon connected to at least one metal lead, and providing a second SOI substrate having a recessed cavity in a silicon portion thereof with metal connectors formed in the recessed cavity. The non-recessed surfaces of the SOI substrate are bonded to the first substrate to form a hermetically sealed cavity. Within the cavity, the metal leads are bonded to respective metal connectors. Prior to bonding, the recessed cavity has a depth that is greater than the thickness of the functional element and less than the combined thickness of the metal leads and their respective metal connectors. After bonding, silicon from the SOI substrate is removed to expose the buried oxide portion of the SOI substrate.

Abstract: A thermistor having multiple metal layers about at least a portion of a semiconductor body. The thermistor includes a first thick film electrode layer, a reactive metal layer, a barrier metal layer and, optionally, a layer to facilitate attachment to an electrical contact. Also, a method of making the thermistor is described.

Abstract: The present invention relates to a method for micro-fabricating a pixelless thermal imaging device. The imaging device up-converts a sensed 2-dimensional M/FIR image into a 2-dimensional image in the NIR to visible spectrum in dependence thereupon. A plurality of layers forming an integrated QWIP-LED wafer are crystallographically grown on a surface of a first substrate. The layers comprise an etch stop layer, a bottom contact layer, a plurality of layers forming a QWIP and a LED, and a top contact layer. At the top of the QWIP-LED wafer an optical coupler such as a diffraction grating for coupling at least a portion of incident M/FIR light into modes having an electric field component perpendicular to quantum wells of the QWIP is provided. In following processing steps the first substrate and the etch stop layer are removed. Various different thermal imaging devices are manufactured by changing the order of manufacturing steps, omitting some steps or using different materials.

Abstract: A method for manufacturing a thermoelectric cooling mechanism for an integrated circuit is disclosed. Initially, electric circuits are formed on one side of a wafer. Subsequently, thermoelectric cooling devices are formed on an opposite side of the same wafer. Specifically, the thermoelectric cooling devices are formed by depositing a first conductive layer, depositing a layer of Peltier material on top of the first conductive layer, building a set of N30 regions and P30 regions within the Peltier material layer, and depositing a second conductive layer on top of the Peltier material layer.

Abstract: A magnetic random access memory (MRAM) with a low write current, characterized in that an improved MRAM structure is composed of a plurality of conductive metal pillars disposed on both sides of a magnetic tunnel junction (MTJ) cell functioning as a memory cell. The conductive metal pillars generate a superposed magnetic field so as to reduce the write current into the MTJ cell, thereby reducing the power consumption during the operation of an MRAM. The metal pillars are formed by employing a modified mask so that a plurality of plugs are formed by via etching and metal deposition. Moreover, at least one turn of conductive metal coil is disposed near the memory cell. The enhanced magnetic field thus generated results in a lowered write current as well as reduced power consumption.

Abstract: An infrared detecting capacitor formed of a ferroelectric film has its capacitor portion supported by first and second interconnecting lines to be held on an Si substrate located on both sides of a trench. A lower electrode is coupled with the first interconnecting line while an upper electrode is coupled with the second interconnecting line. The capacitor portion is a rectangle in shape in plan view without small triangular sections opposite to each other in the diagonal direction.

Abstract: A microelectronic assembly is made by bonding the tip ends of leads on a first element to bonding contacts on a second element. The tip ends of the leads are releasably connected to the first element, so that the leads are held in place during the bonding process. After bonding, the first and second elements are heated or cooled to cause differential thermal expansion, which breaks at least some of the releasable attachments of the tip ends, leaving the leads free to flex.

Abstract: Method for manufacturing a plurality of pyroelectric sensors by forming a thin pyroelectric film or layer on one face of a silicon wafer or substrate, wherein electric polarisation of this film is provided between lower and upper electrodes defining pixels forming these sensors. In order to protect the wafer in the event of a short-circuit between two electrodes of a pixel, resistors are arranged in series with the lower or upper electrodes by connecting these electrodes to each other by subsets in order to carry out the electric polarisation. Once this polarisation has been carried out, the electric connections connecting the upper or lower electrodes are removed to allow each pixel to supply an elementary electric signal when the sensor is operating. In order to minimise the risk of short-circuits and in order to reduce the stray capacity of the electrodes, the upper and lower electrodes of the pixels are structured.

Abstract: A manufacturing method for a thin-layer component, in particular a thin-layer high-pressure sensor, having a substrate on which the at least one functional layer to be patterned is to be deposited in the steps, preparing the substrate; depositing the functional layer on the substrate; and patterning the functional layer via a laser processing step, the laser processing step being selective with respect to the substrate.

Abstract: In one embodiment, the present invention is directed to a method of fabricating a micro-mechanical latching device, comprising: depositing a structural layer in a fabrication plane, wherein the first structural layer possesses a topography; depositing a sacrificial layer adjacent to the first layer such that the sacrificial layer conforms to the topography of the first layer; depositing a second structural layer that conforms to the topography of the first layer; removing the sacrificial layer; and using at least the first structural layer and second structural layer to fabricate the micro-mechanical latching device.

Abstract: A method and system for forming a thermoelement for a thermoelectric cooler is provided. In one embodiment a substrate having a plurality of pointed tips covered by a metallic layer is formed. Portions of the metallic layer are covered by an insulator and other portions of the metallic layer are exposed. Next, a patterned layer of thermoelectric material is formed by depositions extending from the exposed portions of the metallic layer in the presence of a deposition mask. Finally, a metallic layer is formed to selectively contact the patterned layer of thermoelectric material.

Abstract: A micro-electromechanical (MEM) process for fabrication of integrated multi-frequency communication passive components is fused into co-fired ceramics by way of “flip chip” for fabrication of a low-cost, high-performance, and high-reliability hybrid communication passive component applicable in the frequency range of 0.9 GHz˜100 GHz. The basic structure of the passive component is a double-layer substrate comprising a low-loss ceramic or glass bottom-layer substrate and a glass or plastic poly-molecular top-layer substrate and an optional ceramic substrate at the lowest layer. As the materials used and the processing temperature in the MEM process is compatible with the CMOS process, thus this invention is fit for serving as a post process following the CMOS process.

Abstract: A method for making a thin film device or pyroelectric sensor is provided. A film layer of thin film functional material is grown on a large diameter growth substrate. One or more protective layers may be deposited on the surface of the growth substrate before the thin film functional material is deposited. Hydrogen is implanted to a selected depth within the growth substrate or within a protective layer to form a hydrogen ion layer. The growth substrate and associated layers are bonded to a second substrate. The layers are split along the hydrogen ion implant and the portion of the growth substrate and associated layers that are on the side of the ion layer away from the second substrate are removed.

Abstract: Micromachine systems are provided. An embodiment of such a micromachine system includes a substrate that defines a trench. First and second microelectromechanical devices are arranged at least partially within the trench. Each of the microelectromechanical devices incorporates a first portion that is configured to move relative to the substrate. Methods also are provided.

Abstract: An integrated circuit device having a built-in thermoelectric cooling mechanism is disclosed. Electric circuits are formed on one side of a wafer. Subsequently, multiple thermoelectric cooling devices are formed on another side of the wafer.

Abstract: A superlattice thermoelectric device. The device is comprised of p-legs and n-legs, each leg being comprised of a large number of at least two different very thin alternating layers of elements. The n-legs in the device are comprised of alternating layers of silicon and silicon carbide. In preferred embodiments p-legs are comprised of a superlatice of B-C layers, with alternating layers of different stoichiometric forms of B-C. This preferred embodiment is designed to produce 20 Watts with a temperature difference of 300 degrees C. with a module efficiency of about 30 percent. The module is about 1 cm thick with a cross section area of about 7 cm2 and has about 10,000 sets of n and p legs each set of legs being about 55 microns thick and having about 5,000 very thin layers (each layer about 10 nm thick).

Abstract: A method and system for forming a thermoelement for a thermoelectric cooler is provided. In one embodiment a substrate having a plurality of pointed tips covered by a metallic layer is formed. Portions of the metallic layer are covered by an insulator and other portions of the metallic layer are exposed. Next, a patterned layer of thermoelectric material is formed by depositions extending from the exposed portions of the metallic layer in the presence of a deposition mask. Finally, a metallic layer is formed to selectively contact the patterned layer of thermoelectric material.

Abstract: A touch-sensitive semiconductor chip having a physical interface to the environment, where the surface of the physical interface is coated with a fluorocarbon polymer. The polymer is highly scratch resistant and has a characteristic low dielectric constant for providing a low attenuation to electric fields. The polymer can be used instead of conventional passivation layers, thereby allowing a thin, low dielectric constant layer between the object touching the physical interface, and the capacitive sensing circuits underlying the polymer.

Abstract: A projector employing multiple organic electroluminescence (OEL) image panels, in which each image panel is made with multiple light-emitting OEL components. Each light-emitting OEL component represents one image element. The OEL component is capable of emitting individual prime colors, red (R), green (G) or blue (B), or producing white light which is then made to passes through color filters to produce RGB colors. The new structure for the projector provides the features of downsized dimensions, luminous efficiency and light-focusing capability.

Abstract: The present invention relates to a method for micro-fabricating a pixelless thermal imaging device. The imaging device up-converts a sensed 2-dimensional M/FIR image into a 2-dimensional image in the NIR to visible spectrum in dependence thereupon. A plurality of layers forming an integrated QWIP-LED wafer are crystallographically grown on a surface of a first substrate. The layers comprise an etch stop layer, a bottom contact layer, a plurality of layers forming a QWIP and a LED, and a top contact layer. At the top of the QWIP-LED wafer an optical coupler such as a diffraction grating for coupling at least a portion of incident M/FIR light into modes having an electric field component perpendicular to quantum wells of the QWIP is provided. In following processing steps the first substrate and the etch stop layer are removed. Various different thermal imaging devices are manufactured by changing the order of manufacturing steps, omitting some steps or using different materials.

Abstract: Method for manufacturing a thermopile on an electrically insulating substrate. A pattern is arranged on this substrate of parts which consist of a first conductive material, to which a second conductive material is applied, and parts which consist only of the first conductive material.

Abstract: The present invention provides an on-chip temperature sensor formed of an MOS tunneling diode. The temperature sensor is formed by processes which are compatible with the below 0.13 &mgr;m CMOS technology, so it can be fabricated with MOS devices and integrated into an IC chip. Since the MOS tunneling diode has the characteristic of a diode, a formula showing the exponential relationship between the gate current and the substrate temperature can be obtained when the MOS tunneling diode is biased inversely at a constant voltage. After the current of the MOS tunneling diode is detected, the substrate temperature which represents the real temperature of the IC chip can be figured out.

Abstract: An infrared sensor including a substrate, a plurality of infrared detection pixels arrayed on a substrate with each of the infrared detection pixels including an infrared absorption portion formed over the substrate and configured to absorb infrared radiation, a thermoelectric converter portion formed over the substrate and configured to convert a temperature change in the infrared absorption portion into an electrical signal, and support structures configured to support the thermoelectric converter portion and the infrared absorption portion over the substrate via a separation space, the support structures having conductive interconnect layers configured to deliver the electrical signal from the thermoelectric converter portion to the substrate.

Abstract: A two-pin liquid sample dispensing system is provided. The two-pin dispensing system comprises a pair of separately movable pins for holding a droplet of liquid therebetween. Each pin includes a tip spaced predetermined distance from the other pin to define a sample acquisition region. The pins acquire and hold a droplet of the liquid sample in the sample acquisition region formed in the space between the tips and apply the droplet to a selected sample handing system. The distance between the tips is variable to accommodate different liquid samples having varying physical properties and to vary the volume of the acquired droplet.

Abstract: A “low field enhancement” (LFR) semiconductor saturable absorber device design in which the structure is changed such that it has a resonant condition. Consequently, the field strength is substantially higher in the spacer layer, resulting in a smaller saturation fluence and in a higher modulation depth. However, the field in the spacer layer is still lower than the free space field or only moderately enhanced compared to the field in the free space. According to one embodiment, the absorber device is a Semiconductor Saturable Absorber Mirror (SESAM) device. In contrast with SESAMs according to the state of the art, a structure including the absorber and being placed on top of a Bragg reflector is provided, which essentially fulfills a resonance condition whereby a standing electromagnetic wave is present in the structure. In other words, the design is such that the field intensity reaches a local maximum in the vicinity of the device surface.

Abstract: The present invention provides a method and apparatus for marking a semiconductor wafer or device. The method and apparatus have particular application to wafers or devices which have been subjected to a thinning process, including backgrinding in particular. The present method comprises reducing the cross-section of a wafer or device, applying a tape having optical energy-markable properties over a surface or edge of the wafer or device, and exposing the tape to an optical energy source to create an identifiable mark. A method for manufacturing an integrated circuit chip and for identifying a known good die are also disclosed. The apparatus of the present invention comprises a multi-level laser-markable tape for application to a bare semiconductor die. In the apparatus, an adhesive layer of the tape provides a homogeneous surface for marking subsequent to exposure to electro-magnetic radiation.

Abstract: A method for producing a thermoelectric semiconductor includes an ingot production step for producing an ingot of a thermoelectric semiconductor and an integrating step for integrating a plurality of the ingots by plastic deforming the ingots to produce an integrated ingot of the thermoelectric semiconductor. The large size of the thermoelectric semiconductor ingot having uniform performance and mechanical strength can be produced by integration of two or more ingots. Therefore, many wafers can be produce at one time in the slicing step, and productivity is improved. Further, two or more ingots are integrated by plastic deformation so that the connecting strength of the connecting interface is strong.

Abstract: Disclosed are systems and methods which utilize mounting members adapted to provide consistent compressive pressure with respect to strata of a laminated structure, such as the heat source, TEC, and heat absorbing layers of a TEC stack-up, throughout a range of operating temperatures. Preferably, mounting members of the present invention are adapted to provide uniform compressive pressure across a surface area, such as the heat transferring surfaces of a TEC, to thereby provide a sound structure which is relatively resistant to dynamic forces. Preferred embodiment mounting members are adapted to minimize the transfer of thermal energy therethrough, such as to substantially avoid a heat leak in a TEC stack-up configuration.

Abstract: The invention relates to a device and a method for detecting the reliability of integrated semiconductor components. The device includes a carrier substrate for receiving an integrated semiconductor component that will be examined, a heating element, and a temperature sensor. The temperature sensor has at least a portion of a parasitic functional element of the semiconductor component. As a result, reliability tests can be carried out in a particularly accurate and space-saving manner.