Thermally Responsive Patents (Class 438/54)
  • Patent number: 6511860
    Abstract: Method for manufacturing a thermopile on an electrically insulating substrate. A pattern is arranged on this substrate of parts which consist of a first conductive material, to which a second conductive material is applied, and parts which consist only of the first conductive material. The second material is better electrically conducting than the first and, connected as thermopile, can thereby generate a certain thermo-voltage. The second material is applied to the first, starting from a layer of the first material on the substrate, by etching stripes therein via the so-called “blind-hole etching” technique and applying the second material in these stripes.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: January 28, 2003
    Assignee: Berkin, B.V.
    Inventors: Hendrik Jan Boer, Frederik Van Der Graaf, Boudewijn Martinus
  • Publication number: 20030003619
    Abstract: A method and apparatus for rapid prototyping and fabrication of passivated microfluidic structures is disclosed. The method and apparatus may be used to fabricate and passivate the microfluidic channel in one system.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventors: Paul Winer, George P. Vakanas
  • Patent number: 6495390
    Abstract: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with laser radiation (10) using a thermally induced reflectivity switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: December 17, 2002
    Assignee: Ultratech Stepper, Inc.
    Inventors: Andrew M. Hawryluk, Somit Talwar, Yun Wang, Michael O. Thompson
  • Patent number: 6495389
    Abstract: In a method for manufacturing a semiconductor pressure sensor, after a reference pressure chamber is formed inside a semiconductor substrate and a diaphragm is formed from a part of the semiconductor substrate, a heat treatment is performed to form an insulation film, an element, or the like on the semiconductor substrate. At that time, a heat treatment temperature is controlled to be lower than (−430P0+1430)° C. where P0 is an internal pressure (atm) of the reference pressure chamber at a room temperature. Accordingly, crystal defects can be prevented from being produced in the diaphragm.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: December 17, 2002
    Assignee: Denso Corporation
    Inventors: Seiichiro Ishio, Inao Toyoda, Yasutoshi Suzuki
  • Patent number: 6492585
    Abstract: A thermoelectric device operable at below ambient, ambient or high temperatures and a method of fabricating the same is provided. The thermoelectric device is made of first and second ceramic plates. An array of thermoelectric elements are coupled between the plates with metal filled glass. The metal filled glass is capable of attaching the thermoelectric elements to the plates, as well as electrically and thermally coupling the thermoelectric elements to the plates. The thermoelectric devices are fabricated by applying metal filled glass to a plate, positioning thermoelectric elements in the metal filled glass in an electrically serpentine manner and curing the metal filled glass to affix the plates and the thermoelectric elements together.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: December 10, 2002
    Assignee: Marlow Industries, Inc.
    Inventors: John M. Zamboni, Christopher S. Bettis
  • Patent number: 6492254
    Abstract: A method of converting ball grid array (BGA) modules to column grid array (CGA) modules comprises steps of heating a BGA module, brushing the BGA module to remove the balls, and attaching columns to the module to create a CGA module. A method of converting a first CGA module to a second CGA module comprises steps of heating the first CGA module, brushing the first CGA module to remove the columns, and attaching columns to the module to create the second CGA module.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: December 10, 2002
    Assignee: BAE Systems Information and Electronic Systems Integration, Inc.
    Inventors: Keith K. Sturcken, George Clemen, Sheila J. Konecke, Saint Nazario-Camacho
  • Publication number: 20020179992
    Abstract: A high temperature hybrid-circuit structure includes a temperature sensitive device which comprises SiC, AlN and/or AlxGa1−xN(x>0.69) connected by electrodes to an electrically conductive mounting layer that is physically bonded to an AlN die. The die, temperature sensitive device and mounting layer (which can be W, WC or W2C) have temperature coefficients of expansion within 1.06 of each other. The mounting layer can consist entirely of a W, WC or W2C adhesive layer, or an adhesive layer with an overlay metallization having a thermal coefficient of expansion not greater than about 3.5 times that of the adhesive layer. The device can be encapsulated with a reacted borosilicate mixture, with or without an upper die which helps to hold on lead wires and increases structural integrity. Applications include temperature sensors, pressure sensors, chemical sensors, and high temperature and high power electronic circuits.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 5, 2002
    Applicant: Hetron
    Inventor: James D. Parsons
  • Publication number: 20020125540
    Abstract: In a semiconductor device in which a plurality of electro-thermal conversion elements and a plurality of switching devices for flowing electric currents through the plural electro-thermal conversion elements are integrated on a first conductive type semiconductor substrate, the switching devices are insulated gate type field effect transistors severally comprising: a second conductive type first semiconductor region formed on one principal surface of the semiconductor substrate; a first conductive type second semiconductor region for supplying a channel region, the second semiconductor region being formed to adjoin the first semiconductor region; a second conductive type source region formed on the surface side of the second semiconductor region; a second conductive type drain region formed on the surface side of the first semiconductor region; and gate electrodes formed on the channel region with a gate insulator film put between them; and the second semiconductor region is formed by a semiconductor having a
    Type: Application
    Filed: December 26, 2001
    Publication date: September 12, 2002
    Inventors: Mineo Shimotsusa, Kei Fujita, Yukihiro Hayakawa
  • Patent number: 6448103
    Abstract: A cantilevered beam is formed over a cavity to an accurate length by isotropically etching a fast-etching material, such as hydrogen silisquioxane, out of the cavity. The cavity is initially defined within a slow-etching material. The selectivity of the etch rates of the material within the cavity relative to the material defining the walls of the cavity permits accurate control of the length of the free end of the cantilevered beam. The resonant frequency of the cantilevered beam can be tuned to a narrow predetermined range by laser trimming.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: September 10, 2002
    Assignee: STMicroelectronics, Inc.
    Inventor: Danielle A. Thomas
  • Patent number: 6440768
    Abstract: The present invention provides a novel thermoelectric semiconductor material having excellent thermoelectric property which is not lowered like a conventional PbTe-based or PbSnTe-based semiconductor material even if a strength is improved by sintering. The thermoelectric semiconductor material of the invention is characterized by having chemical formula AB2X4 (where, A is a simple substance or mixture of Pb, Sn and Ge (IV family elements), B is a simple substance or mixture of Bi and Sb (V family elements), and X is a simple substance or mixture of Te and Se (VI family elements). In this case, a spark plasma sintering device is used to apply a pulsed current through the powder material to cause an electrical discharge among particles of the powder to synthesize the compound AB2X4 having a uniform structure. And, the invention synthesizes a compound, which is to be a thermoelectric semiconductor material, so to have a uniform structure.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: August 27, 2002
    Assignee: Komatsu Ltd.
    Inventors: Akio Konishi, Katsushi Fukuda
  • Patent number: 6436346
    Abstract: A method and apparatus are provided for detecting and monitoring micro-volumetric enthalpic changes caused by molecular reactions. Micro-machining techniques are used to create very small thermally isolated masses incorporating temperature-sensitive circuitry. The thermally isolated masses are provided with a molecular layer or coating, and the temperature-sensitive circuitry provides an indication when the molecules of the coating are involved in an enthalpic reaction. The thermally isolated masses may be provided singly or in arrays and, in the latter case, the molecular coatings may differ to provide qualitative and/or quantitative assays of a substance.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: August 20, 2002
    Assignee: U T Battelle, LLC
    Inventors: Mitchel J. Doktycz, Charles L. Britton, Jr., Stephen F. Smith, Patrick I. Oden, William L. Bryan, James A. Moore, Thomas G. Thundat, Robert J. Warmack
  • Patent number: 6436853
    Abstract: A method for making a microstructure assembly, the method including the steps of providing a first substrate and a second substrate; depositing an electrically conductive material on the second substrate; contacting the second substrate carrying the electrically conductive material with the first substrate; and then supplying current to the electrically conductive material to locally elevate the temperature of said electrically conductive material and cause formation of a bond between the first substrate and the second substrate.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: August 20, 2002
    Assignee: University of Michigan
    Inventors: Liwei Lin, Yu-Ting Cheng, Khalil Najafi, Kensall D. Wise
  • Patent number: 6426236
    Abstract: Disclosed is an electroabsorption-type optical modulator, which has: a semiconductor substrate; and a semiconductor buffer layer, a semiconductor optical absorption layer and a semiconductor cladding layer which are layered in this order on the semiconductor substrate; wherein the absorption of a light wave supplied to an end of the semiconductor optical absorption layer is controlled by changing an intensity of electric field applied to the semiconductor optical absorption layer; and the semiconductor optical absorption layer has a region with absorption-edge wavelength shorter than that of the other region of the semiconductor optical absorption layer and a voltage corresponding an external electrical signal is simultaneously applied to both the regions of the semiconductor optical absorption layer, so that, to an incident light, a refractive index of the semiconductor optical absorption layer is decreased and an absorption coefficient of the semiconductor optical absorption layer is increased when an inten
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: July 30, 2002
    Assignee: NEC Corporation
    Inventors: Masashige Ishizaka, Hiroyuki Yamazaki
  • Patent number: 6410971
    Abstract: A flexible thermoelectric module having a pair of flexible substrates, a plurality of electrically conductive contacts on one side of each of the flexible substrates, and a plurality of P-type and N-type thermoelectric elements electrically connected between opposing sides of the pair of flexible substrates having the plurality of conductive contacts where the plurality of conductive contacts connect adjacent P-type and N-type elements to each other in series and where each of the P-type and N-type elements has a first end connected to one of the plurality of conductive contacts of one of the substrates and a second end connected to one of the plurality of electrical contacts of the other of the substrates.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: June 25, 2002
    Assignee: Ferrotec (USA) Corporation
    Inventor: Robert W. Otey
  • Patent number: 6410361
    Abstract: A MEMS thermal actuator device is provided that is capable of providing linear displacement in a plane generally parallel to the surface of a substrate. Additionally, the MEMS thermal actuator of the present invention may provide for a self-contained heating mechanism that allows for the thermal actuator to be actuated using lower power consumption and lower operating temperatures. The MEMS thermal actuator includes a microelectronic substrate having a first surface and at least one anchor structure affixed to the first surface. A composite beam extends from the anchor(s) and overlies the first surface of the substrate. The composite beam is adapted for thermal actuation, such that it will controllably deflect along a predetermined path that extends substantially parallel to the first surface of the microelectronic substrate. In one embodiment the composite beam comprises two or layers having materials that have correspondingly different thermal coefficients of expansion.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: June 25, 2002
    Assignee: JDS Uniphase Corporation
    Inventors: Vijayakumar R. Dhuler, Edward Hill, Allen Cowen
  • Patent number: 6395575
    Abstract: A sensor in which a field effect transistor element 3 having a gate electrode 6 on its rear side is electrically connected onto a resistive element 2 having a top surface electrode and a bottom surface electrode in such a way that the gate electrode 6 and a portion of the top surface electrode of the resistive element 2 coincides, and a grounding electrode 12 on a substrate is electrically connected with the bottom surface electrode of the resistive element 2 so that they coincides.
    Type: Grant
    Filed: January 20, 2000
    Date of Patent: May 28, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinji Umeda, Koji Nomura, Akihiko Ibata, Hiroshi Fujii, Takeshi Masutani
  • Patent number: 6391676
    Abstract: A thermoelectric module is capable of successfully reducing the heat stress for increased reliability. The module includes a plurality of thermoelectric chips of P-type and N-type arranged in a matrix between sets of first and second contacts to form a series electrical circuit. The chips are arranged to give at least three chip arrays each having a limited number of the chips. A first carrier is provided on one side of the chips to carry the first contacts and to include first bridges each integrally joining two adjacent first contacts to define first discrete couples for electrical connection of the chips in each chip array. The first carrier further includes at least two inter-array bridges which are solely responsible for electrical interconnection between the adjacent chip arrays.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: May 21, 2002
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Michimasa Tsuzaki, Nobuteru Maekawa, Narimasa Iwamoto, Junji Imai, Hiroaki Okada, Teruaki Komatsu, Shinya Murase, Hiroyuki Inoue, Masayuki Sagawa, Yuri Sakai
  • Publication number: 20020058352
    Abstract: A two-dimensional array of Lead-Salt detector elements monolithically formed mounted on an integrated circuit includes an integrated circuit having a passivation layer and a plurality of electrical contacts. The system also includes a delineated, sensitized Lead-Salt layer upon the passivation layer, the delineations forming a plurality of detector elements. The system additionally includes vias through the passivation layer to the electrical contacts and electrical couplers between the electrical contacts and the detector elements.
    Type: Application
    Filed: October 11, 2001
    Publication date: May 16, 2002
    Applicant: Litton Systems, Inc.
    Inventors: Niels F. Jacksen, Jeffrey G. Tibbitt, Michael A. Sepulveda
  • Publication number: 20020022294
    Abstract: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with laser radiation (10) using a thermally induced reflectivity switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region.
    Type: Application
    Filed: August 27, 2001
    Publication date: February 21, 2002
    Applicant: ULTRATECH STEPPER, INC.
    Inventors: Andrew M. Hawryluk, Somit Talwar, Yun Wang, Michael O. Thompson
  • Publication number: 20020006683
    Abstract: Thermopile detector and method for fabricating the same, the method including the steps of (1) forming a diaphragm film on a substrate, (2) forming thermocouples in a given region on the diaphragm film, (3) forming a protection film on the thermocouples, (4) forming photoresist on the protection film and removing the photoresist from a given region, (5) forming a black body on an entire surface including the photoresist and removing remained photoresist and the black body on the photoresist, and (6) removing a portion of the substrate from a given region of a back-side of the substrate, to expose the diaphragm film, thereby facilitating a compatibility of fabrication process with an existing semiconductor fabrication process(a CMOS fabrication process), whereby improving a mass production capability, preventing a damage to the diaphragm film occurred in formation of the black body, and controlling a property of the black body uniform.
    Type: Application
    Filed: September 5, 2001
    Publication date: January 17, 2002
    Applicant: LG Electronics Inc.
    Inventors: Insik Kim, Taeyoon Kim
  • Patent number: 6329217
    Abstract: A plurality of n-type bar-shaped devices (51) consisting of an n-type thermoelectric semiconductor and a plurality of p-type bar-shaped devices (52) consisting of a p-type thermoelectric semiconductor are regularly disposed or fixed through an insulating layer (50) to form a thermoelectric device block (53). End portions of the n-type bar shaped device (51) and the p-type bar-shaped device (52) are connected with an interconnection conductor (58a) on an upper surface (53a) and a lower surface (53b), which will be interconnecting end faces of the thermoelectric device block (53), to form a plurality of thermocouples connected in series.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: December 11, 2001
    Assignee: Citizen Watch Co., Ltd.
    Inventors: Shigeru Watanabe, Yumiko Sakamaki
  • Patent number: 6319744
    Abstract: To provide a method for manufacturing a thermoelectric semiconductor material or a thermoelectric semiconductor element and method for manufacturing a thermoelectric module effective in improving thermoelectric performance. The thermoelectric semiconductor material is manufactured by producing a laminated body of thin powders manufactured by a quenching roller method, and compressing simultaneously the side surfaces of the laminated body using a secondary punch.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: November 20, 2001
    Assignee: Komatsu Ltd.
    Inventors: Lee Yong Hoon, Takeji Kajiura
  • Publication number: 20010035542
    Abstract: A frame shutter type device provides a separated well in which the storage node is located. The storage node is also shielded by a light shield to prevent photoelectric conversion.
    Type: Application
    Filed: February 23, 2001
    Publication date: November 1, 2001
    Inventors: Eric R. Fossum, Sandor L. Barna
  • Patent number: 6305840
    Abstract: Thermopile detector and method for fabricating the same, the method including the steps of (1) forming a diaphragm film on a substrate, (2) forming thermocouples in a given region on the diaphragm film, (3) forming a protection film on the thermocouples, (4) forming a photoresist on the protection film and removing the photoresist from a given region, (5) forming a black body on an entire surface including the photoresist and removing the remaining photoresist and the black body on the photoresist, and (6) removing a portion of the substrate from a given region of a back-side of the substrate, to expose the diaphragm film, thereby facilitating a compatibility of fabrication process with an existing semiconductor fabrication process#(a CMOS fabrication process), whereby improving a mass production capability, preventing a damage to the diaphragm film occurred in formation of the black body, and controlling a property of the black body uniform.
    Type: Grant
    Filed: February 10, 1999
    Date of Patent: October 23, 2001
    Assignee: LG Electronics Inc.
    Inventors: Insik Kim, Taeyoon Kim
  • Patent number: 6300155
    Abstract: An electronic part is disposed in a space defined by upper and lower frames joined together. The upper frame has an opening portion, and a hollow packing member is disposed in the opening portion to expose a specific region of the electronic part. The upper and lower frames are further covered with a cover having a window portion at a position corresponding to the hollow portion of the packing member. In this state, a thin film is formed through the hollow portion to coat the specific region of the electronic part. The thin film is not adhered to the upper and lower frames. Accordingly, the upper and lower frames can be reused to form the thin film onto another electronic part successively.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: October 9, 2001
    Assignee: Denso Corporation
    Inventors: Takafumi Taki, Ryoichi Handa
  • Patent number: 6300150
    Abstract: A termoelectric device and method for manufacturing the thermoelectric device.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: October 9, 2001
    Assignee: Research Triangle Institute
    Inventor: Rama Venkatasubramanian
  • Publication number: 20010002319
    Abstract: A method for producing a thermoelectric semiconductor includes an ingot production step for producing an ingot of a thermoelectric semiconductor and an integrating step for integrating a plurality of the ingots by plastic deforming the ingots to produce an integrated ingot of the thermoelectric semiconductor. The large size of the thermoelectric semiconductor ingot having uniform performance and mechanical strength can be produced by integration of two or more ingots. Therefore, many wafers can be produce at one time in the slicing step, and productivity is improved. Further, two or more ingots are integrated by plastic deformation so that the connecting strength of the connecting interface is strong.
    Type: Application
    Filed: November 30, 2000
    Publication date: May 31, 2001
    Inventors: Hitoshi Tauchi, Satoru Hori, Hirotsugu Sugiura, Hiroyasu Kojima
  • Patent number: 6238085
    Abstract: A sensor having an active sensing material exposed to the substance to be detected and an active reference material that is shielded from the substance to be detected. Thermocouples having a set of junctions proximate to the active sensing material and another set of junctions to the active reference material for measuring the temperatures at the respective materials. The junctions are connected differentially in that a difference of the two temperatures is measured. A heater is proximate and common to the two materials. Heat pulses may be applied to the materials via the heater and the temperatures are measured. If ambient factors or substances affect the active sensing material, its thermal response will be different than that of the active reference material, and a differential pulse-like indication of temperature will be detected.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: May 29, 2001
    Assignee: Honeywell International Inc.
    Inventors: Robert E. Higashi, Barrett E. Cole
  • Patent number: 6235543
    Abstract: In a method of evaluating a semiconductor wafer to provide an index as to whether slip generation is likely or not, the in-plane temperature distribution of the wafer is varied at a prescribed temperature and the condition of the temperature distribution at which slip line generation occurs is detected. The temperature distribution is varied using plural concentric heaters and is measured using a radiation thermometer. The temperature distribution is correlated to thermal stress in the wafer. In this manner, a range of tolerable thermal stress is specified, at which a slip line will not be generated. Dependent on the applied temperature distribution and the determination of whether a slip line has been generated in connection with that temperature distribution, it is determined whether the periphery of the wafer has a tangential residual stress that is compressive or tensile.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: May 22, 2001
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Makoto Kiyama
  • Patent number: 6232150
    Abstract: A method for making a microstructure assembly, the method including the steps of providing a first substrate and a second substrate; depositing an electrically conductive material on the second substrate; contacting the second substrate carrying the electrically conductive material with the first substrate; and then supplying current to the electrically conductive material to locally elevate the temperature of said electrically conductive material and cause formation of a bond between the first substrate and the second substrate.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: May 15, 2001
    Assignee: The Regents of the University of Michigan
    Inventors: Liwei Lin, Yu-Ting Cheng, Khalil Najafi, Kensall D. Wise
  • Patent number: 6225141
    Abstract: The present method defines a plurality of individual temperature sensor cells on a single printed circuit board with a separate temperature detector mounted in each cell. The temperature response of each detector is characterized substantially simultaneously and the values for series and parallel trimmer resistors for each cell are determined from the temperature response of the detector for the cell. Then an automated machine attaches properly valued resistors in parallel and in series with each detector on the printed circuit board.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: May 1, 2001
    Assignee: Johnson Controls Technology Co.
    Inventors: Ronald J Wenner, Henkerikus C Van Eldick, Frank J Stier, George Rudich, Bruce R Schultz, Fernando F Garcia
  • Patent number: 6218687
    Abstract: A microsensor for identifying a change in a characteristic of an environment having temperatures of up to approximately five hundred degrees Centigrade includes a substantially flat insulator layer made of silicon oxide. A base layer made of silicon is integrally attached to one side of the insulator layer and a support layer is integrally attached to the other side of the insulator layer. Together the base layer and the support layer stabilize the support layer which is only about one thousand angstroms thick. A sensor element is mounted on the exposed surface of the support layer, and opposite the insulator layer, to generate a signal in response to the change in the environmental characteristic. Additionally, there is an electronic element which is processed into the support layer. This electronic element is electrically connected directly with the sensor element to process the signal and indicate an appropriate response.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: April 17, 2001
    Assignee: General Atomics
    Inventor: John Paul Ziegler
  • Patent number: 6203673
    Abstract: A thin-film microstructure sensor includes a substrate having an insulation layer. A thin-film platinum temperature-sensitive resistor is provided on the insulation layer of the substrate, the thin-film platinum temperature-sensitive resistor comprising a platinum layer, the platinum layer having a maximum crystal grain size above a reference grain size of 800 Å. The thin-film platinum temperature-sensitive resistor is formed by a sputtering process to provide a temperature coefficient of resistance TCR above a reference TCR level of 3200 ppm.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: March 20, 2001
    Assignees: Ricoh Company, Ltd., Ricoh Elemex Corporation
    Inventors: Hiroyoshi Shoji, Takayuki Yamaguchi, Junichi Azumi, Yukito Sato, Morimasa Kaminishi
  • Patent number: 6184538
    Abstract: Quantum-well sensing arrays for detecting radiation with two or more wavelengths. Each pixel includes at least two different quantum-well sensing stacks that are biased at a common voltage.
    Type: Grant
    Filed: October 16, 1998
    Date of Patent: February 6, 2001
    Assignee: California Institute of Technology
    Inventors: Sumith V. Bandara, Sarath D. Gunapala, John K. Liu
  • Patent number: 6171880
    Abstract: A method is provided for the manufacture of a convective accelerometer and tilt sensor device using CMOS techniques. An integrated circuit chip is produced which includes a silicon substrate having an integrated circuit pattern thereon including a heater element located centrally of the substrate and at least first and second thermocouple elements located on the substrate on opposite sides of the heater element. Thereafter, portions of the substrate surrounding and beneath the heater and thermocouple elements are etched away to suspend the element on the substrate and thus to thermally isolate the elements from the substrate. The substrate is etched up to the cold thermocouple junction of the thermocouple elements so the cold junction remains on the substrate.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: January 9, 2001
    Assignee: The United States of America as represented by the Secretary of Commerce
    Inventors: Michael Gaitan, Nim Tea, Edwin D. Bowen, Veljko Milanovic
  • Patent number: 6171886
    Abstract: A method of making micro-actuator devices including a silicon wafer, a magnet positioned inside an insulated actuating chamber having electrical coil wound around its circumference thereby forming an electromagnet assemblage. A plurality of etched holes in silicon wafer receives the electromagnet assemblage and is adapted to produce a magnetic field in response to an applied current that acts on the magnet to cause the axial reciprocating motion of the magnet.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: January 9, 2001
    Assignee: Eastman Kodak Company
    Inventors: Syamal K. Ghosh, Edward P. Furlani, Dilip K. Chatterjee
  • Patent number: 6139758
    Abstract: A method of manufacturing a micromachined thermal flowmeter is provided. The major manufacturing steps comprise forming an n-type region(s) in a p-type silicon wafer, forming heating and temperature sensing devices in the n-type region(s), converting the n-type region(s) into porous silicon by anodization in a HF solution, bonding the silicon wafer onto a glass plate using a polyimide layer as an adhesive layer, removing the porous silicon in a diluted base solution, and coating the heating and temperature sensing devices with a corrosion-resistant and abrasion-resistant material.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: October 31, 2000
    Assignee: Enlite Laboratories, Inc.
    Inventor: Xiangzheng Tu
  • Patent number: 6140144
    Abstract: A method for packaging and protection of sensors, particularly so called microsensors is disclosed. A sensor unit (either a sensor chip or sensor package) is flip chip bonded to a substrate having a through hole, such that the sensing element is placed above the through hole. An underfill material is applied in such a way that due to capillary forces, the entire common area between the sensor and the substrate is completely filled, while the sensing element is not covered by the underfill material. This provides an effective way of sealing the sensing element from the side of the package containing the electronics. For a sensor chip that has been through a first level packaging process, the above mentioned method can still be used for bonding the sensor package to a substrate containing an access hole. For some applications one or multiple layers of protective coatings can be deposited on either one side or both sides of the sensor package for protection against the operating environment.
    Type: Grant
    Filed: April 14, 1997
    Date of Patent: October 31, 2000
    Assignee: Integrated Sensing Systems, Inc.
    Inventors: Nader Najafi, Sonbol Massoud-Ansari
  • Patent number: 6107645
    Abstract: A cold end and a hot end are demarcated in a first thermoelectric semiconductor member. A first member made from metal or a semiconductor is connected to the cold end of the first thermoelectric semiconductor member. The first member is made from a material wherein, heat absorption occurs when first carriers comprising either electrons or holes are injected from the first member into the first thermoelectric semiconductor member. The first carriers transported to the hot end of the first thermoelectric semiconductor member are gathered into a light-emitting region. The light-emitting region is made from a semiconductor material. In this light-emitting region, light emission due to recombination between electrons and holes occurs.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: August 22, 2000
    Assignee: Fujitsu Limited
    Inventor: Norio Hidaka
  • Patent number: 6104075
    Abstract: A polysilicon gate layer, a first n.sup.+ diffusion region serving as a drain region, and a second n.sup.+ diffusion region serving as a source region form a MOSFET, and then an operating point of the MOSFET is set into its saturation region by connecting a gate layer and a drain region of the MOSFET. The first and second n.sup.+ diffusion regions provide a first and a second leakage paths, respectively. A temperature sensor can be provided by use of the event that a leakage current flowing through the second leakage path is varied according to a substrate temperature. According to such configuration, scatter of detected temperatures due to scattering in manufacturing process can be reduced even if all scattering parameters in manufacturing process are considered. In addition, an required area of the temperature sensor can be made smaller since a high resistance value is not needed.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: August 15, 2000
    Assignee: Nissan Motor Co., Ltd.
    Inventor: Toshiro Karaki
  • Patent number: 6100110
    Abstract: A thermistor chip is made by first forming first metal layers with a three-layer structure at both end parts of a thermistor block and then forming second metal layers with a three-layer structure on the first metal layers so as to have edge parts that are formed directly in contact with a surface area of the thermistor block and will reduce its normal temperature resistance value. The first and second metal layers are each of a three-layer structure with a lower layer made of a metal with resistance against soldering heat, a middle layer made of a metal with both wettability to solder and resistance against soldering heat, and an upper layer made of a metal having wettability to solder.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: August 8, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masahiko Kawase, Hidenobu Kimoto, Norimitsu Kito, Ikuya Taniguchi
  • Patent number: 6099744
    Abstract: A fabrication technique for a test sample to characterize pyroelectric and erroelectric thin films for use in uncooled infrared focal plane arrays operated at a nominal 60 Hz. Most layers are patterned by a lift off technique, and those layers that are not lifted off are chemically etched or ion milled. The pyroelectric layer is thermally insulated from the substrate by a thick film layer of ZrO.sub.2. The pyroelectric layer is sandwiched between metal layers to form a capacitor. Direct measurement of the voltages between the capacitor plates, and of the temperature of these plates, results in a direct measurement of thin film temperature responsivity.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: August 8, 2000
    Assignee: The United States of Americas as represented by the Secretary of the Army
    Inventors: Donna J. Advena, Conrad W. Terrill
  • Patent number: 6083770
    Abstract: A thermoelectric piece has an increased adhesive strength between a semiconductor matrix of Bi--Sb--Te or Bi--Te--Se and a diffusion barrier layer deposited thereon for blocking diffusion of a soldering material into the semiconductor matrix. An Sn-alloy layer is provided between the semiconductor matrix and the diffusion barrier layer of Mo, W, Nb and Ni to give the enhanced adhesive strength. The Sn-alloy is formed at the interface with the semiconductor matrix by interdiffusion of Sn with at least one element of the semiconductor. It is found that Sn will not lower the thermoelectric characteristics when diffusing into the semiconductor matrix and provides an sufficient adhesive strength to the metal elements of the diffusion barrier layer.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: July 4, 2000
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Takehiko Sato, Kazuo Kamada
  • Patent number: 6036872
    Abstract: A method for fabricating a wafer-pair having at least one recess in one wafer and the recess formed into a chamber with the attaching of the other wafer which has a port plugged with a deposited layer on its external surface. The deposition of the layer may be performed in a very low pressure environment, thus assuring the same kind of environment in the sealed chamber. The chamber may enclose at least one device such as a thermoelectric sensor, bolometer, emitter or other kind of device. The wafer-pair typically will have numerous chambers, with devices, respectively, and may be divided into a multiplicity of chips.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: March 14, 2000
    Assignee: Honeywell Inc.
    Inventors: R. Andrew Wood, Jeffrey A. Ridley, Robert E. Higashi
  • Patent number: 6030709
    Abstract: The invention relates to an electronic component manufactured in thick film technology, thin film technology or silicon technology and then provided with an electrically insulating layer which is covered by an amorphous metal layer. The amorphous metal layer protects the component, even with the smallest of layer thicknesses, from external influences and directly transmits heating and force effects.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: February 29, 2000
    Assignee: Grundfos A/S
    Inventors: Niels Due Jensen, Tina Romedahl Brown, Karsten Dyrbye, Per Ellemose Andersen
  • Patent number: 6020216
    Abstract: Method of stress-aligning a thermally sensitive element may comprise the step of forming a thin film layer of thermally sensitive material (80). The thin film layer of thermally sensitive material (80) may be crystallized. A stress alignment layer (82) may be formed in communication with the thin film layer of thermally sensitive material (80). The thin film layer of thermally sensitive material (80) may be heated above a transition temperature of the thermally sensitive material. The stress alignment layer (82) may be expanded relative to the thin film layer of thermally sensitive material (80). The thin film layer of thermally sensitive material (80) may be cooled below the transition temperature of the thermally sensitive material.
    Type: Grant
    Filed: August 22, 1997
    Date of Patent: February 1, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Howard R. Beratan, Charles M. Hanson
  • Patent number: 5976909
    Abstract: A diamond heat sink is disclosed in this invention. The diamond heat sink has a support layer consisting of substantially undoped vapor phase synthetic diamond, a heat sensitive layer consisting of doped vapor phase synthetic diamond formed on the surface of the support layer; an insulation layer consisting of substantially undoped vapor phase synthetic diamond formed on a predetermined region of the heat sensitive layer; and an electrode formed on the heat sensitive layer. The electrode typically consists of a metal, preferably Ti/Mo/Au or Ti/Pt/Au. The diamond heat sink of the present invention may further include a highly-doped layer for creating Ohmic contacts with the metal electrode, which is made of the vapor phase synthetic diamond having high impurity levels, and which is disposed between the metal electrode and the heat sensitive layer.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: November 2, 1999
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiromu Shiomi, Hideaki Nakahata, Yoshiki Nishibayashi, Shin-ichi Shikata
  • Patent number: 5966590
    Abstract: In a method of manufacturing a thermal-type infrared sensor including a thermosensitive part, a bolometer material is formed as the thermosensitive part and is subjected to post-processing to control a temperature coefficient of resistance in the bolometer material. The bolometer material may be formed by titanium or vanadium.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: October 12, 1999
    Assignees: Director General, Technical Research and Development Institute, Japan Defense Agency, NEC Corporation
    Inventors: Hideo Wada, Mitsuhiro Nagashima, Tokuhito Sasaki, Naoki Oda
  • Patent number: 5956569
    Abstract: The present invention provides a structure and a method of fabricating a thermoelectric Cooler directly on the backside of a semiconductor substrate. The thermoelectric (TE) cooler (thermoelectric cooler) disperses heat from an integrated circuit (IC) that is formed on the front-side of the silicon substrate. Spaced first bonding pad holes 28 are formed in the backside of a substrate that expose bonding pads 24. Second holes 32 are formed between the spaced first bonding pad holes 28. A first insulating layer 34 is formed over the backside of the substrate, but not over the bonding pad 24. A metal layer is formed lining the first bonding pad holes 28. A polysilicon layer 46 is formed over the surface of the backside of the substrate in the second holes. The polysilicon layer is implanted thereby forming alternating adjacent N and P doped sections 46p 46n in the second holes. The adjacent N and P doped polysilicon sections 46n 46p are electrically connected to the bonding pads 24 by the metal layer 38.
    Type: Grant
    Filed: October 24, 1997
    Date of Patent: September 21, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Shou-Yi Shiu, Yu-Ping Fang, Hon-Hung Lui
  • Patent number: 5907763
    Abstract: A method and device to monitor integrated temperature in a heat cycle process is disclosed. A monitor wafer, according to one embodiment, comprises a substrate, typically a silicon wafer, having films of two conductive materials of selected electrical resistances, sequentially deposited thereon. Suitable conductive materials react with each other in the presence of heat to yield a layer of a third, non-conductive or less conductive, material at the interface of the two conductive materials. The thickness of each of the films of the two conductive materials is selected such that the entire thickness is not consumed in the formation of the layer of a third material. Following the heat exposure, electrical resistance of the monitor wafer is determined and compared with the monitor wafer's selected pre-heat electrical resistance. The change in electrical resistance is then correlated to temperature by a thermocouple probe on a set of test wafers having the same blanket metal structure as the monitor wafer.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: May 25, 1999
    Assignee: International Business Machines Corporation
    Inventors: Anthony K. Stamper, Thomas J. Hartswick