Abstract: An Ir—M—O composite film has been provided that is useful in forming an electrode of a ferroelectric capacitor, where M includes a variety of refractory metals. The Ir combination film is resistant to high temperature annealing in oxygen environments. When used with an underlying barrier layer made from the same variety of M transition metals, the resulting conductive barrier also suppresses to diffusion of Ir into any underlying Si substrates. As a result, Ir silicide products are not formed, which degrade the electrode interface characteristics. That is, the Ir combination film remains conductive, not peeling or forming hillocks, during high temperature annealing processes, even in oxygen. The Ir—M—O conductive electrode/barrier structures are useful in nonvolatile FeRAM devices, DRAMs, capacitors, pyroelectric infrared sensors, optical displays, optical switches, piezoelectric transducers, and surface acoustic wave devices.

Abstract: A method of fabricating a local interconnect uses hydrogen plasma or hydrogen thermal treatment to form a local interconnect by transforming a part of the refractory metal oxide to a conductor. The local interconnect can be used to electrically connect two electrodes in a device, or to electrically connect same electrodes of different devices.

Abstract: In a method for manufacturing a capacitor including a lower electrode, a ferroelectric layer formed on the lower electrode, and an upper electrode formed on the ferroelectric layer, at least one of the lower and upper electrodes is made of laminated metal and conductive oxide. The laminated metal and conductive oxide are deposited by a DC magnetron reactive sputtering process using one metal target and mixture gas including oxygen wherein a ratio of oxygen in the mixture gas and a substrate temperature are definite and a DC input power is changed depending on the metal and the conductive oxide.

Abstract: The specification describes source/drain contact material that is compatible with organic semiconductors in thin film transistor integrated circuits. The contact material is nickel/gold wherein the nickel is plated as Ni--P on a base conductor, preferably TiN.sub.x, by electroless plating, and the gold overlay is deposited by displacement plating. It was found, unexpectedly, that forming Ni/Au contacts in this way extends the lifetime of TFT devices substantially.

Abstract: A multilayer ceramic substrate electronic component is provided having high temperature superconductor material circuitry. The high temperature superconductor material is preferably yttrium-barium-copper-oxide and is encased within a noble metal such as silver or gold when forming the surface circuitry or filling of the vias. The noble metal layers preferably have through-openings to enable direct connection of circuitry to the encased superconductor layer. A method is also provided for fabricating such multilayer ceramic substrate electronic components.

Abstract: A conductor film is deposited on a semiconductor substrate via an insulation film, and jogs formed on the surface of the conductor film immediately after the deposition are removed by using the chemical mechanical polishing method, the etch back method, or the like. And on the surface of the conductor film thus flattened, a mask member is formed of an inorganic insulation film such as a SOG film or a silicon oxide film deposited by using the chemical vapor deposition method. By dry etching using this mask member as the etching mask, the above described conductor film is processed to have a pattern of a semiconductor wiring layer or a capacitor electrode. As a result, fine processing of the conductor film having a columnar crystal structure is facilitated. In addition, it becomes possible to improve the precision of the electrode shape of the capacitor and implement a highly reliable capacitor.

Abstract: A method for forming a contact hole in an active matrix substrate, the method comprising steps of: (a) depositing an insulating film covering a first electrode provided on a substrate and the substrate; (b) forming a contact hole by patterning said insulating film by means of dry etching; and (c) forming a second electrode, and contacting the second electrode with the first electrode; wherein in the step (b) after forming a contact hole by dry etching, a surface treatment by plasma etching or reactive ion etching with oxygen gas under a condition in which a pressure P is in a range of 100 Pa to 400 Pa is performed.

Abstract: A process for preparing a semiconductor device using a dielectric thin film includes the steps of forming a first electrode on a base plate; forming a dielectric film on the first electrode, the dielectric film including a Perovskite structure oxide; forming a second electrode on the dielectric film; and annealing the first and second electrodes so that metal components of the first and second electrodes are oxidized and diffused into a crystal system of the dielectric film.

Abstract: The present invention relates to tinoxide thin film, a process for manufacturing thereof comprising the step of depositing tin while providing oxygen or ionized oxygen around a substrate, and relates to a gas detecting sensor prepared by the use of such tinoxide thin film.

Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.

Abstract: A method of fabricating a liquid crystal display device having a substrate includes the steps of forming a gate electrode on the substrate, forming a gate insulating layer on the gate electrode, forming a semiconductor layer on the gate insulating layer, forming source/drain electrodes on the semiconductor layer, forming a pixel electrode on the source/drain electrodes including the gate insulating layer, forming a passivation layer on the pixel electrode including the source/drain electrodes, forming a light shielding layer on the passivation layer, forming an alignment layer on the light shielding layer including the passivation layer, and determining an alignment direction by exposing the alignment layer to a light.

Abstract: A method of thermal processing a supporting structure comprised of various compound semiconductor layers having a Gd free Ga.sub.2 O.sub.3 surface layer including coating the surface layer with a dielectric or a metallic cap layer or combinations thereof, such that the low D.sub.it Ga.sub.2 O.sub.3 -compound semiconductor structure is conserved during thermal processing, e.g. during activation of ion implants of a self aligned metal-oxide-compound semiconductor gate structure. In a preferred embodiment, the semiconductor structure has a surface of GaAs, the Gd free Ga.sub.2 O.sub.3 layer has a thickness in a range of approximately 1 nm to 20 nm, and the insulating or metallic cap layer has a thickness in a range of approximately 1 nm to 500 nm.

Abstract: A semiconductor device comprising a thin film transistor, and a process for fabricating the same, the process comprising: a first step of forming an island-like semiconductor layer, a gate insulating film covering the semiconductor layer, and a gate electrode comprising a material containing aluminum as the principal component formed on the gate insulating film; a second step of introducing impurities into the semiconductor layer in a self-aligned manner by using the gate electrode as the mask; a third step of forming an interlayer dielectric to cover the gate electrode, and forming a contact hole in at least one of source and drain; a fourth step of forming over the entire surface, a film containing aluminum as the principal component, and then forming an anodic oxide film by anodically oxidizing the film containing aluminum as the principal component; a fifth step of etching the film containing aluminum as the principal component and the anodic oxide film, thereby forming a second layer interconnection cont

Abstract: To form a contact layer on source and drain electrodes of a stagger-type TFT, a conductive material is selectively sticked to the surface of the source and drain electrodes and a contact layer is selectively deposited by using the conductive material as growth species to form an active semiconductor layer on the contact layer. For an inverted-stagger-type TFT, a conductive material is selectively deposited on the surface of a contact layer to use the selectively deposited conductive material as source and drain electrodes so that patterning is unnecessary. To selectively deposit a contact layer of a TFT by alternately repeating etching and deposition, the temperature for the etching is set to 200.degree. C. or lower. A contaminated layer on the surface of a semiconductor film serving as an active semiconductor layer and contact layer of a TFT is removed by plasma at the temperature of 200.degree. C. or lower.

Abstract: The present invention relates to semiconductor techniques using high dielectric oxides, more specifically to a thin film forming method for forming a thin film which is suitable as the electrodes of the oxide high dielectrics, a capacitor device using the oxide high dielectrics and a method for fabricating the same, an a semiconductor device using the capacitor device and a method for fabricating the semiconductor device. The capacitor device comprises at least one of a pair of electrodes which is formed of a material containing titanium nitride of (200) orientation. This permits the capacitor device to have good quality even in a case that the capacitor dielectric film is formed of a high dielectric thin film grown in an oxidizing atmosphere. The capacitor device includes the electrodes of titanium nitride film, whereby the electrodes can be patterned by RIE, which much improves processing precision of the electrode patterning, and throughputs.

Abstract: Methods of fabricating a liquid crystal display element on a substrate includes forming a thin film transistor on the substrate, the thin film transistor including a gate electrode covered by a channel region and a gate pad conductively connected to the gate electrode. A pad electrode is formed on the substrate, spaced apart from the gate pad. A portion of the gate pad and a portion of the pad electrode are exposed, and the exposed portion of the gate pad selectively plated to thereby form a conductive barrier layer on the exposed portion of the gate pad. A pixel electrode is then formed contacting the conductive barrier layer and the exposed portion of the pad electrode to thereby connect the gate pad and the pad electrode. Preferably, the selective plating includes electroless plating the exposed portion of the gate pad to thereby form the conductive barrier layer.

Abstract: A process for stably producing a zinc oxide thin film by electrolysis with excellent adhesion to a substrate is described. In particular, a zinc oxide thin film suitably used as a light confining layer of a photoelectric conversion element is formed on a conductive substrate by applying a current between a conductive substrate immersed in an aqueous solution containing at least nitrate ions, zinc ions, and a carbohydrate, and an electrode immersed in the solution.

Abstract: A method of planarizing a non-planar substrate, such as filling vias and contact holes, spreads a suspension of a conducting material suspended in a liquid on a substrate. The suspension includes an organometallic material, preferably with particles of a polymerized tin or indium alkoxide. The material is spread by spinning the substrate after applying the suspension. The carrier liquid and organic groups are removed by baking and curing at elevated temperatures, thereby depositing the conductive material on the substrate in a layer which is more planar than the substrate and which has regions of greater and lesser thickness. A relatively brief etch step removes conductive material from regions of lesser thickness, leaving material filling vias or contact holes.

Abstract: A SRAM cell with cross-coupled transistors, a pair of transfer gate transistors and a pair of load resistors is manufactured by forming a plurality of field effect transistors in a silicon substrate. In one embodiment, the transistors are formed in an SOI substrate to improve soft-error resistance. An insulator layer is deposited over the source, drain and gate contacts (device contact areas), hole openings are etched into the insulating layer to expose a plurality of device contact areas. A highly resistive layer is patterned to substantially cover and in contact with some selected contact hole openings and device contact areas. A conductive material is deposited into all of the contact hole openings so as to substantially over-fill the contact hole openings and make electrical contact with the device contacts and patterned resistive layer.

Abstract: A method of forming a dielectric layer includes, a) chemical vapor depositing a dielectric layer of Ta.sub.2 O.sub.5 atop a substrate; and b) providing a predominately amorphous diffusion barrier layer over the Ta.sub.2 O.sub.5 dielectric layer. A method of forming a capacitor includes, a) providing a node to which electrical connection to a capacitor is to be made; b) providing a first electrically conductive capacitor plate over the node; c) chemical vapor depositing a capacitor dielectric layer of Ta.sub.2 O.sub.5 over the first electrically conductive capacitor plate; and d) providing a predominately amorphous diffusion barrier layer over the Ta.sub.2 O.sub.5 dielectric layer. A capacitor construction is also disclosed. The preferred amorphous diffusion barrier layer is electrically conductive and constitutes a metal organic chemical vapor deposited TiC.sub.x N.sub.y O.sub.z, where "x" is in the range of from 0.01 to 0.5, and "y" is in the range of from 0.99 to 0.5, and "z" is in the range of from 0 to 0.

Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. ruthenium dioxide 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive film can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.