Abstract: Disclosed herein is a method of manufacturing a gate insulator and a thin film transistor (“TFT”) incorporating the gate insulator, including forming an oxygen-containing, conductive gate on a substrate; forming a gate insulator material layer on the substrate so as to cover the gate; and applying a heat treatment so as to diffuse oxygen from the oxygen-containing gate layer into the gate insulating material layer thereby forming the gate insulator.

Abstract: Methods for sputter depositing a transparent conductive oxide (TCO) layer are provided in the present invention. The transparent conductive oxide layer may be utilized as a back reflector in a photovoltaic device. In one embodiment, the method includes providing a substrate in a processing chamber, forming a first portion of a transparent conductive oxide layer on the substrate by a first sputter deposition step, and forming a second portion of the transparent conductive oxide layer by a second sputter deposition step.

Abstract: Systems, devices, structures, and methods are described that inhibit dielectric degradation at high temperatures. An enhanced capacitor is discussed. The enhanced capacitor includes a first electrode, a dielectric that includes ditantalum pentaoxide, and a second electrode having a compound. The compound includes a first substance and a second substance. The second electrode includes a trace amount of the first substance. The morphology of the semiconductor structure remains stable when the trace amount of the first substance is oxidized during crystallization of the dielectric. In one embodiment, the crystalline structure of the dielectric describes substantially a (001) lattice plane.

Abstract: The process according to the invention makes it possible to deposit a transparent conductive oxide film on a toughened glass substrate placed inside a chamber. It consists in providing sources containing an oxygen-based liquid compound, a liquid compound of the metal intended to form the oxide, and a dopant in gaseous or liquid form, respectively; establishing a temperature between 130 and 300° C. and a pressure between 0.01 and 2 mbar in the chamber; and then bringing said sources into communication with the chamber, which has the effect of vaporizing the liquids at their surface, of drawing them up into the chamber without having to use a carrier gas, and of making them react therein with the dopant so that the oxide layer is formed on the substrate.

Abstract: A method of fabricating a semiconductor device according to an embodiment includes: forming a precursor film containing therein a predetermined metallic element on a surface of a recess portion formed in an insulating film on a semiconductor substrate; forming a wiring formation film on the precursor film; performing a heat treatment in an oxidation ambient atmosphere to cause the precursor film and the insulating film to react with each other, thereby forming a self-formed barrier film containing a compound, containing therein the predetermined metallic element and a constituent element of the insulating film, as a basic constituent in a boundary surface between the precursor film and the insulating film, and moving the predetermined metallic element unreacted into the wiring formation film through diffusion to cause the predetermined metallic element unreacted to react with oxygen contained in the oxidation ambient atmosphere on a surface of the wiring formation film, thereby precipitating an unreacted meta

Abstract: In the method of fabricating a metal-insulator-metal (MIM) device, a first electrode of ?-Ta is provided. The Ta of the first electrode is oxidized to form a Ta2O5 layer on the first electrode. A second electrode of ?-Ta is provided on the Ta2O5 layer. Such a device exhibits strong data retention, along with resistance to performance degradation under high temperatures.

Abstract: A method of making a patterned metal oxide film includes jetting a sol-gel solution on a substrate. The sol-gel solution is dried to form a gel layer on the substrate. Portions of the gel layer are irradiated to pattern the gel layer and to form exposed portions. Irradiation causes the exposed portions of the gel layer to become at least one of substantially condensed to an oxide, substantially densified, substantially cured, and combinations thereof. The unexposed portions of the gel layer are removed, thereby forming the patterned metal oxide film.

Abstract: A method of fabricating a germanium infrared sensor for a CMOS imager includes preparation of a donor wafer, including: ion implantation into a silicon wafer to form a P+ silicon layer; growing an epitaxial germanium layer on the P+silicon layer, forming a silicon-germanium interface; cyclic annealing; and implanting hydrogen ions to a depth at least as deep as the P+ silicon layer to form a defect layer; preparing a handling wafer, including: fabricating a CMOS integrated circuit on a silicon substrate; depositing a layer of refractory metal; treating the surfaces of the donor wafer and the handling wafer for bonding; bonding the handling wafer and the donor wafer to form a bonded structure; splitting the bonded structure along the defect layer; depositing a layer of indium tin oxide on the germanium layer; completing the IR sensor.

Abstract: In a semiconductor light-emitting device, a buffer layer, a un-doped GaN layer, a high carrier concentration n+-layer, an n-type layer, an emission layer, a p-type layer, and a p-type contact layer are deposited in sequence on a sapphire substrate. The semiconductor light-emitting device includes a light-transparent electrode made of indium tin oxide (ITO) which is deposited in the low pressure vacuum chamber flowing at least oxygen gas through electron beam deposition or ion plating treatment, and a thermal process is carried out.

Abstract: First, a conductive material of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed by depositing nitride silicon in the range of more than 300° C. for 5 minutes, and a semiconductor layer and an ohmic contact layer are sequentially formed. Next, a conductor layer of a metal such as Cr is deposited and patterned to form a data wire include a data line intersecting the gate line, a source electrode, a drain electrode and a data pad. Then, a passivation layer is deposited and patterned to form contact holes exposing the drain electrode, the gate pad and the data pad. Next, indium zinc oxide is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad respectively connected to the drain electrode, the gate pad and the data pad.

Abstract: According to this invention, a semiconductor device has an upper surface on which an external connection electrode is formed and a lower surface which opposes the upper surface and is in a mirror surface state. A roughened region roughened by laser marking is formed at part of the lower surface. The roughened region includes a product information mark of the semiconductor device itself. The product information mark is printed by laser marking. The number, size, shape, and layout position of the roughened regions are decided to make it possible to, when the lower surface is irradiated with light, read the product information from the difference in light reflectance between the roughened region and mirror-finished region.

Abstract: Provided is a method forming a desired pattern of electronically functional material 3 on a substrate 1. The method comprises the steps of: creating a first layer of patterning material 2 on the substrate whilst leaving areas of the substrate exposed to define said desired pattern; printing a suspension comprising particles of the electronically functional material 3 in a liquid dispersant, to which the patterning material is impervious, on the patterning material and the exposed substrate; removing at least some of the liquid dispersant from the suspension to consolidate the particles; and applying a first solvent to said consolidated particles which is capable of solubilizing the patterning material 2 and to which the consolidated particles are pervious so that the patterning material is removed from the substrate 1 together with any overlying electronically functional material 3.

Abstract: The present invention provides a method of forming a thin film containing a metal oxide as the main component, the film thickness of which is relatively uniform, at a high film deposition rate over a wide area and over a long time. The present invention is a method for forming a thin film containing a metal oxide as the main component on a substrate using a mixed gas stream containing a metal chloride, an oxidizing material, and hydrogen chloride, by a thermal decomposition method at a film deposition rate of 4500 nm/min. or greater, performing at least one selected from: 1) prior to mixing the metal chloride and the oxidizing material in the mixed gas stream, contacting hydrogen chloride with at least one selected from the metal chloride and the oxidizing material, and 2) forming a buffer layer in advance on a surface of the substrate on which the thin film containing a metal oxide as the main component is to be formed.

Abstract: The invention provides a substrate for an electronic device including a conductive oxide layer which is formed by epitaxial growth with cubic crystal (100) orientation or pseudo-cubic crystal (100) orientation and which contains a metal oxide having a perovskite structure, a method for manufacturing a substrate for an electronic device, and an electronic device provided with such a substrate for an electronic device. A substrate for an electronic device includes a Si substrate, a buffer layer which is formed by epitaxial growth on the Si substrate and which contains a metal oxide having a NaCl structure, and a conductive oxide layer which is formed by epitaxial growth with cubic crystal (100) orientation or pseudo-cubic crystal (100) orientation on the buffer layer and which contains a metal oxide having a perovskite structure. The Si substrate is preferably a (100) substrate or a (110) substrate from which a natural oxidation film is not removed.

Abstract: A fabrication method for an alignment film is proposed. A film is deposited on a substrate by an atmosphere plasma in a predetermined direction at a predetermined angle, while moving the substrate and the atmosphere plasma relative to each other. Thereby, a uniform isotropic alignment film with strong anchoring energy is formed and the pre-tilt angle can be designed according to the need. Problems such as static charge and dust generated during a conventional rubbing process are prevented. In addition, since the above fabrication method eliminates the need of vacuum devices that are required in conventional ion beam alignment and plasma beam alignment processes, the fabrication method can be used to fabricate large sized alignment film. Moreover, fabrication cost is lowered through the use of the fabrication method.

Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.

Abstract: Provided are a nitride-based light emitting device using a p-type conductive transparent thin film electrode layer and a method of manufacturing the same. The nitride-based light emitting device includes a substrate, and an n-cladding layer, an active layer, a p-cladding layer and an ohmic contact layer sequentially formed on the substrate. The ohmic contact layer is made from a p-type conductive transparent oxide thin film. The nitride-based light emitting device and method of manufacturing the same provide excellent I-V characteristics by improving characteristics of an ohmic contact to a p-cladding layer while enhancing light emission efficiency of the device due to high light transmittance exhibited by a transparent electrode.

Abstract: Although an Ag—CdO-based material has excellent electric properties such as deposition resistance, arc resistance and low contact resistance, which are required for an electric contact, the discharge standard provision in Japan, EC Directive on Waste from Electrical and Electronic Equipment (WEEE) and the like have been directed toward disuse of Cd, as already known. Thus, the present invention is characterized in that after an atmosphere in a pressured oxidation furnace is replaced with oxygen, the temperature of an internal-oxidative Ag alloy prepared under a condition of a cold roll rate of 50 to 95% is gradually raised from a temperature of 200° C. or less in a pressured oxygen atmosphere with an oxygen pressure of 5 to 50 kg/cm2 and internal oxidation processing is performed with an upper limit temperature of 700° C.

Abstract: The present invention is an electronic interconnect comprising a bond pad consisting essentially of aluminum and copper and configured for use in semiconductor electronic devices to couple a bond wire to an integrated circuit package. The bond pad has an oxide coating residing on at least a topmost surface of the bond pad. The oxide coating consists essentially of aluminum, copper, and oxygen. Therefore, the bond pad has little, if any, naturally occurring corrosion products such as hydrated aluminum hydroxide (Al(OH)3) and/or Al2Cu particles. Al(OH)3 films and Al2Cu particles have been shown to form on aluminum copper bond pads, preventing effective wire-bonding.

Abstract: An array substrate for use in an X-ray sensing device is fabricated using an etching stopper that enables good control of the etching process and that prevents over-etch of drain electrodes and second capacitor electrodes while forming contact holes and a cutting furrow. The etching stopper is located in a tiling portion that is utilized for tiling substrates to form a large-sized X-ray detector. During fabrication, gate lines can have gate-protruded portions located near the etching stopper, and the etching stopper can have stopper-protruded portions near the gate lines. The stopper-protruded portions electrically connect to the gate-protruded portions through gate line contact holes such that the etching stopper and the gate lines have equipotentials. This can reduce static electricity damage.

Abstract: A method for producing quantum dots. The method includes cleaning an oxide substrate and separately cleaning a metal source. The substrate is then heated and exposed to the source in an oxygen environment. This causes metal oxide quantum dots to form on the surface of the substrate.

Abstract: A method for producing a III-V group compound semiconductor layer comprises the steps of: forming a first III-V group compound semiconductor layer on a substrate in a reaction chamber; and supplying a III group material gas to the reaction chamber before or after the step of forming the first III-V group compound semiconductor layer to prevent re-evaporation of the III group gas in the reaction chamber.

Abstract: A method of making an electronic device in which a conductive electrode has been formed over a substrate including using a liquid to clean the conductive electrode, heating in a processing station the conductive electrode to a temperature which dries the conductive electrode and thereby removes residual cleaning liquid applied during the cleaning step, and providing an oxidizing plasma in the processing station to modify the properties of the conductive electrode. The method also includes producing a fluorocarbon plasma in the processing station to form a fluorocarbon layer over the modified conductive electrode, and further processing the structure to produce the electronic device.

Abstract: In a method for producing ITO layers on substrates, especially for the production of organic light-emitting diodes, part of the ITO layer thickness is applied first by sputter-deposition, at a controlled temperature profile, in such manner that the formation of crystallization nuclei is prevented; subsequently, the partially coated substrate is heated to a temperature above the recrystallization temperature of the ITO layer, and then the rest of the ITO layer is sputter-deposited.

Abstract: A SnO2 ISFET device and manufacturing method thereof. The present invention prepares SnO2 as the detection membrane of an ISFET by sol-gel technology to obtain a SnO2 ISFET. The present invention also measures the current-voltage curve for different pH and temperatures by a current measuring system. The temperature parameter of the SnO2 ISFET is calculated according to the relationship between the current-voltage curve and temperature. In addition, the drift rate of the SnO2 ISFET for different pH and hysteresis width of the SnO2 ISFET for different pH loop are calculated by a constant voltage/current circuit and a voltage-time recorder to measure the gate voltage of the SnO2 ISFET.

Abstract: Large, light-weight organic devices and methods of preparing large, light-weight organic devices. Specifically, flexible and rigid light-weight plastics are implemented. The flexible plastic may be disposed from a reel. A metal grid is fabricated on the flexible plastic to provide current conduction over the large area. A transparent oxide layer is provided over the metal grid to form the bottom electrode of the organic device. A light emitting or light gathering organic layer is disposed on the transparent oxide layer. A second electrode is disposed over the organic layer. Electrodes are coupled to the metal grid and the second electrode to provide electrical current to or from the organic layer. Depending on the type of materials used for the organic layer, the organic device may comprise an area light device or a photovoltaic device.

Abstract: The present invention provides a method for improving the adhesion capability between the ?-type bus electrode and ITO (indium tin oxide) transparent conductive layer. The method includes an ITO transparent conductive layer as an ITO electrode is formed on the glass substrate by sputtering method. Then, a photoresist layer with a cavity pattern is formed on the portion of the ITO transparent conductive film. Next, an etching process is used to remove portion of the ITO transparent conductive film to form a cavity within the ITO transparent conductive film. Then, after removing the photoresist layer, a silver paste as a bus electrode is formed on the glass substrate and on the ITO transparent conductor film to form a pi (?) type bus electrode by print method.

Abstract: The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of a niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.

Abstract: The specification describes a contact printing technique for forming patterns of thin films with nanometer resolution over large areas. The procedure, termed here “nanotransfer printing (nTP)”, relies on tailored surface chemistries for transferring thin films, typically metal films, from the raised regions of a stamp to a substrate when these two elements are brought into intimate physical contact. This technique is purely additive, it is fast (<15 s contact times), and the printing occurs in a single processing step at room temperature in open air. nTP is capable of producing patterns with a wide range of features with sizes down to ˜100 nm, and edge resolution better than 25 nm. Electrical contacts and interconnects have been fabricated for high performance organic thin film transistors (TFTs) and complementary inverter circuits, to demonstrate one of the many potential applications for nTP.

Abstract: A display unit capable of inhibiting moisture and gas from penetrating into a liquid crystal layer and an alignment layer also after formation of a display electrode and suppressing decomposition of a material forming the display electrode is obtained. In this display unit, an impurity-introduced layer containing an impurity element having high electronegativity is formed on the surface of an insulator film and the surface of the display electrode after formation of the display electrode. Thus, the insulator film and the display electrode are improved in effects of preventing transmission of moisture and gas also after formation of the display electrode. The impurity-introduced layer formed on the surface of the display electrode stabilizes the surface of an ITO film forming the display electrode, thereby suppressing decomposition of the ITO film.

Abstract: Disclosed are a liquid crystal display device and a method for manufacturing the same, in which wirings connected between pads and an integrated circuit is protected from being corroded. A pixel array is formed on a display region of a substrate. A plurality of pads are formed on a non-display region of the substrate. An integrated circuit is formed on the non-display region of the substrate and connected to the pads to generate a signal for operating the pixel array. Conductive barrier layers separated from each of the pads are formed on peripheral portions of the pads connected to the integrated circuit. The conductive barrier layers have electric potential equivalent to that of each of the pads in accordance with internal connections of the integrated circuit. When bumps of the integrated circuit and the pads are attached to each other, the conductive barrier layers prevent the pads and the wirings connected to the pads from being corroded.

Abstract: An embodiment of the instant invention is a method of forming a electrically conductive structure insulatively disposed from a second structure, the method comprising: providing the second structure; forming the electrically conductive structure of a material (step 118 of FIG. 1) that remains substantially conductive after it is oxidized; forming an electrically insulative layer (step 116 of FIG. 1) between the second structure and the conductive structure; and oxidizing the conductive structure by subjecting it to an ozone containing atmosphere for a duration of time and at a first temperature.

Abstract: Interconnection structures for integrated circuits have first cells disposed in a first plane, at least second cells disposed in at least a second plane parallel to the first plane, and vertical interconnections disposed for connecting conductors in the first plane with conductors in the second plane, at least some of the vertical interconnections initially incorporating antifuses. The antifuses may be disposed over conductors that are disposed on a base substrate. The antifuses are selectively fused to prepare the integrated circuit for normal operation. Methods for fabricating and using such vertical interconnection structures are disclosed.

Abstract: A method of increasing the conductivity of a transparent conductive layer, in which a photoresist layer which patterns the transparent layer is given tapered edges and is partially etched. The partial etching exposing the edge regions of the underlying transparent conductor layer, which are the selectively plated. This method has a single patterning stage of the transparent layer, but uses partial etching of a tapered resist layer in order to expose a small edge region of the transparent layer for coating with a conductive layer (which can be opaque).

Abstract: A ferroelectric or electret memory circuit, particularly a ferroelectric or electret memory circuit with improved fatigue resistance, including a ferroelectric or electret memory cell with a polymer or oligomer memory material contacting first and second electrodes, at least one of the electrodes is comprised of at least one functional material capable of physical and/or chemical bulk incorporation of atomic or molecular species contained in either the electrode or the memory material and displaying a propensity for migrating in the form of mobile charged and/or neutral particles between an electrode and a memory material, something which can be detrimental to both. A functional material with the above-mentioned properties shall serve to offset any adverse effect of a migration of this kind, leading to an improvement in the fatigue resistance of the memory cell.

Abstract: A method of forming a copper structure, comprising the following steps. A substrate is provided. A patterned dielectric layer is formed over the substrate with the patterned dielectric layer having an opening exposing a portion of the substrate. The opening having exposed sidewalls. A Sn layer is formed directly upon the exposed sidewalls of the opening. A copper seed layer is formed upon the Sn layer within the opening. A bulk copper layer is formed over the copper seed layer, filling the opening. The structure is thermally annealed whereby Sn diffuses from the Sn layer into the copper seed layer and the bulk copper layer forming CuSn alloy within the copper seed layer and the bulk copper layer.

Abstract: A light emitting-layer is provided on a substrate. A p-type semiconductor layer is provided on the light-emitting layer. An upper electrode is provided on the p-type semiconductor layer. The upper electrode includes an Au thin film coming into contact with the p-type semiconductor layer and an n-type transparent conductor film formed thereon. The n-type transparent conductor film is formed by laser ablation. Particularly, the method involves placing a substrate in a vacuum chamber, placing a target of the film material in the chamber, introducing oxygen into the chamber, laser-irradiating the target to emit atoms or molecular ions by ablation, and then depositing and oxidizing the atoms or ions to grow the transparent conductor film.

Abstract: The present invention concerns a hybrid optical element including at least one optical element (2) attached to one surface of a substrate (1), a semiconductor laser (3) and a photodetector (4) attached to the other surface of the substrate (1) and an intermediate member (relay substrate) (5) interposed between the substrate (1) and the photodetector (4). The intermediate member (5) has a through hole (6) through which a light flux incident on the photodetector (4) is allowed to pass and a part with a conductivity by which a terminals of the photodetector (4) are connected to a conductor pattern on the substrate (1).

Abstract: The present invention provides a method for improving the adhesion capability between the &pgr;-type bus electrode and ITO (indium tin oxide) transparent conductive layer. The method includes an ITO transparent conductive layer as an ITO electrode is formed on the glass substrate by sputtering method. Then, a photoresist layer with a cavity pattern is formed on the portion of the ITO transparent conductive film. Next, an etching process is used to remove portion of the ITO transparent conductive film to form a cavity within the ITO transparent conductive film. Then, after removing the photoresist layer, a silver paste as a bus electrode is formed on the glass substrate and on the ITO transparent conductor film to form a pi (&pgr;) type bus electrode by print method.

Abstract: The present invention provides a method for producing a crystalline metal oxide thin film by first depositing a substantially amorphous metal oxide film, and thereafter, as a post treatment, exposing the film to low temperature plasma in a high frequency electric field at 180° C. or less, and the crystalline metal oxide thin film produced by this method. Because the producing method according to the present invention allows a dense and homogenous crystalline metal oxide thin film to be formed onto a substrate at a low temperature without requiring active heat treatment, a metal oxide thin film having desirable characteristics can be formed without damaging the characteristics of a substrate even if the substrate has comparatively low heat resistance.

Abstract: A method is provided to deposit niobium monoxide gates. An elemental metal target, or a composite niobium monoxide target is provided within a sputtering chamber. A substrate with gate dielectric, for example silicon dioxide or a high-k gate dielectric, is provided in the sputtering chamber. The sputtering power and oxygen partial pressure within the chamber is set to deposit a film comprising niobium monoxide, without excess amounts of elemental niobium, NbO2 insulator, or Nb2O5 insulator. The deposition method may be incorporated into a standard CMOS fabrication process, or a replacement gate CMOS process.

Abstract: The invention relates to the deposition of transparent conducting thin films, such as transparent conducting oxides (TCO) such as tin doped indium oxide (ITO) and aluminum doped zinc oxide (AZO) on flexible substrates by pulsed laser deposition. The coated substrates are used to construct low cost, lightweight, flexible displays based on organic light emitting diodes (OLEDs).

Abstract: A method of silver (Ag) electroless plating on an indium tin oxide (ITO) electrode comprises preparing a substrate on which the indium tin oxide (ITO) electrode is formed, depositing tin (Sn) on the indium tin oxide (ITO) electrode, depositing silver (Ag) on the indium tin oxide (ITO) electrode by dipping the indium tin oxide (ITO) electrode into an activation solution and plating silver (Ag) on the indium tin oxide (ITO) electrode by dipping the indium tin oxide (ITO) electrode into an electroless plating solution containing magnesium ions and silver ions.

Abstract: A method of depositing indium oxide or indium tin oxide thin film on a polymer substrate is disclosed. In the method, oxygen or argon ion beam is radiated on a polymer substrate by a constant accelerating energy in a vacuum state to modify the surface of the polymer substrate, on which an IO thin film or an ITO thin film is deposited while oxygen ion beam, argon ion beam or their mixture ion beam is being radiated in a vacuum state. In addition, ion beam is generated from a cold cathode ion source by using argon, oxygen or their mixture gas and sputtered at a target substance composed of In2O3 or In2O3 and SnO2, thereby an IO or an ITO thin film can be deposited on the surface-modified polymer substrate.

Abstract: An OLED device having pillars with cross section that is wider on the top. The pillars structure a conductive layer during deposition into distinct portions located between the pillars and on the top of the pillars. In one embodiment, the grooves between the pillars extend outside the electrode region to prevent shorting of adjacent electrodes.

Abstract: Disclosed are a liquid crystal display device and a method for manufacturing the same, in which wirings connected between pads and an integrated circuit is protected from being corroded. A pixel array is formed on a display region of a substrate. A plurality of pads are formed on a non-display region of the substrate. An integrated circuit is formed on the non-display region of the substrate and connected to the pads to generate a signal for operating the pixel array. Conductive barrier layers separated from each of the pads are formed on peripheral portions of the pads connected to the integrated circuit. The conductive barrier layers have electric potential equivalent to that of each of the pads in accordance with internal connections of the integrated circuit. When bumps of the integrated circuit and the pads are attached to each other, the conductive barrier layers prevent the pads and the wirings connected to the pads from being corroded.

Abstract: An improved electrode for a p-type gallium nitride based semiconductor material is disclosed that includes a layer of an oxidized metal and a first and a second layer of a metallic material. The electrode is formed by depositing three or more metallic layers over the p-type semiconductor layer such that at least one metallic layer is in contact with the p-type semiconductor layer. At least two of the metallic layers are then subjected to an annealing treatment in the presence of oxygen to oxidize at least one of the metallic layers to form a metal oxide. The electrodes provide good ohmic contacts to p-type gallium nitride-based semiconductor materials and, thus, lower the operating voltage of gallium nitride-based semiconductor devices.

Abstract: A transistor is provided, which is entirely and partially transparent by the use of a transparent channel layer made of zinc oxide or the like. A channel layer 11 formed of a transparent semiconductor such as zinc oxide ZnO. A transparent electrode is used for all of a source 12, a drain 13 and a gate 14, or a part of them. As the transparent electrode, a transparent conductive material such as conductive ZnO doped with, for example, group III elements is used. As a gate insulating layer 15, a transparent insulative material such as insulative ZnO doped with elements capable of taking a valence of one as a valence number or group V elements is used. If a substrate 16 must be transparent, for example, glass, sapphire, plastic or the like can be used as a transparent material.

Abstract: A method of conductive copper lines in a semiconductor device is provided. A dielectric structure having a surface with recessed features formed therein is provided. A ruthenium oxide layer is deposited over the surface of the dielectric structure. A ruthenium oxide and metallic ruthenium bilayer is formed from the ruthenium oxide layer. Copper conductive lines are formed in the recessed features.

Abstract: A method of fabricating a ferroelectric capacitor is disclosed. The method comprises the decreases a reduction in a bottom electrode material during formation of the ferroelectric dielectric portion of the capacitor. In the above manner, a fatigue resistance of the ferroelectric capacitor is increased substantially.