Charge Transfer Device (e.g., Ccd, Etc.) Patents (Class 438/60)
  • Patent number: 8399914
    Abstract: A solid-state imaging device includes a photoelectric conversion unit that includes a first region of a first conductivity type and a second region of a second conductivity type between which a pn junction is formed, the first region and the second region being formed in a signal-readout surface of a semiconductor substrate, the second region being located at a position deeper than the first region; and a transfer transistor configured to transfer signal charges accumulated in the photoelectric conversion unit to a readout drain through a channel region that lies under a surface of the first region and horizontally adjacent to the photoelectric conversion unit, the transfer transistor being formed in the signal-readout surface. The transfer transistor includes a transfer gate electrode that extends from above the channel region with a gate insulating film therebetween to above the first region so as to extend across a step.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: March 19, 2013
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8395194
    Abstract: A solid-state imaging device according to the present invention is of a MOS type and includes a plurality of pixels arranged in rows and columns, and includes: a semiconductor substrate; a photodiode which is formed in the semiconductor substrate and converts, into a signal charge, light that is incident from a first main surface of the semiconductor substrate; a transfer transistor which is formed in a second main surface of the semiconductor substrate and transfers the signal charge converted by the photodiode; a light shielding film which is conductive and formed on a boundary between the pixels, above the first main surface of the semiconductor substrate; an overflow drain region electrically connected to the light shielding film and formed in the first main surface of the semiconductor substrate; and an overflow barrier region formed between the overflow drain region and the photodiode.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Haruhisa Yokoyama, Hiroshi Sakoh, Kazuhiro Yamashita, Mitsuo Yasuhira, Yuichi Hirofuji
  • Publication number: 20130049075
    Abstract: A solid-state imaging device having a protective wiring inserted between adjacent pixel pairs so that the generation of electrical charges caused by a voltage variation in adjacent pixel pairs may be restrained, and a method for manufacturing the same. A solid-state imaging device with an additional protective wiring may be provided between pixel pairs to restrain the generation of electric charges within one of the pixel pairs caused by a voltage variation in the other pixel pair. A method for manufacturing a solid-state imaging device with an additional protective wiring which is provided between pixel pairs to restrain the generation of electric charges within one of the pixel pairs caused by a voltage variation in the other pixel pair.
    Type: Application
    Filed: July 10, 2012
    Publication date: February 28, 2013
    Applicant: Dongbu HiTek Co., Ltd.
    Inventor: An Do KI
  • Patent number: 8383444
    Abstract: A method is provided for determining a color using a CMOS image sensor. The CMOS image sensor includes an n-type substrate and a p-type epitaxy layer overlying the n-type substrate. The method includes applying a first voltage on the n-type substrate and obtaining a first output, which is associated with the first voltage. The method further includes applying a second voltage on the n-type substrate and obtaining a second output, which is associated with the second voltage. The method additionally includes applying a third voltage on the n-type substrate and obtaining a third output, which is associated with the third voltage. The method also includes providing a plurality of weighting factors and determining the color based on the plurality of weighting factors, the first output, the second output, and the third output.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: February 26, 2013
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Hong Zhu, Jim Yang
  • Patent number: 8384173
    Abstract: A solid-state imaging device includes a light receiving unit formed in a semiconductor base and configured to perform photoelectric conversion; an insulating layer disposed on the semiconductor base; a film constituting a cladding of a waveguide together with the insulating layer and being formed in an outer part of an interior of a hole by coating, the hole being formed in the insulating layer above the light receiving unit; a core of the waveguide, the core being composed of a material having a higher refractive index than a material for the insulating layer and a material for the film formed by coating, the core being formed in an inner part of the interior of the hole; and an inner lens integrated with the waveguide, the inner lens having a lens surface formed at the bottom of the hole at the interface between the film formed by coating and the core.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: February 26, 2013
    Assignee: Sony Corporation
    Inventor: Hiroyasu Matsugai
  • Patent number: 8384133
    Abstract: In a solid state imaging device, and a method of manufacture thereof, the efficiency of the transfer of available photons to the photo-receiving elements is increased beyond that which is currently available. Enhanced anti-reflection layer configurations, and methods of manufacture thereof, are provided that allow for such increased efficiency. They are applicable to contemporary imaging devices, such as charge-coupled devices (CCDs) and CMOS image sensors (CISs). In one embodiment, a photosensitive device is formed in a semiconductor substrate. The photosensitive device includes a photosensitive region. An anti-reflection layer comprising silicon oxynitride is formed on the photosensitive region. The silicon oxynitride layer is heat treated to increase a refractive index of the silicon oxynitride layer, and to thereby decrease reflectivity of incident light at the junction of the photosensitive region.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: February 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chang Rok Moon
  • Patent number: 8383443
    Abstract: A non-uniform gate dielectric charge for pixel sensor cells, e.g., CMOS optical imagers, and methods of manufacturing are provided. The method includes forming a gate dielectric on a substrate. The substrate includes a source/drain region and a photo cell collector region. The method further includes forming a non-uniform fixed charge distribution in the gate dielectric. The method further includes forming a gate structure on the gate dielectric.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Andres Bryant, William F. Clark, Jr., John J. Ellis-Monaghan, Edward J. Nowak
  • Patent number: 8383448
    Abstract: A method of fabricating an MOS device is provided. First, gates and source/drain regions of transistors are formed on a substrate. A photodiode doped region and a floating node doped region are formed in the substrate. Thereafter, a spacer stacked layer including a bottom layer, an inter-layer and a top layer is formed to cover each gate of the transistors. Afterwards, a first mask layer having an opening exposing at least the photodiode doped region is formed on the substrate, and then the top layer exposed by the opening is removed. Next, the first mask layer is removed, and then a second mask layer is formed on a region correspondingly exposed by the opening. A portion of the top layer and the inter-layer exposed by the second mask layer is removed to form spacers on sidewalls of the gates.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: February 26, 2013
    Assignee: United Microelectronics Corp.
    Inventor: Ching-Hung Kao
  • Patent number: 8378402
    Abstract: An image sensor having a backside illumination structure can include a photo diode unit in a first wafer, where the photo diode unit includes photo diodes and transfer gate transistors coupled to respective ones of the photo diodes. A wiring line unit can be included on a second wafer that is bonded to the photo diode unit, where the wiring line unit includes wiring lines and transistors configured to process signals provided by the photo diode unit and configured to control the photo diode unit. A supporting substrate is bonded to the wiring line unit and a filter unit is located under the first wafer.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: February 19, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Rok Moon, Duck-hyung Lee, Seong-ho Cho
  • Patent number: 8368143
    Abstract: A method of forming a strained, semiconductor-on-insulator substrate includes forming a second semiconductor layer on a first semiconductor substrate. The second semiconductor is lattice matched to the first semiconductor substrate such that the second semiconductor layer is subjected to a first directional stress. An active device semiconductor layer is formed over the second semiconductor layer such that the active device semiconductor layer is initially in a relaxed state. One or more trench isolation structures are formed through the active device layer and through the second semiconductor layer so as to relax the second semiconductor layer below the active device layer and impart a second directional stress on the active device layer opposite the first directional stress.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: February 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Pranita Kulkarni
  • Patent number: 8361898
    Abstract: A bonding pad structure for an optoelectronic device. The bonding pad structure includes a carrier substrate having a bonding pad region and an optoelectronic device region. An insulating layer is disposed on the carrier substrate, having an opening corresponding to the bonding pad region. A bonding pad is embedded in the insulating layer under the opening to expose the top surface thereof. A device substrate is disposed on the insulating layer corresponding to the optoelectronic device region. A cap layer covers the device substrate and the insulating layer excluding the opening. A conductive buffer layer is disposed in the opening to directly contact the bonding pad. The invention also discloses a method for fabricating the same.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: January 29, 2013
    Assignee: VisEra Technologies Company Limited
    Inventors: Kai-Chih Wang, Fang-Chang Liu
  • Patent number: 8361824
    Abstract: A lens forming method according to the present invention for forming lenses capable of focusing light on a plurality of respective photoelectric conversion sections constituting of a semiconductor apparatus is described. The method includes a lens forming step of processing a lens forming material, in which an average gradient of a ? curve indicating a residual film thickness with respect to the amount of irradiation light is between ?15 and ?0.8 nm·cm2/mJ within the range of a residual film ratio of 10 to 50% or within the range of the amount of irradiation light of 55 to 137 mJ/cm2 into a lens surface shape, using a photomask with an optical transmittance that is varied according to a lens surface shape, as an exposure mask.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: January 29, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Junichi Nakai
  • Patent number: 8354292
    Abstract: In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: January 15, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Je Park, Young-Hoon Park, Ui-Sik Kim, Dae-Cheol Seong, Yeo-Ju Yoon, Bo-Bae Kang
  • Patent number: 8354291
    Abstract: Techniques, apparatus and systems are described for wafer-scale processing of aligned nanotube devices and integrated circuits. In one aspect, a method can include growing aligned nanotubes on at least one of a wafer-scale quartz substrate or a wafer-scale sapphire substrate. The method can include transferring the grown aligned nanotubes onto a target substrate. Also, the method can include fabricating at least one device based on the transferred nanotubes.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: January 15, 2013
    Assignee: University of Southern California
    Inventors: Chongwu Zhou, Koungmin Ryu, Alexander Badmaev, Chuan Wang
  • Patent number: 8343794
    Abstract: A method is provided for producing a hybrid multi junction photovoltaic device. The method begins by providing a plurality of planar photovoltaic semi-transparent modules. Each of the modules is a fully functional, thin-film, photovoltaic device and includes first and second conductive layers and at least first and second semiconductor layers disposed between the conductive layers. The first and second semiconductor layers define a junction at an interface therebetween. The method continues by disposing the modules one on top of another and hybridly adhering them to each other. At least one of the modules is configured to convert a first spectral portion of optical energy into an electrical voltage and transmit a second spectral portion of optical energy to another of the junctions that is configured to convert at least part of the second spectral portion of optical energy into an electrical voltage.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: January 1, 2013
    Assignee: Sunlight Photonics Inc.
    Inventors: Sergey Frolov, Michael Cyrus
  • Patent number: 8329499
    Abstract: A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: December 11, 2012
    Assignee: Truesense Imaging, Inc.
    Inventors: Edmund K. Banghart, Eric G. Stevens, Hung Q. Doan
  • Patent number: 8329497
    Abstract: A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: December 11, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Yin Qian, Howard E. Rhodes, Hsin-Chih Tai, Vincent Venezia, Duli Mao
  • Publication number: 20120301990
    Abstract: Pixel sensor cells, methods of fabricating pixel sensor cells, and design structures for a pixel sensor cell. The pixel sensor cell has a gate structure that includes a gate dielectric and a gate electrode on the gate dielectric. The gate electrode includes a layer with first and second sections that have a juxtaposed relationship on the gate dielectric. The second section of the gate electrode is comprised of a conductor, such as doped polysilicon or a metal. The first section of the gate electrode is comprised of a metal having a higher work function than the conductor comprising the second section so that the gate structure has an asymmetric threshold voltage.
    Type: Application
    Filed: August 10, 2012
    Publication date: November 29, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brent A. Anderson, Andres Bryant, William F. Clark, JR., John J. Ellis-Monaghan, Edward J. Nowak
  • Patent number: 8304816
    Abstract: An image sensor capable of overcoming a decrease in photo sensitivity resulted from using a single crystal silicon substrate, and a method for fabricating the same are provided. An image sensor includes a single crystal silicon substrate, an amorphous silicon layer formed inside the substrate, a photodiode formed in the amorphous silicon layer, and a transfer gate formed over the substrate adjacent to the photodiode and transferring photoelectrons received from the photodiode.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: November 6, 2012
    Assignee: Intellectual Ventures II LLC
    Inventors: Myoung-Shik Kim, Hyung-Jun Kim
  • Patent number: 8293561
    Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: October 23, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Mahito Shinohara
  • Patent number: 8293560
    Abstract: A method of manufacturing a photoelectric conversion device, comprises forming a first insulating film on a semiconductor substrate, forming a gate electrode by forming an electrically conductive layer on the first insulating film and patterning the electrically conductive layer, etching an exposed surface of the first insulating film, forming a charge accumulation region of a photoelectric converter by implanting impurity ions of a first conductivity type into the semiconductor substrate through a thinned portion of the first insulating film formed by the etching, removing the thinned portion, forming a second insulating film covering the semiconductor substrate and the gate electrode, and forming a surface region of the photoelectric converter by implanting impurity ions of a second conductivity type opposite to the first conductivity type into the semiconductor substrate through the second insulating film.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: October 23, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Katsunori Hirota
  • Patent number: 8278131
    Abstract: A method and apparatus for operating an imager pixel that includes the act of applying a relatively small first polarity voltage and a plurality of pulses of a second polarity voltage on the gate of a transfer transistor during a charge integration period.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: October 2, 2012
    Assignee: Micron Technology, Inc.
    Inventor: John Ladd
  • Patent number: 8278132
    Abstract: The present invention provides an image sensor and a fabricating method thereof capable of approaching higher quantum efficiency and reducing cost. The method comprises: providing a substrate; forming a pixel region on a top surface of the substrate; forming an interlayer insulating layer and at least a metal line on the pixel region; forming an isolation carrier layer having a hole array therein on the interlayer insulating layer; grinding a lower surface of the substrate to reduce the thickness of the substrate; placing a plurality of conductors into the hole array to form a plurality of bumps on the isolation carrier layer.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: October 2, 2012
    Assignee: Himax Imaging, Inc.
    Inventors: Chih-Min Liu, Fang-Ming Huang, Ping-Hung Yin, Kuo-Chan Huang, Chung-Wei Chang
  • Patent number: 8264013
    Abstract: A device separation insulating film and a device separation semiconductor layer are provided for a device separation section for separating adjacent devices from each other, end portions of the device separation insulating film and end portions of the device separation semiconductor layer are provided to overlap each other in order to surround two sides of an outer-periphery of the voltage conversion section and also to surround a channel section of the charge transfer device and the light receiving devices and an end portion of the device separation insulating film facing an end face of the light receiving device is arranged inwardly below a control electrode with respect to an end face of the control electrode on the light receiving device side.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: September 11, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tomohiko Kawamura
  • Patent number: 8258506
    Abstract: Provided is a photoelectric conversion device comprising an electrically conductive film, a photoelectric conversion film, and a transparent electrically conductive film, wherein said photoelectric conversion film contains a crystallized fullerene or fullerene derivative, and said crystallized fullerene or fullerene derivative is oriented in the (111) direction perpendicularly to the film surface of said electrically conductive film.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: September 4, 2012
    Assignee: Fujifilm Corporation
    Inventor: Tetsuro Mitsui
  • Patent number: 8247258
    Abstract: A method for fabricating CMOS image sensor device includes providing a P-type semiconductor substrate. The semiconductor substrate includes a surface region. The method includes forming a first dielectric layer having a first thickness overlying a first region of the semiconductor substrate. The method includes providing an N type impurity region in a portion of the semiconductor substrate underneath the first dielectric layer to cause formation of a photodiode device region characterized by at least the N type impurity region and the P type substrate. A second dielectric layer having a second thickness is formed in a second region of the surface region. The second dielectric layer is formed within a portion of the first region within the first thickness of the first dielectric layer. The method includes forming a polysilicon gate layer overlying at least the second region to form a contact member coupled to the second region.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Hong Zhu, Jieguang Huo
  • Patent number: 8241522
    Abstract: The invention provides liquid crystalline blends, a device such as a photovoltaic cell using the blend and method thereof. A liquid crystalline blend comprises at least an electron donor and at least an electron acceptor with a weight or molar ratio in the range of from about 1:20 to about 20:1. Another liquid crystalline blend comprises at least an electron donor and at least an electron acceptor, wherein the electron donor, the electron acceptor, or both is (are) halo-substituted such as F-substituted. The donor or the electron acceptor can be excited by an electromagnetic radiation such as solar light to induce electron transfer between the donor and the acceptor. The photovoltaic cell is improved in that favorable molecular arrangement in the blend gives more interfaces between the donor and the acceptor and thus a viable path for dissociation and electrons and/or holes; as well as larger light-harvesting area toward the coming light.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: August 14, 2012
    Assignee: Kent State University
    Inventor: Quan Li
  • Patent number: 8242692
    Abstract: The present invention relates to an organic light emitting diode (OLED) display and a manufacturing method thereof. The OLED display includes a substrate member that includes a plurality of pixel areas. A thin film transistor (TFT) is formed on the substrate member and includes a gate electrode, a source electrode, and a drain electrode. A planarization layer is formed on the TFT and includes a contact hole through which the drain electrode is partially exposed. A pixel electrode is formed on the planarization layer and is connected to the drain electrode of the TFT through the contact hole. A pixel defining layer is formed on the planarization layer and has a through opening. Light scattering spacers are formed on the pixel defining layer to scatter reflected light and may have various shapes and dimensions.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: August 14, 2012
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Eun-Ah Kim, Hee-Chul Jeon, Woo-Suk Jung, Hee-Seong Jeong, Joo-Hwa Lee, Chul-Woo Jeong, Noh-Min Kwak, Soon-Ryong Park
  • Patent number: 8232580
    Abstract: A semiconductor device includes a photodiode formed using a silicon substrate, a wide-bandgap semiconductor layer formed on the silicon substrate and having a bandgap larger than that of silicon, and a switching element formed using the wide-bandgap semiconductor layer. The switching element is electrically connected to the photodiode so as to be on/off-controlled by a control signal from the photodiode.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: July 31, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshiaki Nozaki
  • Patent number: 8227844
    Abstract: A CMOS active pixel sensor (APS) cell structure includes at least one transfer gate device and method of operation. A first transfer gate device comprises a diodic or split transfer gate conductor structure having a first doped region of first conductivity type material and a second doped region of a second conductivity type material. A photosensing device is formed adjacent the first doped region for collecting charge carriers in response to light incident thereto, and, a diffusion region of a second conductivity type material is formed at or below the substrate surface adjacent the second doped region of the transfer gate device for receiving charges transferred from the photosensing device while preventing spillback of charges to the photosensing device upon timed voltage bias to the diodic or split transfer gate conductor structure.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, Andres Bryant, John J. Ellis-Monaghan
  • Patent number: 8211733
    Abstract: A solid-state imaging device including an imaging region having a plurality of pixels arranged in a two-dimensional matrix and a peripheral circuit detecting output signals from the pixels. An impurity concentration in a transistor of each pixel is lower than an impurity concentration in a transistor of the peripheral circuit. Further, the impurity concentration of a semiconductor well region under a floating diffusion portion in the pixel is set to be lower than the impurity concentration of a semiconductor well region under a transistor portion at the subsequent stage of the floating diffusion portion.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: July 3, 2012
    Assignee: Sony Corporation
    Inventors: Maki Sato, Susumu Ooki
  • Patent number: 8173476
    Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: May 8, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Mahito Shinohara
  • Publication number: 20120100659
    Abstract: A method for manufacturing a solid-state image sensor includes forming a gate electrode structure including a gate electrode on a gate insulating film formed on a semiconductor substrate, and implanting ions into a first region and simultaneously implanting the ions into a second region of the semiconductor substrate via the gate electrode structure and the gate insulating film, wherein the first region is a region where a charge accumulation region is to be formed, and the second region is a region where an extended region that extends from the charge accumulation region to a portion below the gate electrode is to be formed, and a mean projected range of the ions in the step of simultaneous implanting of the ions into the first region and the second region is larger than a sum total of thicknesses of the gate electrode and the gate insulating film.
    Type: Application
    Filed: October 19, 2011
    Publication date: April 26, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Junji Iwata
  • Patent number: 8164121
    Abstract: A six-phase charge coupled device (CCD) pixel includes a pixel pair, with each pixel having two adjacent control gates overlying corresponding variable potential wells, where voltages applied to the control gates enable charge to be accumulated into and transferred out of the wells. A clear window region overlies a fixed potential gradient region, decreasing in potential away from the control gates. This region enables a wide band of photons to be sensed by the photosensitive silicon of the CCD. The decreasing potential levels facilitate high charge transfer efficiency (i.e., high CTE) from pixel to pixel via the control or transfer gates. By applying particular voltages to the control gates, charge can be quickly and efficiently transferred between pixels.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: April 24, 2012
    Assignee: Imagerlabs
    Inventor: Mark Wadsworth
  • Patent number: 8163588
    Abstract: A manufacturing method of a photoelectric conversion device included a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: April 24, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryuichi Mishima, Mineo Shimotsusa, Hiroaki Naruse
  • Patent number: 8154097
    Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a substrate having a sensor array area and a peripheral circuit area a first insulating film structure formed on the peripheral circuit area and including a plurality of first multi-layer wiring lines and a second insulating film structure formed on the sensor array area and including a plurality of second multi-layer wiring lines. The uppermost-layer wiring line of the plurality of first multi-layer wiring lines is higher than that of the uppermost-layer wiring line of the plurality of second multi-layer wiring lines. The first insulating film structure includes an isotropic etch-stop layer, and the second insulating film structure does not include the isotropic etch-stop layer.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: April 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Ki Kim, Duck-Hyung Lee, Hyun-Pil Noh
  • Patent number: 8119436
    Abstract: An image sensor and a method for manufacturing the same are disclosed. The image sensor can include a semiconductor substrate that includes photodiodes arranged for each unit pixel; an interlayer dielectric layer and metal wirings disposed on the semiconductor substrate; and a photorefractive unit that is formed on the periphery of an optical path incident on the photodiodes. The photorefractive unit has a lower refractive index than the interlayer dielectric layer. The slantly incident light can be incident on the photodiodes, while maintaining the slanted optical path as it is. The light sensitivity of the photodiodes can be improved, thereby improving image quality.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: February 21, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Seung Ryong Park
  • Patent number: 8115241
    Abstract: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: February 14, 2012
    Assignee: Panasonic Corporation
    Inventors: Mitsuyoshi Mori, Mikiya Uchida, Kazuo Fujiwara, Takumi Yamaguchi
  • Patent number: 8115851
    Abstract: A solid-state image capturing apparatus according to the present invention includes: a plurality of photoelectric conversion sections; a charge accumulation section; and a charge readout section, the apparatus further includes: a semiconductor substrate including a plurality of diffusion layers formed thereabove, the diffusion layers constituting the photoelectric conversion sections, the charge accumulation section and the charge readout section; a readout gate electrode formed above the semiconductor substrate and constituting the charge readout section; an insulation sidewall formed on a side surface of the readout gate electrode; and a surface diffusion layer constituting the photoelectric conversion sections, which is positioned in a self-aligning manner with respect to the readout gate electrode by the insulation sidewall.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: February 14, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Akiyoshi Mutoh
  • Patent number: 8102017
    Abstract: An image sensor may comprise circuitry, a first lower electrode, a photodiode, an upper electrode, a second lower electrode, and an upper interconnection. The circuitry may comprise a first lower interconnection and a second lower interconnection over a dielectric of a substrate. The first lower electrode, the photodiode, and the upper electrode may be sequentially formed over the first lower interconnection. The second lower electrode may comprise a passivation layer over the second lower interconnection. The upper interconnection may be formed over the second lower electrode and electrically connected to the upper electrode.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: January 24, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki Jun Yun
  • Publication number: 20110309233
    Abstract: Methods, apparatuses, systems, and devices relating to fabricating one or more nanowires are disclosed. One method for fabricating a nanowire includes: selecting a particular wavelength of electromagnetic radiation for absorption for a nanowire; determining a diameter corresponding to the particular wavelength; and fabricating a nanowire having the determined diameter. According to another embodiment, one or more nanowires may be fabricated in an array, each having the same or different determined diameters. An image sensor and method of imaging using such an array are also disclosed.
    Type: Application
    Filed: December 13, 2010
    Publication date: December 22, 2011
    Applicants: PRESIDENT AND FELLOWS OF HARVARD COLLEGE, ZENA TECHNOLOGIES, INC.
    Inventors: Kwanyong SEO, Paul Steinvurzel, Ethan Schonbrun, Munib Wober, Kenneth B. Crozier
  • Patent number: 8080856
    Abstract: A photoelectric structure is presented, comprising one or more PiN cells. The PiN cell is formed by an intrinsic semiconductor bulk having front and rear surfaces enclosed between p- and n-type regions extending along side surfaces of said semiconductor bulk. The front and rear surfaces of the intrinsic semiconductor bulk are active surfaces of the PiN cell and said side surfaces of said semiconductor bulk formed with said p- and n-type regions are configured and operable for collecting excess charged carriers generated in said semiconductor bulk in response to collected electromagnetic radiation to which at least one of the active surfaces is exposed during the PiN cell operation.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: December 20, 2011
    Inventors: Gady Golan, Alex Axelevitch, Ronen Shavit
  • Publication number: 20110278649
    Abstract: A non-uniform gate dielectric charge for pixel sensor cells, e.g., CMOS optical imagers, and methods of manufacturing are provided. The method includes forming a gate dielectric on a substrate. The substrate includes a source/drain region and a photo cell collector region. The method further includes forming a non-uniform fixed charge distribution in the gate dielectric. The method further includes forming a gate structure on the gate dielectric.
    Type: Application
    Filed: May 14, 2010
    Publication date: November 17, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brent A. ANDERSON, Andres BRYANT, William F. CLARK, JR., John J. ELLIS-MONAGHAN, Edward J. NOWAK
  • Publication number: 20110261191
    Abstract: A system for imaging a textured surface comprising includes a photoreceptor array having: at least a first photoreceptor and a second photoreceptor, each configured to receive electromagnetic radiation reflected from the textured surface and to generate a signal corresponding thereto; wherein the photoreceptor array is configured to detect an image of the textured surface based on the relative difference between the time of arrival of the signals from the first and second photoreceptors. Methods for imaging a textured surface and fabricating a photoreceptor array structure for imaging a textured surface are also provided.
    Type: Application
    Filed: December 17, 2009
    Publication date: October 27, 2011
    Applicant: RAYTHEON COMPANY
    Inventors: Robert W. BYREN, Darin S. WILLIAMS
  • Patent number: 8043927
    Abstract: In a method of manufacturing a complementary metal-oxide semiconductor (CMOS) image sensor (CIS), an epitaxial layer may be formed on a first substrate including a chip area and a scribe lane area. A first impurity layer may be formed adjacent to the first substrate by implanting first impurities into the epitaxial layer. A photodiode may be formed in the epitaxial layer on the chip area. A circuit element electrically connected to the photodiode may be formed on the epitaxial layer. A protective layer protecting the circuit element may be formed on the epitaxial layer. A second substrate may be attached onto the protective layer. The first substrate may be removed to expose the epitaxial layer. A color filter layer may be formed on the exposed epitaxial layer using the first impurity layer as an alignment key. A microlens may be formed over the color filter layer.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: October 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Jun Park, Tae-Hun Lee, Seung-Hun Shin
  • Publication number: 20110256655
    Abstract: Highly efficient, low energy, low light level imagers and photodetectors are provided. In particular, a novel class of Della-Doped Electron Bombarded Array (DDEBA) photodetectors that will reduce the size, mass, power, complexity, and cost of conventional imaging systems while improving performance by using a thinned imager that is capable of detecting low-energy electrons, has high gain, and is of low noise.
    Type: Application
    Filed: February 11, 2011
    Publication date: October 20, 2011
    Applicant: California Institute of Technology
    Inventors: Shouleh Nikzad, Chris Martin, Michael E. Hoenk
  • Patent number: 8030115
    Abstract: A solid-state image pickup device which includes a substrate carrying a plurality of photoelectric conversion elements which are two-dimensionally arranged therein the substrate having a plurality of rectangular light-receiving faces each corresponding to the photoelectric conversion element, a flattening layer having a plurality of approximately rectangular concave faces each located to correspond to the light-receiving faces, and a color filter having color layers of plural kinds of colors and buried in the concave faces of the flattening layer, the color filter exhibiting a larger refractive index than that of the flattening layer, wherein the color layers are respectively enabled to function as a convex lens.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: October 4, 2011
    Assignee: Toppan Printing Co., Ltd.
    Inventor: Katsumi Yamamoto
  • Publication number: 20110237014
    Abstract: A method for manufacturing a solid-state imaging device in which a charge generator that detects an electromagnetic wave and generates signal charges is formed on a semiconductor substrate and a negative-charge accumulated layer having negative fixed charges is formed above a detection plane of the charge generator. The method includes the steps of: forming an oxygen-feed film capable of feeding oxygen on the detection plane of the charge generator; forming a metal film that covers the oxygen-feed film on the detection plane of the charge generator; and performing heat treatment for the metal film in an inactive atmosphere to thereby form an oxide of the metal film between the metal film and the oxygen-feed film on the detection plane of the charge generator, the oxide being to serve as the negative-charge accumulated layer.
    Type: Application
    Filed: June 6, 2011
    Publication date: September 29, 2011
    Applicant: SONY CORPORATION
    Inventors: Susumu Hiyama, Tomoyuki Hirano
  • Patent number: 8021908
    Abstract: A method and apparatus for operating an imager pixel that includes the act of applying a relatively small first polarity voltage and a plurality of pulses of a second polarity voltage on the gate of a transfer transistor during a charge integration period.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: September 20, 2011
    Assignee: Micron Technology, Inc.
    Inventor: John Ladd
  • Patent number: 8017425
    Abstract: An image sensor capable of overcoming a decrease in photo sensitivity resulted from using a single crystal silicon substrate, and a method for fabricating the same are provided. An image sensor includes a single crystal silicon substrate, an amorphous silicon layer formed inside the substrate, a photodiode formed in the amorphous silicon layer, and a transfer gate formed over the substrate adjacent to the photodiode and transferring photoelectrons received from the photodiode.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: September 13, 2011
    Assignee: Crosstek Capital, LLC
    Inventors: Myoung-Shik Kim, Hyung-Jun Kim