Abstract: Isolation methods and devices for isolating pixels of an image sensor pixel. The isolation structure and methods include forming a biased gate over a field isolation region and adjacent a pixel of an image sensor. The isolation methods also include forming an isolation gate over substantial portions of a field isolation region to isolate pixels in an array of pixels.

Abstract: A solid-state imaging device includes a plurality of pixels, each of which includes a photoelectric converter section formed on a first substrate to generate and accumulate signal charges corresponding to incident light, a charge accumulation capacitor section formed on the first substrate or a second substrate to temporarily hold the signal charges transferred from the photoelectric converter section, and a plurality of MOS transistors formed on the second substrate to transfer the signal charges accumulated in the charge accumulation capacitor section, connection electrodes formed on the first substrate, and connection electrodes formed on the second substrate and electrically connected to the connection electrodes formed on the first substrate.

Abstract: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.

Abstract: A solid-state imaging element having high sensitivity and low smear in miniaturization is provided. The solid-state imaging element includes: a photoelectric conversion unit; a read-out unit; a charge transferring unit; a charge transfer electrode formed over the charge transferring unit; shielding film formed over the charge transfer electrode and has an opening part over the photoelectric conversion unit; and anti-reflection film formed (i) in the opening part, and (ii) over the charge transfer electrode. A first edge, of the to anti-reflection film formed in the opening part, stops protruding before reaching spacing found under the shielding film. A second edge, of the anti-reflection film formed over the charge transfer electrode, stops protruding before covering a side wall of the charge transfer electrode. The first edge faces the side wall of the charge transfer electrode, and the second edge protrudes in a read-out direction of the charge.

Abstract: An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array.

Abstract: Provided is an image sensor. The image sensor can include a first substrate comprising a pixel portion in which a readout circuitry is provided and a peripheral portion in which a peripheral circuitry is provided. An interlayer dielectric including lines can be formed on the first substrate to connect with the readout circuitry and the peripheral circuitry. A crystalline semiconductor layer can be provided on a portion of the interlayer dielectric corresponding to the pixel portion through a bonding process. The crystalline semiconductor layer can include a first photodiode and second photodiode. The first and second photodiodes can be defined by device isolation trenches in the crystalline semiconductor layer. A device isolation layer can be formed on the crystalline semiconductor layer comprising the device isolation trenches. An upper electrode layer passes through the device isolation layer to connect with a portion of the first photodiode.

Abstract: A solid-state imaging device includes a photodetector which is formed on a substrate and is configured to generate signal charge by photoelectric conversion, a floating diffusion configured to receive the signal charge generated by the photodetector, a plurality of MOS transistors including a transfer transistor that transfers the signal charge to the floating diffusion and an amplification transistor that outputs an pixel signal corresponding to a potential of the floating diffusion, a multi-wiring layer which is formed in a layer higher than the substrate and is composed of a plurality of wiring layers electrically connected to the MOS transistors via contact portions, and a light-shielding film that is constituted by a bottom wiring layer disposed in a layer higher than the substrate and lower than the multi-wiring layer.

Abstract: An image sensor including a substrate and an interlayer dielectric layer divided into a pixel region and a logic pad region. An image sensor may include at least one of the following: a color filter, an over coating layer, and a micro lens sequentially formed over the interlayer dielectric layer in the pixel region; a top conductive layer formed over the interlayer dielectric layer of the logic pad region; an etch stop layer formed over the interlayer dielectric layer in the logic pad region and on the sides and a portion of an upper surface of a top conductive layer; and a first and second protective layers sequentially formed over the etch stop layer.

Abstract: An image device which includes reflowed color filters. Reflowed color filters may be formed by heat treating preliminary color filters. When preliminary color filters are reflowed, color filters of different colors may be formed continuous with each other. Contiguous color filters in an image device may reduce manufacturing costs, maximize optical efficiency, minimize noise, and/or minimize crosstalk.

Abstract: A method for fabricating a back-illuminated semiconductor imaging device and resulting imaging device is disclosed, which includes the steps providing a substrate having a front surface and a back surface; growing an epitaxial layer substantially overlying the front surface of the substrate; forming at least one barrier layer substantially within the epitaxial layer; fabricating at least one imaging structure overlying and extending into the epitaxial layer, the imaging structure at least one charge transfer region, the at least one barrier layer substantially underlying the at least one charge transfer region, wherein light incident on the back surface of the substrate generates charge carriers which are diverted away from the at least one charge transfer region by the at least one barrier layer. At least a portion of the epitaxial layer is grown using an epitaxial lateral overgrowth technique.

Abstract: A solid state image pickup device is provided which includes: charge accumulation regions disposed in a semiconductor substrate in a matrix shape; a plurality of vertical transfer channels formed in the semiconductor substrate each in a close proximity to each column of the charge accumulation regions; vertical transfer electrodes formed above the vertical transfer channels; a channel protective impurity layer formed just under the vertical transfer channel and surrounding the charge accumulation region; one or more pixel separation impurity layers formed under the channel protective impurity layer and at a position facing the channel protective impurity layer; an overflow barrier region having a peak position of an impurity concentration at a position deeper than the pixel separation impurity layer, the peak position of the impurity concentration being at a depth of 3 ?m or deeper from a surface of the semiconductor substrate; and a horizontal CCD for transferring signal charges transferred from the vertical

Abstract: A solid-state imaging device including: a substrate; a substrate voltage supply that applies a first potential to the substrate during a light receiving period and applies a second potential to the substrate during a no-light receiving period; and a plurality of pixels including a light receiving portion that generates signal charges in response to received light, a storage capacitor that stores and holds the signal charges, a dark current suppressing portion, an electronic shutter adjusting layer that adjusts potential distribution in a substrate so that the signal charges are swept to the rear surface side of the substrate, a readout gate portion that reads out the signal charges stored in the storage capacitor, and a vertical transfer register that transfers the signal charges read out by the readout gate portion in a vertical direction.

Abstract: A solid-state imaging device including: light-receiving units which are formed in rows and columns; a transfer channel formed in each column; first and second transfer electrodes that are formed in the same layer and deposited alternately above the transfer channel; insulating regions each formed above the transfer channel and between one of the first transfer electrodes and one of the second transfer electrodes which are adjacent to each other; an antireflection film formed above the light-receiving units, and formed on the insulating regions to cover the insulating regions; a first wire formed in each row in a layer upper than the antireflection film, and electrically connected to second transfer electrodes; and a light-shielding film which is formed in a layer upper than the first wire, covers the transfer channel, and has an opening above each of the light-receiving units.

Abstract: A pixel of a complementary metal oxide semiconductor (CMOS) image sensor includes a plurality of photodiodes for sensing light to thereby generate photoelectric charges in different regions; a plurality of transfer transistors for transferring photoelectric charges of corresponding photodiodes in response to a first control signal; a floating diffusion region for receiving photoelectric charges transferred by the plurality of transfer transistors; a rest transistor connected between a power supply voltage and the floating diffusion region for resetting the floating diffusion region by controlling a voltage loaded on the floating diffusion region in response to a second control signal; a drive transistor connected between the power supply voltage and the floating diffusion region to serve as a source follower buffer amplifier; and a select transistor connected between the drive transistor and a pixel output terminal for performing an addressing operation in response to a third control signal.

Abstract: There is provided a method for manufacturing a solid-state image device which includes the steps of: forming a silicon epitaxial growth layer on a silicon substrate; forming photoelectric conversion portions, transfer gates, and a peripheral circuit portion in and/or on the silicon epitaxial growth layer and further forming a wiring layer on the silicon epitaxial growth layer; forming a split layer in the silicon substrate at a side of the silicon epitaxial growth layer; forming a support substrate on the wiring layer; peeling the silicon substrate from the split layer so as to leave a silicon layer formed of a part of the silicon substrate at a side of the support substrate; and planarizing the surface of the silicon layer.

Abstract: A solid-state image capturing apparatus is manufactured, which has a high sensitivity and high resolution with no color filter or no on-chip microlens required and with no shading generated or no variance in performance between pixel sections. In a solid-state image capturing apparatus 1, a plurality of pixel sections 2 (solid-state image capturing devices), each having light receiving sections 21 to 23 laminated in a depth direction of a semiconductor substrate 3, is repeatedly arranged according to a sequence in a direction along a plane of the semiconductor substrate 3. For incident light, electromagnetic waves having wavelength bands corresponding to the depths of the respective light receiving sections 21 to 23 are detected at the light receiving sections 21 to 23 in accordance with the wavelength dependency of optical absorption coefficient of semiconductor substrate material, and signal charges are generated.

Abstract: The present invention solves a smear problem caused by mixing of a noise signal with signal electric charge being transferred in an operation to transfer the signal charge obtained as a result of a process carried out on a received light beam having a large wavelength. In order to solve the problem, the present invention provides a solid-state image pickup device including a layered structure which includes photosensors and an electric-charge transfer section. The photosensors include a first photosensor (21) and a second photosensor (22) for receiving a light beam with a wavelength smaller than the wavelength of a light beam received by the first photosensor (21). The first photosensor (21) and the second photosensor (2) are provided at adjacent locations separated away from each other by a potential barrier section (12).

Abstract: A manufacturing method of a photoelectric conversion device comprises a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.

Abstract: An image sensing circuit and method is disclosed, wherein a photodiode is formed in a substrate through a series of angled implants. The photodiode is formed by a first, second and third implant, wherein at least one of the implants are angled so as to allow the resulting photodiode to extend out beneath an adjoining gate. Under an alternate embodiment, a fourth implant is added, under an increased implant angle, in the region of the second implant. The resulting photodiode structure substantially reduces or eliminates transfer gate subthreshold leakage.

Abstract: A deep implanted region of a first conductivity type located below a transistor array of a pixel sensor cell and adjacent a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The deep implanted region reduces surface leakage and dark current and increases the capacitance of the photodiode by acting as a reflective barrier to photo-generated charge in the doped region of the second conductivity type of the photodiode. The deep implanted region also provides improved charge transfer from the charge collection region of the photodiode to a floating diffusion region adjacent the gate of the transfer transistor.

Abstract: There is provided a solid-state imaging element having a light receiving part generating charges by light irradiation, and a source/drain region of a transistor, both formed in a semiconductor layer. The solid-state imaging element includes a non-silicided region including the light receiving part, in which surfaces of the source/drain region and a gate electrode of the transistor are not silicided; and a silicided region in which the surfaces of the source/drain region and the gate electrode of the transistor are silicided. The non-silicided region has a sidewall formed on a side surface of the gate electrode of the transistor, a hydrogen supply film formed to cover the semiconductor layer, the gate electrode, and the sidewall, and a salicide block film formed on the hydrogen supply film to prevent silicidation. The silicided region has a sidewall formed on the side surface of the gate electrode of the transistor.

Abstract: A solid-state imaging device includes a semiconductor substrate; a first conductive region of the semiconductor substrate; a first conductive region on an upper surface side of the first conductive region of the semiconductor substrate; a second conductive region below the first conductive region on the upper surface side of the first conductive region of the semiconductor substrate. The solid-state imaging device further includes a photoelectric conversion region including the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region and a transfer transistor transferring charges accumulated in the photoelectric conversion region to a readout region; and a pixel including the photoelectric conversion region and the transfer transistor. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor.

Abstract: An embodiment relates to a device comprising a nanowire photodiode comprising a nanowire and at least on vertical photogate operably coupled to the nanowire photodiode.

Abstract: A method for forming microlenses of different curvatures is described, wherein a substrate having at least a first and a second areas different in height is provided. A transparent photosensitive layer having a planar surface is formed on the substrate and then patterned into at least two islands of different thicknesses respectively over the first area and the second area. The at least two islands are heated and softened to form at least two microlenses of different curvatures respectively over the first area and the second area, wherein the higher an area is, the smaller the curvature of the corresponding microlens is.

Abstract: The present invention provides, in part, methods producing multilayer semiconductor structures having one or more at least partially relaxed strained layers, where the strained layer is at least partially relaxed by annealing. In particular, the invention forms diffusion barriers that prevent diffusion of contaminants during annealing. The invention also includes embodiments where the at least partially relaxed strained layer is patterned into islands by etching trenches and the like. The invention also provides semiconductor structures resulting from these methods, and further, provides such structures where the semiconductor materials are suitable for application to LED devices, laser devices, photovoltaic devices, and other optoelectronic devices.

Abstract: A CMOS active pixel sensor (APS) cell structure having dual workfunction transfer gate device and method of fabrication. The transfer gate device comprises a dielectric layer formed on a substrate and a dual workfunction gate conductor layer formed on the dielectric layer comprising a first conductivity type doped region and an abutting second conductivity type doped region. The transfer gate device defines a channel region where charge accumulated by a photosensing device is transferred to a diffusion region. A silicide structure is formed atop the dual workfunction gate conductor layer for electrically coupling the first and second conductivity type doped regions. In one embodiment, the silicide contact is smaller in area dimension than an area dimension of said dual workfunction gate conductor layer. Presence of the silicide strap prevents the diodic behavior from allowing one or the other side of the gate to float to an indeterminate voltage.

Abstract: A solid-state imaging device includes a semiconductor substrate including: a plurality of light-receptive portions that are arranged one-dimensionally or two-dimensionally; a vertical transfer portion that transfers signal electric charge read out from the light-receptive portions in a vertical direction; a horizontal transfer portion that transfers the signal electric charge transferred by the vertical transfer portion in a horizontal direction; a barrier region adjacent to the horizontal transfer portion, the barrier region letting only surplus electric charge of the horizontal transfer portion pass therethough; a drain region adjacent to the barrier region, into which the surplus electric charge passing through the barrier region is discharged; and an insulation film adjacent to the drain region. A portion of the drain region is located beneath the insulation film.

Abstract: In crystallization of a silicon film by annealing with a linear-shaped laser beam having an ununiform width of the short axis of the beam, the profile (intensity distribution) of the laser beam is evaluated, and the result is fed back to an oscillating condition of the laser beam or an optical condition which projects this onto the silicon film, whereby a display device comprising a high-quality crystalline silicon film is produced.

Abstract: A six-phase charge coupled device (CCD) pixel includes a pixel pair, with each pixel having two adjacent control gates overlying corresponding variable potential wells, where voltages applied to the control gates enable charge to be accumulated into and transferred out of the wells. A clear window region overlies a fixed potential gradient region, decreasing in potential away from the control gates. This region enables a wide band of photons to be sensed by the photosensitive silicon of the CCD. The decreasing potential levels facilitate high charge transfer efficiency (i.e., high CTE) from pixel to pixel via the control or transfer gates. By applying particular voltages to the control gates, charge can be quickly and efficiently transferred between pixels.

Abstract: A photoelectric conversion device is configured to include a light receiving region, for converting light to signal charges, and transistors. An insulation film is arranged on a surface of the light receiving region and under gate electrodes of the transistors. A first reflection prevention film of a refractive index higher than that of the insulation film is arranged at least above the light receiving region, to sandwich the insulation film between the first reflection prevention film and the light receiving region, and includes a silicon nitride film. An interlayer insulation film is arranged on the first reflection prevention film, and a second reflection prevention film is laminated between the first reflection prevention film and the interlayer insulation film. At least one of side walls of the gate electrodes of the transistors includes the silicon nitride film and a silicon oxide film arranged between the silicon nitride film and the gate electrodes.

Abstract: It is intended to provide a solid-state image pickup element capable of reducing an area of a read channel to increase a ratio of a surface area of a light-receiving section to the overall surface area of one pixel.

Abstract: Embodiments relate to an image sensor and a method for manufacturing an image sensor that may prevent a photoresist pattern from remaining on gates by forming a floating diffusion area faster than the gates. According to embodiments, since the gates may not be influenced by an ion implantation process, current characteristics and operation reliability may be enhanced. According to embodiments, the method may include forming dummy ion implantation mask patterns for forming a floating diffusion area over an epitaxial layer and forming an ion implantation mask pattern over the epitaxial layer and at least a portion of the dummy ion implantation mask patterns, so as to form the floating diffusion area by performing an ion implantation process.

Abstract: The invention provides CCD type solid-state imaging apparatus comprises: photoelectric conversion elements; a plurality of first transfer paths extending in a first direction; and second transfer paths extending in a first direction; the first transfer paths and the second transfer paths respectively including a plurality of discretely formed first layer transfer electrode films and second layer transfer electrode films formed between the first layer transfer electrode films and whose ends are laminated on the ends of the adjacent first layer transfer electrode films via insulating films. The thickness of the insulating film between the first layer transfer electrode film and the second layer transfer electrode film constituting the second transfer path shown is smaller than the thickness of the insulating film between the first layer transfer electrode film and the second layer transfer electrode film constituting the first transfer path shown.

Abstract: A pixel sensor cell having a semiconductor substrate having a surface; a photosensitive element formed in a substrate having a non-laterally disposed charge collection region entirely isolated from a physical boundary including the substrate surface. The photosensitive element comprises a trench having sidewalls formed in the substrate of a first conductivity type material; a first doped layer of a second conductivity type material formed adjacent to at least one of the sidewalls; and a second doped layer of the first conductivity type material formed between the first doped layer and the at least one trench sidewall and formed at a surface of the substrate, the second doped layer isolating the first doped layer from the at least one trench sidewall and the substrate surface.

Abstract: A frame shutter type device provides a separated well in which the storage node is located. The storage node is also shielded by a light shield to prevent photoelectric conversion.

Abstract: A CMOS image sensor and manufacturing method thereof are disclosed. The present CMOS image sensor comprises: a semiconductor substrate including an active region having a photo diode region and a transistor region; a gate on the active region, comprising a gate insulating layer and a gate electrode thereon; a first source/drain diffusion region in the transistor region at one side of the gate electrode, including a first conductivity type dopant; a second photo diode diffusion region in the region at the other side of the gate electrode, the second diffusion region including a first conductivity type dopant; insulating sidewalls on sides of the gate electrode; and a third diffusion region over or in the second diffusion region, extending below one of the insulating sidewalls (e.g., closest to the photo diode region), and including a second conductivity type dopant.

Abstract: A solid-state imaging device includes a pixel section including light receiving sensors, horizontally spaced vertical transfer registers including vertical transfer channel regions and vertical transfer electrodes formed above the vertical transfer channel regions, vertically spaced horizontal transfer registers each including a horizontal transfer channel region and horizontal transfer electrodes formed side by side in a horizontal direction above the horizontal transfer channel region and formed in the same layer as the vertical transfer electrodes, and a horizontal-to-horizontal transfer portion formed between adjacent two of the horizontal transfer registers and including a horizontal-to-horizontal transfer channel region interconnecting respective parts of the horizontal transfer channel regions positioned under the horizontal transfer electrodes to which the transfer drive pulses having different phases are applied, and a horizontal-to-horizontal transfer electrode formed above the horizontal-to-horizon

Abstract: A pinned photodiode with an ultra-shallow highly-doped surface layer of a first conductivity type and a method of formation are disclosed. The ultra-shallow highly-doped surface latter has a thickness of about 100 Angstroms to about 500 Angstroms and a dopant concentration of about 5×1017 atoms per cm3 to about 1×1019 atoms per cm3. The ultra-shallow highly-doped surface layer is formed by diffusion of ions from a doped layer into the substrate or by a plasma doping process. The ultra-shallow pinned layer is in contact with a charge collection region of a second conductivity type.

Abstract: A CMOS image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material.

Abstract: An image intensifier includes a microchannel plate (MCP) having an output surface, and a ceramic substrate having an outer surface. The output surface of the MCP and the outer surface of the ceramic substrate are oriented facing each other. An imager is substantially buried within the ceramic substrate, and an input surface of the imager is exposed to receive electrons from the output surface of the MCP. The input surface of the imager and the outer surface of the ceramic substrate are oriented in substantially the same plane. The input surface of the imager and the outer surface of the ceramic substrate are disposed at a very close distance from the output surface of the MCP. The imager includes input/output pads, and the ceramic substrate includes input/output pads. A conductive epoxy connects a respective input/output pad of the imager to a respective input/output pad of the ceramic substrate.

Abstract: A CMOS image sensor and a fabricating method thereof are provided. The method includes forming a nitride layer over a boundary region between a device isolation region and a pixel region, forming a silicide barrier layer in the pixel region and performing a silicide process. A boundary portion of the silicide barrier layer formed in the pixel region can be prevented from being wet-etched while the silicide barrier layer is removed by the wet etching process.

Abstract: In the manufacture of an electronic device such as an active matrix display, a vertical amorphous PIN photodiode or similar thin-film diode (D) is advantageously integrated with a polysilicon TFT (TFT1, TFT2) in a manner that permits a good degree of optimization of the respective TFT and diode properties while being compatible with the complex pixel context of the display. High temperature processes for making the active semiconductor film (10) of the TFT more crystalline than an active semiconductor film (40) of the diode and for forming the source and drain doped regions (s1,s2, d1,d2) of the TFT are carried out before depositing the active semiconductor film (40) of the diode. Thereafter, the lateral extent of the diode is defined by etching while protecting with an etch-stop film (30) an interconnection film (20) that can provide a doped bottom electrode region (41) of the diode as well as one of the doped regions (s2, g1) of the TFT.

Abstract: An image sensor can include a gate insulation layer, a gate electrode, a photodiode, and a floating diffusion region. The gate insulation layer can be formed on and/or over a semiconductor substrate for a transfer transistor. The gate insulation layer includes a first gate insulation layer having a central opening and a second gate insulation layer formed on and/or over an uppermost surface of the first gate insulation layer including the opening. The gate electrode can be formed on and/or over the gate insulation layer. The photodiode can be formed in the semiconductor substrate at one side of the gate electrode so as to generate an optical charge. The floating diffusion region can be formed in the semiconductor at the other side of the gate electrode opposite to the photodiode. The floating diffusion region can be electrically connected to the photodiode through a channel so as to store the optical charge generated from the photodiode.

Abstract: A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is disclosed. The well region is laterally displaced from a charge collection region of a second conductivity type of a pinned photodiode.

Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.

Abstract: Embodiments relate to a method of manufacturing a CMOS image sensor in which, when a buried photodiode is formed, a p-type impurity region may be formed simultaneously with a p-type LDD region in the photo diode region. Additionally, a p-type impurity region may be formed under side wall spacers, which may reduce leakage current of the photodiode.

Abstract: An imager having gates with spacers formed of a high dielectric material. The high dielectric spacer provides larger fringing fields for charge transfer and improves image lag and charge transfer efficiency.

Abstract: A method for manufacturing a CMOS image sensor may include at least one of the following steps: Forming a salicide blocking layer on an entire surface of a semiconductor substrate having a photodiode area and a transistor. Forming a photoresist pattern inclined at an angle less 90° (e.g. between approximately 70° and approximately 80°) on and/or over a non-salicide area. Performing wet-etching on the salicide blocking layer using the photoresist pattern as an etching mask. Forming salicide on the salicide area after removing the photoresist pattern.

Abstract: A semiconductor device includes: a trench device isolating region formed in a substrate to define a photodiode active region; a channel stop impurity region formed in the substrate contacting the device isolating region, wherein the channel stop impurity region surrounds a bottom and a sidewall of the device isolating region; and a photodiode formed within the photodiode active region.

Abstract: A CMOS image sensor may include at least one of: a semiconductor substrate over which a photodiode and transistors are formed; passivation layers formed over a semiconductor substrate; and color PRs buried in trenches formed in the passivation layers and formed to be higher than the trenches.