Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.

Abstract: Protuberances, having vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode, are formed at an optical interface between two layers having different refractive indices. The protuberances may be formed by employing self-assembling block copolymers that form an array of sublithographic features of a first polymeric block component within a matrix of a second polymeric block component. The pattern of the polymeric block component is transferred into a first optical layer to form an array of nanoscale protuberances. Alternately, conventional lithography may be employed to form protuberances having dimensions less than the wavelength of light. A second optical layer is formed directly on the protuberances of the first optical layer. The interface between the first and second optical layers has a graded refractive index, and provides high transmission of light with little reflection.

Abstract: A CMOS image sensor includes a photosensitive device, a floating diffusion region, a transfer transistor, and a pocket photodiode formed in a semiconductor substrate of a first conductivity type. The floating diffusion region is of a second conductivity type. The transfer transistor has a channel region disposed between the photosensitive device and the floating diffusion region. The pocket photodiode is of the second conductivity type and is formed under a first portion of a bottom surface of the channel region such that a second portion of the bottom surface of the channel region abuts the semiconductor substrate.

Abstract: A method of manufacturing a solid state imaging device having a photo-electric conversion portion array and a transfer electrode array, these arrays being provided in parallel to each other, upper surfaces and side wall surfaces of the transfer electrode array being covered with a light-shielding layer, and a transparent layer showing an oxidizing property at the time of film formation, the transparent layer being formed on the photo-electric conversion parts and the light-shielding layer.

Abstract: A solid-state imaging device includes: a solid-state imaging element having a light-receiving area; a transparent member disposed so as to oppose the light-receiving area; a supporting member configured to support the transparent member; a first mark disposed at either an upper surface of the transparent member or an upper surface of the supporting member; and a second mark disposed at an outer side of the light-receiving area, at an upper surface of the solid-state imaging element.

Abstract: A charge transfer device 1 has an P-type region, an N-type well provided to the surficial portion of the P-type region, and transfer electrodes having P-type conductivity, provided over the N-type substrate while placing an insulating film in between.

Abstract: A method of manufacturing a photoelectric conversion device, comprises forming a first insulating film on a semiconductor substrate, forming a gate electrode by forming an electrically conductive layer on the first insulating film and patterning the electrically conductive layer, etching an exposed surface of the first insulating film, forming a charge accumulation region of a photoelectric converter by implanting impurity ions of a first conductivity type into the semiconductor substrate through a thinned portion of the first insulating film formed by the etching, removing the thinned portion, forming a second insulating film covering the semiconductor substrate and the gate electrode, and forming a surface region of the photoelectric converter by implanting impurity ions of a second conductivity type opposite to the first conductivity type into the semiconductor substrate through the second insulating film.

Abstract: A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes ar

Abstract: A solid-state imaging device is provided, which includes a pixel region in which pixels including a photoelectric conversion section and a plurality of pixel transistors are arranged. In the solid-state imaging device, a transfer transistor of the pixel transistors includes: a transfer gate electrode extended in a surface of the substrate formed on the surface of a semiconductor substrate; and a transfer gate electrode buried in the substrate which is electrically insulated from the transfer gate electrode extended in a surface of the substrate and is embedded in the inside of the semiconductor substrate in the vertical direction through the transfer gate electrode extended in a surface of the substrate.

Abstract: The present invention provides a method for fabricating a pixel cell of CMOS image sensor, comprising: preparing a semiconductor substrate divided into region I and region II; forming an insulation layer on the surface of the semiconductor substrate in the region I and a gate dielectric layer on the surface of the semiconductor substrate in the region II; forming a poly-silicon gate on the surface of the semiconductor substrate in the region II; forming a deep doped well in the region I through an ion implantation with high energy; performing an ion implantation with low energy in the region I and an ion implantation for lightly doped source/drain in the region II simultaneously; and forming source/drain regions in the semiconductor substrate in the region II.

Abstract: A method and resulting device for reducing crosstalk in a back-illuminated imager is disclosed, comprising providing a substrate comprising an insulator layer and a seed layer substantially overlying the insulator layer, an interface being formed where the seed layer comes in contact with the insulator layer; forming an epitaxial layer substantially overlying the seed layer, the epitaxial layer defining plurality of pixel regions, each pixel region outlining a collection well for collecting charge carriers; and forming one of an electrical, optical, and electrical and optical barrier about the outlined collection well extending into the epitaxial layer to the interface between the seed layer and the insulator layer.

Abstract: A backside-illuminated image sensor is disclosed having improved quantum efficiency (QE) in the near infrared wavelengths (NIR: 750-1100 nm) with minimal optical interference fringes produced by multiple reflected rays within the photosensitive Si region of the sensor, which may be a charge-coupled device, a complementary metal oxide sensor or an electron-multiplication sensor. The invention comprises a fringe suppression layer applied to the backside surface of the photosensitive Si region of a detector (Si substrate) whereby the fringe suppression layer functions in concert with the Si substrate to reduce the occurrence of interference fringes in the NIR while maintaining a high QE over a broad range of wavelengths (300-1100 nm). The combination of a fringe suppression layer applied to a Si substrate provides a new class of back illuminated solid state detectors for imaging.

Abstract: An image sensor includes a pixel array including a photodiode, a peripheral region including a logic circuit, and an isolation region formed between the pixel array and the peripheral region and formed under the peripheral region to electrically isolate the pixel array from the peripheral region.

Abstract: Disclosed are a pinned photodiode having and electrically controllable pinning layer and an image sensor including the pinned photodiode. A predetermined voltage is applied to the pinning layer for the depletion duration of the photodiode in the image sensor, so that stable surface pinning is acquired and the uniform surface pinning is achieved between pixels.

Abstract: A manufacturing method of a photoelectric conversion device included a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.

Abstract: A process and structure of a back side illumination (BSI) image sensor are disclosed. An n-type doped region is formed in a substrate, and a transfer gate is formed on top of the semiconductor substrate. A p-type doped region is formed in the n-type doped region either using the transfer gate as a mask or is non-self aligned formed.

Abstract: A method of manufacturing a solid-state image pickup device according to an embodiment includes forming first and second holes in a semiconductor substrate, forming insulating films on surfaces of the first and second holes, forming a contact and an alignment mark by embedding a conducting material in the first and second holes, forming a photodiode in the semiconductor substrate, forming a wiring layer including a connecting part for connecting to the contact and a wiring for connecting to the connecting part, bonding a supporting substrate on the wiring layer, exposing the contact and the alignment mark on the surface of the semiconductor substrate by reducing the semiconductor substrate in thickness, and forming a filter and a lens on the photodiode based on the alignment mark.

Abstract: This invention relates to imaging device and its related transferring technologies to independent substrate able to attain significant broadband capability covering the wavelengths from ultra-violet (UV) to long-Infrared. More particularly, this invention is related to the broadband image sensor (along with its manufacturing technologies), which can detect the light wavelengths ranges from as low as UV to the wavelengths as high as 20 ?m covering the most of the wavelengths using of the single monolithic image sensor on the single wafer. This invention is also related to the integrated circuit and the bonding technologies of the image sensor to standard integrated circuit for multicolor imaging, sensing, and advanced communication. Our innovative approach utilizes surface structure having more than micro-nano-scaled 3-dimensional (3-D) blocks which can provide broad spectral response.

Abstract: A method for manufacturing a solid-state imaging device in which a charge generator that detects an electromagnetic wave and generates signal charges is formed on a semiconductor substrate and a negative-charge accumulated layer having negative fixed charges is formed above a detection plane of the charge generator, the method includes the steps of: forming an oxygen-feed film capable of feeding oxygen on the detection plane of the charge generator; forming a metal film that covers the oxygen-feed film on the detection plane of the charge generator; and performing heat treatment for the metal film in an inactive atmosphere to thereby form an oxide of the metal film between the metal film and the oxygen-feed film on the detection plane of the charge generator, the oxide being to serve as the negative-charge accumulated layer.

Abstract: A first oxide film (102) is formed on a semiconductor substrate (101). A first nitride film (103) is formed on first gate electrode formation regions of the first oxide film (102). A plurality of first gate electrodes (104) are provided on the first nitride film (103) so as to be spaced apart from one another with a predetermined distance therebetween. A second oxide film (105) covers upper part and side walls of each of the first gate electrodes (104). A sidewall spacer (106) of a third oxide film is buried in an overhang portion generated on each side wall of each of the first gate electrodes (104) covered by the second oxide film (105). A second nitride film (107) covers the second oxide film (105), the sidewall spacer (106) and part of the first oxide film (102) located between the first gate electrodes (104). A plurality of second gate electrodes (108) are formed on at least part of the second nitride film (107) located between adjacent two of the first gate electrodes (104).

Abstract: An image sensor includes a light receiving device, a field effect transistor, a stress layer pattern, and a surface passivation material. The light receiving device is formed in a first region of a substrate. The field effect transistor is formed in a second region of the substrate. The stress layer pattern is formed over the field effect transistor for creating stress therein to improve transistor performance. The surface passivation material is formed on the first region of the substrate for passivating dangling bonds at the surface of the light receiving device.

Abstract: A method of manufacturing a solid state imaging device having a photo-electric conversion portion array and a transfer electrode array, these arrays being provided in parallel to each other, upper surfaces and side wall surfaces of the transfer electrode array being covered with a light-shielding layer, and a transparent layer showing an oxidizing property at the time of film formation, the transparent layer being formed on the photo-electric conversion parts and the light-shielding layer.

Abstract: A manufacturing method of a photoelectric conversion device included a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.

Abstract: A method for manufacturing a sensor image may include forming a pixel array including a photodiode structure and an insulating film structure in an active area of a semiconductor substrate; forming a metal pad on the insulating film structure; forming a dielectric and/or etch stop film on the metal pad (and optionally over the pixel array); forming a protective layer on the dielectric and/or etch stop film; and forming a pad opening and a pixel opening by etching the protective layer.

Abstract: Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide.

Abstract: A growth substrate is removed from a semiconductor film, and a surface of the semiconductor film exposed by removing the growth substrate is flattened. The semiconductor film along device division lines are partially etched by dry etching to form grooves in a lattice that form streets, not reaching the metal support in the semiconductor film. The surface of the semiconductor film at the bottom of the grooves is flattened. The semiconductor film along the device division lines at the bottom of the grooves are further etched by wet etching to expose the metal support at the bottom of the grooves to finish the streets.

Abstract: It is intended to provide a solid-state image pickup element capable of reducing an area of a read channel to increase a ratio of a surface area of a light-receiving section to the overall surface area of one pixel.

Abstract: A backside illuminated image sensor comprises a sensor layer implementing a plurality of photosensitive elements of a pixel array, and an oxide layer adjacent a backside surface of the sensor layer. The sensor layer comprises a seed layer and an epitaxial layer formed over the seed layer, with the seed layer having a cross-sectional doping profile in which a designated dopant is substantially confined to a pixel array area of the sensor layer. The doping profile advantageously reduces dark current generated at an interface between the sensor layer and the oxide layer. The image sensor may be implemented in a digital camera or other type of digital imaging device.

Abstract: A solid state imaging device has a plurality of photodetector parts 11 arranged in matrix, a plurality of vertical charge transfer electrodes 13 that read out signal charge from the photodetector parts and transfer the signal charge in the vertical direction, and a first light-shielding film 5 that shields the plural vertical charge transfer parts from incident light. Each of the vertical charge transfer electrodes includes: a transfer channel 12 provided along the vertical array of the plural photodetector parts, a plurality of first transfer electrodes 3a that are formed on the transfer channel so as to traverse the transfer channel and that is coupled in the horizontal direction in spacing between the photodetector parts; and second transfer electrodes 3b provided on the transfer channel and arranged between the first transfer electrodes. The first light-shielding film is formed continuously in the horizontal direction and has openings formed on the photodetector parts.

Abstract: A solid-state imaging device includes a photoelectric conversion unit that includes a first region of a first conductivity type and a second region of a second conductivity type between which a pn junction is formed, the first region and the second region being formed in a signal-readout surface of a semiconductor substrate, the second region being located at a position deeper than the first region; and a transfer transistor configured to transfer signal charges accumulated in the photoelectric conversion unit to a readout drain through a channel region that lies under a surface of the first region and horizontally adjacent to the photoelectric conversion unit, the transfer transistor being formed in the signal-readout surface. The transfer transistor includes a transfer gate electrode that extends from above the channel region with a gate insulating film therebetween to above the first region so as to extend across a step.

Abstract: A method for producing a solid-state imaging device, which including: a photoelectric conversion section; a charge transfer section having a charge transfer electrode; and an antireflection film covering a light-receiving region in the photoelectric conversion section, wherein forming the antireflection film includes: forming a sidewall on a lateral wall of the charge transfer electrode after forming the charge transfer electrode; forming an antireflection film on a substrate surface where the sidewall is formed; forming a resist on the antireflection film; melting and flattening the resist to expose the antireflection film on the charge transfer electrode; removing the antireflection film by using the resist as the mask; removing the sidewall; covering the charge transfer electrode with an insulating film; and forming a light-shielding film that reaches a level lower than the top surface of the antireflection film, and that surrounds the periphery of the antireflection film.

Abstract: Embodiments relate to an image sensor and a method for manufacturing an image sensor. According to embodiments, a method may include forming a semiconductor substrate including a pixel part and a peripheral part, forming an interlayer dielectric film including a metal wire on and/or over the semiconductor substrate, forming photo diode patterns on and/or over the interlayer dielectric film and connected to the metal wire in the pixel part, forming a device isolation dielectric layer on and/or over the interlayer dielectric film including the photo diode patterns, forming a first via hole on and/or over the device isolation dielectric layer to partially expose the photo diode patterns, and forming a second via hole on and/or over the device isolation dielectric layer to expose the metal wire in the peripheral part. According to embodiments, vertical integration of transistor circuitry and a photo diode may be achieved.

Abstract: A solid-state imaging device includes a pixel including a buried photodiode formed inside a substrate, a buried floating diffusion formed at a depth equal to that of the buried photodiode in the substrate so as to face a bottom of a trench portion formed in the substrate, and a buried gate electrode formed at the bottom of the trench portion in order to transfer a signal charge from the buried photodiode to the buried floating diffusion.

Abstract: An image sensor and method of manufacturing the same are disclosed. A semiconductor substrate can be prepared comprising a photodiode region, a transistor region, and a floating diffusion region. A gate dielectric can be disposed under a surface of the semiconductor substrate in the transistor region. A first dielectric pattern can be provided having a portion above and a portion below the surface of the semiconductor substrate in the photodiode and the floating diffusion regions. A second dielectric can be disposed under the gate dielectric. The second dielectric can extend the depth of the gate dielectric into the semiconductor substrate to space the movement path of photoelectrons from the photodiode region to the floating diffusion region.

Abstract: Disclosed herein is a solid-state image pickup device which includes: a light-receiving unit for photoelectric conversion of incident light; and a charge transfer unit of an n-channel insulating gate type configured to transfer a signal charge photoelectrically converted in the light-receiving unit; wherein the charge transfer unit has an insulating film formed on a transfer electrode and having a negative fixed charge.

Abstract: In a solid-state imaging device 1 in which a hollow section 9 is formed between a solid-state imaging element 2 and a covering section 4 and an air path 7 extending from the hollow section 9 to the outside is formed in an adhesive section 5, a shielding section 11 for shielding the air path 7 is formed on the air path 7 so as to be positioned on a portion exposed from the covering section 4. This makes it possible to reduce noises occurring in a signal processing section of a semiconductor element while preventing condensation in the covering section for covering the semiconductor element.

Abstract: A solid-state image pickup device including a photoelectric conversion element, a floating diffusion, and an element isolation region that are disposed above a first semiconductor region has a second semiconductor region of a first conductivity type disposed on the first semiconductor region. An interface between the first semiconductor region and a portion of the second semiconductor region corresponding to the photoelectric conversion element is located at a first depth, whereas the interface between the first semiconductor region and a portion of the second semiconductor region disposed under the element isolation region and the floating diffusion is located at a second depth smaller than the first depth.

Abstract: Embodiments of a pixel that includes a photosensitive region, a floating diffusion region, and a transistor transfer gate disposed between the photosensitive region and the floating diffusion region. The transfer gate includes first and second transfer gate elements, the first transfer gate element having a different doping than the second transfer gate element. By controlling the doping of the first and second transfer gate elements a transfer gate can be provided with a greater threshold voltage near the photosensitive region and a lesser threshold voltage near the floating diffusion region. Other embodiments, including process embodiments, are disclosed and claimed.

Abstract: A solid-state imaging device includes: a photoelectric conversion section (PCS) generating signal charge from light; a charge accumulating section (CAS) accumulating the signal charge; a first charge transfer section (CTS1) between the PCS and the CAS transferring the signal charge from the PCS to the CAS responsive to a control signal; and a second charge transfer section (CTS2) provided for the CAS to transfer the signal charge from the CAS in response to a control signal. The CAS includes: a charge accumulation gate electrode; and a gate insulating film between the charge accumulation gate electrode and a semiconductor substrate. The gate insulating film includes: a first region (R1) provided on a side of CTS1 in a region corresponding to the CAS; and a second region (R2) provided on a side of CTS2 in the region corresponding to the CAS. R2's gate insulating film is thicker than R1's.

Abstract: A detector for detecting electromagnetic radiation includes a semiconductor substrate of a first doping type, and a well in the semiconductor substrate, the well being of a second doping type. The first doping type and the second doping type are different and the well has an increasing dopant concentration in a direction parallel to a surface of the semiconductor substrate. In addition, the detector includes a detector terminal doping region which is arranged at least partly in the well in a terminal region of the well. The detection of electromagnetic radiation is based on a generation of free charge carriers by the electromagnetic radiation in a detection region of the well. The detection region has a maximum dopant concentration which is lower than a maximum dopant concentration of the terminal region of the well.

Abstract: A method of manufacturing a photoelectric conversion device, comprises forming a first insulating film on a semiconductor substrate, forming a gate electrode by forming an electrically conductive layer on the first insulating film and patterning the electrically conductive layer, etching an exposed surface of the first insulating film, forming a charge accumulation region of a photoelectric converter by implanting impurity ions of a first conductivity type into the semiconductor substrate through a thinned portion of the first insulating film formed by the etching, removing the thinned portion, forming a second insulating film covering the semiconductor substrate and the gate electrode, and forming a surface region of the photoelectric converter by implanting impurity ions of a second conductivity type opposite to the first conductivity type into the semiconductor substrate through the second insulating film.

Abstract: Provided is a photoelectric conversion device comprising an electrically conductive film, a photoelectric conversion film, and a transparent electrically conductive film, wherein said photoelectric conversion film contains a crystallized fullerene or fullerene derivative, and said crystallized fullerene or fullerene derivative is oriented in the (111) direction perpendicularly to the film surface of said electrically conductive film.

Abstract: A method and structure of providing a doped plug to improve the performance of CCD gaps is discussed. A highly-doped region is implemented in a semiconductor, aligned beneath a gap. The plug provides a highly-conductive region at the semiconductor surface, therefore preventing the development of a region where potential is significantly influenced by surface charges.

Abstract: Disclosed is a CMOS image sensor including a gate electrode of a finger type transfer transistor for controlling the saturation state of a floating diffusion region according to the luminance level (i.e. low luminance or high luminance). The CMOS image sensor includes first and second photodiode regions for generating electrons in response to incident light, and a transfer transistor positioned between the first and second photodiodes for receiving the generated electrons transferred from the first and/or second photodiode.

Abstract: A semiconductor device 1 includes a substrate 2 having on a main surface thereof a central area and a peripheral area which surrounds the central area and is exposed, a semiconductor layer 4 which is formed on the main surface of the substrate 2, is made of a material harder than the substrate 2, is in the shape of a mesa, and has a steep side over the exposed peripheral area, and an insulating film 12S provided on a side surface of the semiconductor layer 4.

Abstract: A lens forming method according to the present invention for forming lenses capable of focusing light on a plurality of respective photoelectric conversion sections constituting of a semiconductor apparatus is described. The method includes a lens forming step of processing a lens forming material, in which an average gradient of a ? curve indicating a residual film thickness with respect to the amount of irradiation light is between ?15 and ?0.8 nm·cm2/mJ within the range of a residual film ratio of 10 to 50% or within the range of the amount of irradiation light of 55 to 137 mJ/cm2 into a lens surface shape, using a photomask with an optical transmittance that is varied according to a lens surface shape, as an exposure mask.

Abstract: A pixel and imager device, and method of forming the same, where the pixel has a transfer transistor gate associated with a photoconversion device and is isolated in a substrate by shallow trench isolation. The transfer transistor gate does not overlap the shallow trench isolation region.

Abstract: A resistor circuit includes first to Mth resistor circuit units. A (2j?1)th resistor circuit unit includes a (2j?1)th first fuse element and a (2j?1)th resistor provided in series between a (2j?1)th node and a 2jth node, and a (2j?1)th second fuse element provided in parallel with the (2j?1)th first fuse element and the (2j?1)th resistor between the (2j?1)th node and the 2jth node. A 2jth resistor circuit unit includes a 2jth first fuse element and a 2jth resistor provided in series between the 2jth node and a (2j+1)th node, and a 2jth second fuse element that is provided in parallel with the 2jth first fuse element and the 2jth resistor between the 2jth node and the (2j+1)th node. The (2j?1)th first fuse element, the (2j?1)th second fuse element, the 2jth first fuse element, and the 2jth second fuse element are disposed in a fuse region. The (2j?1)th resistor is disposed in a first resistor region formed in a first direction with respect to the fuse region.

Abstract: A solid-state imaging device of the type having photoelectric conversion elements formed in a matrix pattern on a semiconductor substrate, vertical transfer elements each of which reads signal charges from the photoelectric conversion elements arranged in the column direction and transfers the signal charges in the vertical direction, and a horizontal transfer element which transfers in the horizontal direction the signal charges sent from each of the vertical transfer elements, the horizontal transfer element includes: a charge transfer channel; a first transfer electrode; a second transfer electrode; and an interelectrode insulating film; with the first transfer electrode and the second transfer electrode being at the same potential.

Abstract: A dual-pixel full color CMOS imager comprises a two-photodiode stack including an n doped substrate, a bottom photodiode, and a top photodiode. The bottom photodiode has a bottom p doped layer at a first depth overlying the substrate and a bottom n doped layer cathode overlying the bottom p doped layer. The top photodiode has a top p doped layer overlying the bottom n doped layer and a top n doped layer cathode overlying the top p doped layer. A single photodiode including a bottom p doped layer overlies the substrate at a third depth. The third depth is less than, or equal to the first depth. A bottom n doped layer overlies the bottom p doped layer, a top p doped layer directly overlies the bottom n doped layer without an intervening layer, and a top n doped layer overlies the top p doped layer.