Charge Transfer Device (e.g., Ccd, Etc.) Patents (Class 438/60)
  • Patent number: 7416908
    Abstract: A method for fabricating a micro structure includes depositing a first layer of a first material over a substrate; patterning a first hard mask over the first layer; depositing a second layer of a second material over the first layer and the first hard mask; patterning a second hard mask over the second layer; and selectively removing the first material and the second material not covered by any of the first mask and the second mask to produce over the substrate the micro structure having a first structure portion having a first height and a second structure portion having a second height.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: August 26, 2008
    Assignee: Spatial Photonics, Inc.
    Inventors: Chii Guang Lee, Shaoher X. Pan, Hung Kwei Hu
  • Patent number: 7410823
    Abstract: An image sensor includes a substrate region of a first conductivity type, a photodiode region of a second conductivity type located in the substrate, a hole accumulated device (HAD) region of the first conductivity type located at a surface of the substrate and over the photodiode region, and a transfer gate located over the surface of the substrate adjacent the HAD region. The image sensor further includes a first channel region of the first conductivity type located in the substrate and aligned below the transfer gate, a second channel region of the second conductivity type located in the substrate between said transfer gate and the first channel region, and an floating diffusion region which is located in the substrate and which electrically contacts the second channel region.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: August 12, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jongcheol Shin
  • Patent number: 7405097
    Abstract: A CMOS image sensor and a method for manufacturing the same are disclosed, in which a blue photodiode is imparted with a greater thickness to improve sensitivity of blue light. The blue photodiode of a CMOS image sensor includes a first lightly doped P-type epitaxial layer formed on a heavily doped P-type semiconductor substrate; a gate electrode of a transfer transistor formed on the first epitaxial layer; a first N-type blue photodiode region formed on the first epitaxial layer; and a second N-type blue photodiode region formed on the first epitaxial layer corresponding to the first blue photodiode region.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: July 29, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Chang Hun Han
  • Publication number: 20080173905
    Abstract: A solid state imaging device comprises: a photoelectric converting portion provided on a semiconductor substrate; a charge transfer path, formed in an adjacent position to the photoelectric converting portion, that receives a signal charge generated in the photoelectric converting portion and transfers the signal charge in a predetermined direction; and a gate electrode that transfers the signal charge from the photoelectric converting portion to the charge transfer path, wherein the gate electrode comprises polysilicon having a different conductive type from that of a semiconductor region forming a charge storing portion of the charge transfer path.
    Type: Application
    Filed: December 7, 2007
    Publication date: July 24, 2008
    Inventors: Masanori NAGASE, Jiro Matsuda, Tsuneo Sasamoto, Toshiaki Hayakawa
  • Patent number: 7402451
    Abstract: An imager device that has mitigated dark current leakage and punch-through protection. The transistor associated with the photoconversion device is formed with a single (i.e, one-sided) active area extension region on one side of the transistor gate opposite the photoconversion device, while other transistors can have normal symmetrical (i.e, two-sided) active area extension regions (e.g., lightly doped drains) with resulting high performance and short gate lengths. The asymmetrical active area extension region of the transistor associated with the photodiode can serve to reduce dark current at the photoconversion device. The punch-through problem normally cured by a lightly doped drain is fixed at the transistor associated with the photoconversion device by adding a Vt adjustment implant and/or increasing its gate length.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: July 22, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7402452
    Abstract: In a solid-state image pick-up device in which a photoelectric converting section formed on a semiconductor substrate and a gate oxide film of a transfer path of a charge coupled device (CCD) which is close to the photoelectric converting section are constituted by a laminated film comprising a silicon oxide film (SiO) and a silicon nitride film (SiN), the gas oxide film has a single layer structure in which at least an end on the photoelectric converting section side of the gate oxide film does not contain the silicon nitride film.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: July 22, 2008
    Assignee: FUJIFILM Corporation
    Inventors: Eiichi Okamoto, Shunsuke Tanaka, Shinji Uya
  • Publication number: 20080169483
    Abstract: There is provided a method of producing a thin GaN film-joined substrate, including the steps of: joining on a GaN bulk crystalline body a substrate different in type or chemical composition from GaN; and dividing the GaN bulk crystalline body at a plane having a distance of at least 0.1 ?m and at most 100 ?m from an interface thereof with the substrate different in type, to provide a thin film of GaN on the substrate different in type, wherein the GaN bulk crystalline body had a surface joined to the substrate different in type, that has a maximum surface roughness Rmax of at most 20 ?m. Thus a GaN-based semiconductor device including a thin GaN film-joined substrate including a substrate different in type and a thin film of GaN joined firmly on the substrate different in type, and at least one GaN-based semiconductor layer deposited on the thin film of GaN, can be fabricated at low cost.
    Type: Application
    Filed: June 28, 2007
    Publication date: July 17, 2008
    Inventors: Hitoshi Kasai, Akihiro Hachigo, Yoshiki Miura, Katsushi Akita
  • Publication number: 20080149968
    Abstract: A method of manufacturing a photodiode sensor and an associated charge transfer transistor includes forming an insulation region on a substrate, forming the diode on a first side of the insulation region with the diode being self-aligned on the insulation region, and replacing the insulation region by a gate of the charge transfer transistor. The invention has particular utility in the manufacture of CMOS or CCD image sensors.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 26, 2008
    Applicant: STMICROELECTRONICS S.A.
    Inventor: Francois ROY
  • Publication number: 20080149974
    Abstract: A CMOS image sensor and method of fabricating the same are disclosed. The method comprises forming a plurality of polysilicon patterns on a silicon epitaxial layer which correspond to a plurality of photodiodes in a dummy pixel area, depositing a metal with a high melting point metal on the plurality of polysilicon patterns using a photoresist in an etching process, forming a silicide layer of the high melting point metal by removing the photoresist and then performing an ashing and rapid annealing process, sequentially forming a device protecting layer and a planarization layer on the silicon epitaxial layer and silicide layer, and forming a microlens on the planarization layer which corresponds to the silicide layer.
    Type: Application
    Filed: October 28, 2007
    Publication date: June 26, 2008
    Applicant: DONGBU HITEK CO., LTD.
    Inventor: Jun Woo Song
  • Publication number: 20080135884
    Abstract: A solid-state imaging device is provided and includes a photoelectric conversion unit and a charge transfer unit including charge transfer electrodes for transferring charges generated in the photoelectric conversion unit. Each of the charge transfer electrodes includes a first electrode of a first layer conductive film and a second electrode of a second layer conductive film, which are alternately arranged. The upper edge of the first electrode is protected by a canopy-shaped upper insulating film to ensure a distance between the first and second electrodes. In addition, the first and second electrodes are insulated from each other by an inter-electrode insulating film of a side wall insulating film formed by CVD so as to cover the side wall of the first electrode.
    Type: Application
    Filed: November 14, 2007
    Publication date: June 12, 2008
    Inventor: Hideki KORIYAMA
  • Patent number: 7382003
    Abstract: A solid-state image pick-up unit comprises: a semiconductor substrate comprising an area in which a photoelectric converting portion is formed; and an electric charge transfer portion that transfers an electric charge formed by the photoelectric converting portion, wherein the electric charge transfer portion comprises: an electric charge transfer electrode including a first layer electrode and a second layer electrode; and a gate oxide film, the gate oxide film comprises a second gate oxide film formed under the second layer electrode, the second gate oxide film comprising an ONO film which comprises a SiO film, a SiN film and a SiO film in this order, and the second gate oxide film is continuously formed to cover whole of a region between the first layer electrode and the second layer electrode and a region under the second layer electrode.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: June 3, 2008
    Assignee: Fujifilm Corporation
    Inventor: Ryoichi Homma
  • Publication number: 20080099806
    Abstract: Provided are image sensor having a heterojunction bipolar transistor (HBT) and a method of fabricating the same. The image sensor is fabricated by use of silicon-germanium bipolar junction transistor complementary metal oxide semiconductor (SiGe BiCMOS) technology. In the image sensor, a PD employs a floating-base-type SiGe HBT unlike a pn-junction-based CMOS image sensor (CIS). A floating base of the SiGe HBT produces a positive (+) voltage with respect to a collector during an exposure process, and the HBT performs a reverse bipolar operation due to the positive voltage so that the collector and an emitter exchange functions. In particular, since the SiGe HBT obtains a current gain ten times as high as that of a typical bipolar device even during the reverse operation, the SiGe HBT cannot only sense an optical (image) current signal but also amplify the optical current signal. Thus, the image sensor requires only three transistors in a pixel so that the degree of integration can increase.
    Type: Application
    Filed: October 15, 2007
    Publication date: May 1, 2008
    Inventors: Jin Yeong KANG, Sang Heung LEE, Jin Gun KOO
  • Patent number: 7361527
    Abstract: An image sensor includes: a gate structure on a semiconductor layer of a first conductive type; a first impurity region of the first conductive type aligned with one side of the gate structure and extending to a predetermined depth from a surface portion of the semiconductor layer; spacers formed on sidewalls of the gate structure; and a second impurity region of a second conductive type formed in a portion of the semiconductor layer under the first impurity region, wherein the first impurity region includes: a first region of which portion aligned with the one side of the gate structure; a second region aligned with the one of the spacers and having a concentration higher than that of the first region; and a third region apart from the one side of the gate structure with a predetermined distance and having a concentration higher than that of the second region.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: April 22, 2008
    Assignee: Magnachip Semiconductor, Ltd.
    Inventor: Youn-Sub Lim
  • Patent number: 7358108
    Abstract: A CMOS image sensor and a method for fabricating the same are disclosed, in which the boundary between an active region and a field region is not damaged by ion implantation. The method for fabricating a CMOS image sensor includes forming a trench in a first conductive type semiconductor substrate, forming a first conductive type heavily doped impurity ion region in the semiconductor substrate at both sides of the trench, forming a device isolation film by interposing an insulating film between the trench and the device isolation, sequentially forming a gate insulating film and a gate electrode on the semiconductor substrate, and forming a second conductive type impurity ion region for a photodiode in the semiconductor substrate between the gate electrode and the device isolation film.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: April 15, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Chang Hun Han, Bum Sik Kim
  • Patent number: 7354791
    Abstract: In a solid-state imaging device in which a N-type photoelectric conversion region is formed in a P?-type well region, a light-blocking film and a transparent conductive film are formed on the N-type photoelectric conversion region with a second interlayer insulation film interposed therebetween. By applying a negative voltage to the light-blocking film and the transparent conductive film, a P++-type inversion region is formed in a topmost part of the N-type photoelectric conversion region.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: April 8, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tooru Yamada
  • Publication number: 20080079032
    Abstract: An anti-blooming structure for a back-illuminated imager is disclosed. In one embodiment, the anti-blooming structure is formed in a substrate of a first conductivity type having a back side and a front side, comprising a channel region of a second conductivity type formed in the substrate; a barrier region of the first conductivity type positioned in the substrate substantially overlying the channel region and proximal to the front side of the substrate; and a drain region of the second conductivity type positioned substantially overlying the barrier region, wherein when light impinges on the back side of the substrate the light generates charge carriers that collect in the channel region, the charge carriers passing through the barrier region into the drain region when a potential corresponding to the collected charge carriers in the channel region is about equal to the potential corresponding to the barrier region.
    Type: Application
    Filed: September 5, 2007
    Publication date: April 3, 2008
    Inventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran
  • Publication number: 20080081394
    Abstract: A manufacturing method of a solid-state imaging device includes: forming a first and second insulating films having different properties on a silicon substrate such that they cover sides of gate electrodes formed on the silicon substrate; subjecting the second insulating film to selective etching, and forming sidewalls on the sides of the gate electrode; subjecting the gate electrode having the sidewalls formed to ion implantation; covering the gate electrode having the sidewalls formed and forming a third insulating film on the silicon substrate; covering with a mask material part of the gate electrodes covered with the third insulating film, and subjecting the substrate to etching to remove exposed third insulating film; and, after removing the mask material, forming a metal film capable of forming a silicide on the silicon substrate such that the metal film covers the gate electrodes and the third insulating film to form a silicide layer.
    Type: Application
    Filed: September 19, 2007
    Publication date: April 3, 2008
    Applicant: SONY CORPORATION
    Inventors: Kai Yoshitsugu, Kenichi Chiba
  • Publication number: 20080067543
    Abstract: A method of manufacturing a single crystalline gallium nitride (GaN) thick film by using a hydride gas phase epitaxy (HVPE), more particularly, the method of manufacturing c-plane ({0001}) of a single crystalline GaN thick film by using the HVPE. A GaN film is grown on a substrate by providing a hydrogen chloride (HCl) gas and an ammonia (NH3) gas, thereby obtaining the GaN film on the substrate, and a GaN thick film on the GaN film on the substrate is grown.
    Type: Application
    Filed: May 29, 2007
    Publication date: March 20, 2008
    Applicant: SAMSUNG CORNING CO., LTD.
    Inventors: Hyun Min Shin, Sun Hwan Kong, Ki Soo Lee, Jun Sung Choi
  • Publication number: 20080042170
    Abstract: An image sensor and fabricating method thereof are provided. A gate electrode is formed on a semiconductor substrate with a photodiode on one side and a low-concentration drain on the other side. A silicide blocking pattern covers the photodiode, the gate electrode, and part of the low-concentration drain, such that an aperture exposes a portion of the low-concentration drain. A high-concentration drain is formed in the substrate under the aperture.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 21, 2008
    Inventor: Chang Hun Han
  • Patent number: 7329557
    Abstract: A solid-state imaging device includes: a plurality of N-type photodiode regions formed inside a P-type well; a gate electrode having one edge being positioned adjacent to each of the photodiode regions; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a STI structure, and a gate oxide film having a thickness of not more than 10 nm. One edge of the gate electrode overlaps the photodiode region.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: February 12, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ken Mimuro, Mikiya Uchida, Mototaka Ochi
  • Publication number: 20080032438
    Abstract: An image sensor and a method of manufacturing the same, in which, a planarized layer is formed on a semiconductor substrate including a pixel array region, an optical black region, and a logic region to cover a photo sensing unit array in the pixel array region, a patterned metal layer is formed on the planarized layer corresponding to the pixel array region and the logic region, but not the optical black region. An optical black layer is formed in the optical black region after a passivation layer is formed and before a color filter array is formed at a temperature less than about 400° C., and preferably contains metal material.
    Type: Application
    Filed: August 1, 2006
    Publication date: February 7, 2008
    Inventors: Tzeng-Fei Wen, Giuseppe Rossi, Ju-Hsin Yen, Chia-Huei Lin, Jhy-Jyi Sze, Chien-Yao Huang, Teng-Yuan Ko, Nien-Tsu Peng
  • Patent number: 7326588
    Abstract: An image sensor device and fabrication method thereof. An image sensing array is formed in a substrate, wherein the image sensing array comprises a plurality of photosensors with spaces therebetween. A first dielectric layer with a first refractive index is formed overlying the spaces but not the photosensors. A conformal second dielectric layer with a second refractive index is formed on a sidewall of the first dielectric layer. A third dielectric layer with a third refractive index is formed overlying the photosensors but not the spaces. The third refractive index is greater than the second refractive index. A light guide constructed by the second and third dielectric layers is formed overlying each photosensor, thereby preventing incident light from striking other photosensors.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: February 5, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Dun-Nian Yaung, Chung-Yi Yu
  • Patent number: 7316937
    Abstract: Light detecting elements are formed in areas marked off by scribe lines on a semiconductor substrate, and color filters are deposited in such a manner as to cover the formed areas of the light detecting elements, and then an infrared cut-off filter, on which an infrared reflecting film is vapor-deposited in such a manner as to cover the formed areas of the light detecting elements, is firmly fixed to the surface of the semiconductor substrate through the interposition of a translucent resin layer, such as an epoxy adhesive, to thereby form a multilayered structure, and this multilayered structure is diced along scribe lines.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: January 8, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kazuaki Kojima, Minoru Hamada
  • Publication number: 20080001179
    Abstract: An image sensor including a substrate of a semiconductor material having first and second opposite surfaces; at least one photodiode formed in the substrate on the first surface side and intended to be lit through the second surface; a stacking of insulating layers covering the first surface; and conductive regions formed at the stacking level. The sensor further includes a transparent insulating layer at least partly covering the second surface; a transparent conductive layer at least partly covering the transparent insulating layer; and circuitry for biasing the conductive layer.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 3, 2008
    Applicant: STMicroelectronics S.A.
    Inventor: Francois Roy
  • Publication number: 20070298533
    Abstract: An imager pixel array capable of separating and detecting the spectral components of an incident light without the use of a color filter array. The imager pixel array employs a grating layer which allows one or more spectral components of incident light to be transmitted therethrough, but diffracts other spectral components of the incident light. Both the transmitted and diffracted spectral components can be sensed by photosensors in the imager pixel array and used in subsequent data processing, thereby improving the quantum efficiency of the imager device. The grating layer can be formed of first and second materials each having a refractive index which are substantially the same at a predetermined wavelength.
    Type: Application
    Filed: June 26, 2006
    Publication date: December 27, 2007
    Inventors: Zhaohui Yang, Ulrich C. Boettiger
  • Publication number: 20070281383
    Abstract: A method of manufacturing a semiconductor multilayer structure having an interface between a first semiconductor layer and a second semiconductor layer includes forming the first semiconductor layer by introducing at least a first raw material gas into a reactor, forming a dummy layer including at least one of the elements constituting the second semiconductor layer by introducing at least a second raw material gas into the reactor, subsequent to the formation of the first semiconductor layer, removing the dummy layer by introducing an etching gas into the reactor, and forming the second semiconductor layer on the first semiconductor layer by introducing at least the second raw material gas into the reactor, after removing the dummy layer.
    Type: Application
    Filed: November 10, 2006
    Publication date: December 6, 2007
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Chikara WATATANI, Toru OTA
  • Patent number: 7303938
    Abstract: Isolation methods and devices for isolating pixels of an image sensor pixel. The isolation structure and methods include forming a biased gate over a field isolation region and adjacent a pixel of an image sensor. The isolation methods also include forming an isolation gate over substantial portions of a field isolation region to isolate pixels in an array of pixels.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: December 4, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Howard Rhodes
  • Publication number: 20070275497
    Abstract: A method of aligning a substrate includes forming a first alignment hole in the substrate, preparing a mask with a second alignment hole narrower than the first alignment hole, modifying a surface reflectance around either the first alignment hole or the second alignment hole to form a treatment region, positioning the mask below the substrate, such that the first and second alignment holes overlap, and operating a sensor unit above the first alignment hole to examine alignment of the first and second alignment holes.
    Type: Application
    Filed: May 22, 2007
    Publication date: November 29, 2007
    Inventors: Jin-Ho Kwack, Tae-Kyung Ahn, Min-Kyu Kim, Se-Yeoul Kwon
  • Patent number: 7297570
    Abstract: A CMOS image sensor and a method for fabricating the same is disclosed, to enhance the efficiency in condensing the light by forming a multi-layered micro lens with various materials having different refractive indexes, in which the CMOS image sensor includes a plurality of photosensitive devices on a semiconductor substrate; an insulating interlayer on the plurality of photosensitive devices; a plurality of color filter layers in correspondence with the respective photosensitive devices, to filter the light by respective wavelengths; a first micro-lens layer on an entire surface of the color filter layers, to condense the light; and a plurality of second micro-lens layers on the first micro-lens layer in correspondence with the respective photosensitive devices, wherein the second micro-lens layer has the different refractive index from that of the first micro-lens layer.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: November 20, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Shang Won Kim
  • Publication number: 20070262354
    Abstract: A backside illuminated sensor includes a semiconductor substrate having a front surface and a back surface and a plurality of pixels formed on the front surface of the semiconductor substrate. A dielectric layer is disposed above the front surface of the semiconductor substrate. The sensor further includes a plurality of array regions arranged according to the plurality of pixels. At least two of the array regions have a different radiation response characteristic from each other, such as the first array region having a greater junction depth than the second array region, or the first array region having a greater dopant concentration than the second array region.
    Type: Application
    Filed: January 18, 2007
    Publication date: November 15, 2007
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung
  • Patent number: 7294872
    Abstract: PROBLEM To provide a high quality solid state image pickup device. SOLUTION Impurities are implanted into a semiconductor substrate to form vertical transfer channels for transferring electric charges in a first direction and to form a drain near each of the vertical transfer channels via a gate which forms a barrier. A first silicon oxide film, a silicon nitride film and a second silicon oxide film are deposited in this order from the bottom, on the surfaces of the vertical transfer channels, gates and drains. A first layer vertical transfer electrode is formed on the second silicon oxide film above the vertical transfer channel, and an insulating film if formed on the surface of the first layer vertical transfer electrode. The second silicon oxide film and silicon nitride film are etched in such a manner that the silicon nitride film covers the vertical transfer channel and extends above the gate excepting a portion near the drain.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: November 13, 2007
    Assignee: Fujifilm Corporation
    Inventor: Masanori Nagase
  • Patent number: 7285438
    Abstract: A plurality of optical sensors (4) are arranged in a surface region of a semiconductor substrate (6) in a matrix pattern, and electric charge generated by the optical sensors (4) is transferred by first and second transfer electrodes (12 and 14) embedded under the optical sensors (4). The semiconductor substrate (6) is constructed by laminating a support substrate (16) composed of silicon, a buffer layer (18), and a thin silicon layer (20) composed of single-crystal silicon. p? regions (26) (overflow barrier) and n-type regions (28) which function as transfer paths are formed under the optical sensors (4). The first and the second transfer electrodes (12 and 14) are disposed between the buffer layer (18) and the n-type regions (28), and an insulating film (30) is interposed between the n-type regions (28) and the first and the second transfer electrodes (12 and 14). In this structure, the light-receiving area is large since the transfer electrodes are not disposed in the front region.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: October 23, 2007
    Assignee: Sony Corporation
    Inventor: Takashi Kasuga
  • Publication number: 20070202629
    Abstract: In a method for manufacturing a light detector that is provided with an apertured part for incident light on an upper structural layer stack laminated on a semiconductor substrate, a polyimide film, which is applied in order to protect a silicon-nitride film on an upper surface of the upper structural layer stack, is properly removed from the apertured part, allowing, e.g., the intensity of light incident within the apertured part to be made uniform. A smoothing film 140 is applied to the surface of the upper structural layer stack 86, smoothly covering corner parts 142 on the aperture edge of the apertured part 116. The smoothing film 140 is etched and the corner parts 142 that are exposed on the aperture edge, where the smoothing film 140 is thin, are removed by the etching. The aperture edge of the apertured part 116 is thereby enlarged. After the smoothing film 140 has been detached, a polyimide film is applied.
    Type: Application
    Filed: February 20, 2007
    Publication date: August 30, 2007
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Nobuji Kobayashi
  • Patent number: 7253019
    Abstract: A semiconductor detector of electromagnetic radiation which utilizes a dual-purpose electrode which extends significantly beyond the edge of a photodiode. This configuration reduces the sensitivity of device performance on small misalignments between manufacturing steps while reducing dark currents, kTC noise, and “ghost” images. The collection-mode potential of the dual-purpose electrode can be adjusted to achieve charge confinement and enhanced collection efficiency, reducing or eliminating the need for an additional pinning layer. Finally, the present invention enhances the fill factor of the photodiode by shielding the photon-created charge carriers formed in the substrate from the potential wells of the surrounding circuitry.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: August 7, 2007
    Assignee: Cypress Semiconductor Corporation (Belgium) BVBA
    Inventor: Bart Dierickx
  • Patent number: 7232697
    Abstract: Provided are a semiconductor device and a method for its manufacture. In one example, the method includes forming an isolation structure having a first refraction index over a sensor embedded in a substrate. A first layer having a second refraction index that is different from the first refraction index is formed over the isolation structure. The first layer is removed from at least a portion of the isolation structure. A second layer having a third refraction index is formed over the isolation structure after the first layer is removed. The third refraction index is substantially similar to the first refraction index.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: June 19, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Hsuan Hsu, Dun-Nian Yaung, Shou-Gwo Wuu, Ho-Ching Chien, Chien-Hsien Tseng, Jeng-Shyan Lin
  • Patent number: 7211847
    Abstract: A CMOS image sensor includes a photo sensing device for generating photo charges, a floating diffusion region for storing the photo charges generated by the photo sensing device therein, a transfer transistor connected between the photo sensing device and the floating diffusion region for transferring the photo charges generated by the photo sensing device to the floating diffusion region, a reset transistor connected between a supply voltage terminal and the floating diffusion region for discharging the charges stored in the floating diffusion region to reset the floating diffusion region, a drive transistor for acting as a source follower buffer amplifier in response to an output signal from the photo sensing device, a switching transistor connected to the drive transistor for performing an addressing operation, and a charge control device connected between the photo sensing device and the transfer transistor for controlling the amount of charges stored in the photo sensing device.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: May 1, 2007
    Assignee: DongbuAnam Semiconductor Inc.
    Inventor: Bum Sik Kim
  • Patent number: 7208332
    Abstract: Oxidation methods, which avoid consuming undesirably large amounts of surface material in Si/SiGe heterostructure-based wafers, replace various intermediate CMOS thermal oxidation steps. First, by using oxide deposition methods, arbitrarily thick oxides may be formed with little or no consumption of surface silicon. These oxides, such as screening oxide and pad oxide, are formed by deposition onto, rather than reaction with and consumption of the surface layer. Alternatively, oxide deposition is preceded by a thermal oxidation step of short duration, e.g., rapid thermal oxidation. Here, the short thermal oxidation consumes little surface Si, and the Si/oxide interface is of high quality. The oxide may then be thickened to a desired final thickness by deposition. Furthermore, the thin thermal oxide may act as a barrier layer to prevent contamination associated with subsequent oxide deposition.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: April 24, 2007
    Assignee: AmberWave Systems Corporation
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld
  • Patent number: 7195947
    Abstract: A pinned photodiode with a pinned surface layer formed by a self-aligned angled implant is disclosed. The angle of the implant may be tailored to provide an adequate offset between the pinned surface layer and an electrically active area of a transfer gate of the pixel sensor cell. The pinned surface layer is formed by employing the same mask level as the one employed for the formation of the photodiode region, and then implanting dopants at angles other than zero degrees.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: March 27, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Howard Rhodes
  • Patent number: 7192884
    Abstract: Disclosed is a method for manufacturing a semiconductor laser device, comprising the steps of: (a) forming a first conductive-type clad layer, an active layer, and a second conductive-type clad layer on a first conductive-type semiconductor substrate; (b) forming a ridge structure by selectively etching the second conductive-type clad layer; (c) forming a current blocking layer around the ridge structure, the current blocking layer having protrusions on the upper surface thereof adjacent to the ridge structure, and an amorphous and/or polycrystalline layer on a partial area thereof; and (d) removing at least the amorphous and/or polycrystalline layer from the current blocking layer, and wet-etching the upper surface of the current blocking layer so that the protrusions are reduced in size.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: March 20, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dong Joon Kim, Byung Deuk Moon, Sang Heon Han
  • Patent number: 7186595
    Abstract: A solid picture element that transfers charges completely from a photodiode portion to an amplifying transistor portion to substantially eliminate residual images and methods of its manufacture are disclosed. The solid picture element includes a buried photodiode and a transistor in communication with a transfer gate that is a selective transfer path for charges from the photodiode to the transistor. The charge accumulation region is located so that it is not in contact with the upper surface of the semiconductor substrate and so that a margin of the charge accumulation region is located 0.0 to 0.2 ?m closer to the transistor than any portion of the depletion prevention region. Methods of manufacture of the picture element of the present invention include using the transfer gate as a mask and implanting ions into a semiconductor substrate at a first angle to form the charge accumulation region and at a second, steeper, angle to form the depletion prevention region.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: March 6, 2007
    Assignee: Nikon Corporation
    Inventors: Atsushi Kamashita, Satoshi Suzuki
  • Patent number: 7186583
    Abstract: A pixel of a semiconductor-based image detector includes a photodetector, at least one switching device serially connected to the photodetector and a bypass device interposed between the photodetector and a power supply voltage. Accordingly, even though excess charges may be generated in the photodetector, the excess charges flow into the power supply through the bypass device. Blooming can thereby be reduced or suppressed.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: March 6, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seok-Ha Lee
  • Patent number: 7180151
    Abstract: An image sensing device includes a gate dielectric layer formed on a substrate and a transfer gate formed on the gate dielectric layer. A masking layer is formed on the transfer gate, the masking layer having a width smaller than a width of the transfer gate, such that a portion of the transfer gate protrudes laterally from under the masking layer. A photodiode is formed in the substrate to be self-aligned with the masking layer and to extending laterally under the transfer gate, that is, to overlap the transfer gate. Because of the overlap of the photodiode with the transfer gate, offset between the photodiode and the transfer gate is eliminated, such that an image lag phenomenon is eliminated.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: February 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young Hoon Park
  • Patent number: 7166489
    Abstract: A CMOS image sensor and a method for fabricating the same is disclosed, to enhance the image-sensing efficiency by forming a concave lens area for improving the light-condensing efficiency in a planarization layer formed before a micro-lens array, in which the CMOS image sensor includes a plurality of photosensitive devices on a semiconductor substrate; an insulating interlayer on the plurality of photosensitive devices; a plurality of color filter layers in correspondence with the respective photosensitive devices, to filter the light by respective wavelengths; a planarization layer on the color filter layers, and having first micro-lens by intaglio in correspondence with the respective photosensitive patterns to condense the light secondly; and a plurality of second micro-lens layers on the planarization layer in correspondence with the respective photosensitive devices, to condense the light firstly.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: January 23, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Shang Won Kim
  • Patent number: 7153719
    Abstract: A method of fabricating a pixel cell having a shutter gate structure. First and second charge barriers are respectively created between a photodiode and a first charge storage region and between the first storage region and a floating diffusion region. A global shutter gate is formed to control the charge barrier and transfer charges from the photodiode to the first charge storage region by effectively lowering the first charge barrier. A transfer transistor acts to transfer charges from the first storage region to the floating diffusion region by reducing the second charge barrier.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: December 26, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Inna Patrick, Sungkwon C. Hong
  • Patent number: 7135362
    Abstract: The present invention relates to an isolation layer for CMOS image sensor and a fabrication method thereof, which are capable of improving a low light level characteristic of the CMOS image sensor. The isolation layer includes: a field insulating layer formed on a predetermined portion of a substrate in the logic area to thereby define an active area and a field area; a field stop ion implantation area formed on a predetermined portion of the substrate in the pixel area, the field stop ion implantation area having a predetermined depth from a surface of the substrate to define an active area and a field area; and an oxide layer deposited on a substrate surface corresponding to the field stop ion implantation area.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: November 14, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Kyung-Lak Lee
  • Patent number: 7127793
    Abstract: A producing method of producing a solid state pickup device is provided. Imaging elements are formed on a wafer in a matrix form. Each of the imaging elements has a light receiving surface and plural contact points. Receiving surface border portions are formed on a glass plate to protrude therefrom in a matrix form by etching. The receiving surface border portions are attached to the wafer to surround the light receiving surface in each of the receiving surface border portions. The light receiving surface is spaced from the glass plate. The glass plate is diced outside respectively the receiving surface border portions, to form shield glass for covering the light receiving surface. The wafer is diced for each of the imaging elements, to obtain the solid state pickup device having the shield glass and one of the imaging elements.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: October 31, 2006
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Takeshi Misawa, Akihisa Yamazaki, Atsushi Misawa
  • Patent number: 7125738
    Abstract: A method of fabrication of a photosensitive device is disclosed. A substrate with at least an insulator layer formed thereon is provided. The insulator layer comprises a plurality of photoreceiving regions, and a plurality of conductive patterns are formed thereon without covering the photoreceiving regions. A dielectric layer is formed on the insulator and the conductive patterns, and polished by CMP thereof. The dielectric layer comprises a first dielectric layer formed by PECVD and a second dielectric layer formed by HDPCVD.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: October 24, 2006
    Assignee: Powerchip Semiconductor Corp.
    Inventors: Ming-Jeng Huang, Chen-Chiu Hsue
  • Patent number: 7125740
    Abstract: A method of fabricating a solid-state image pickup device comprising forming mask patterns corresponding to patterns of first and third transfer electrodes, which are to be alternately arranged in each vertical transfer register formation region and which are to extend in parallel to each other between light receiving portions adjacent to each other in the vertical direction, on a first electrode material layer. The method also includes forming side walls on each of the mask patterns. The method further includes patterning the first electrode material layer via the mask patterns having the side walls, to form first and third transfer electrodes formed by the first layer.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: October 24, 2006
    Assignee: Sony Corporation
    Inventors: Junji Yamane, Kunihiko Hikichi
  • Patent number: 7122397
    Abstract: A method for manufacturing a CMOS image sensor includes depositing a gate oxide film and polysilicon on a substrate, forming a gate electrode by patterning and etching the gate oxide layer and the polysilicon, wherein the polysilicon of the gate electrode extends to an active region of the substrate, forming spacers on the sidewalls of the gate electrode, forming a mask pattern having an opening over the active region, removing the spacers and the gate oxide layer thereunder in the active region, removing the mask pattern, depositing a protective layer on a pixel region of the substrate, and conducting a salicide formation process on the resulting structure.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: October 17, 2006
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Keun Hyuk Lim
  • Patent number: 7115924
    Abstract: A pixel including a substrate of a first conductivity type, a photodetector of a second conductivity type that is opposite the first conductivity type and configured to convert incident light to a charge, a floating diffusion of the second conductivity, and a transfer region between the photodetector and floating diffusion. A gate is formed above the transfer region and partially overlaps the photodetector and is configured to transfer charge from the photodetector to the floating diffusion. A pinning layer of the first conductivity type extends at least across the photodetector from the gate. A channel region of the first conductivity type extends generally from a midpoint of the gate at least across the photodiode and is formed by an implant of a dopant of the first conductivity and having a concentration such that a dopant concentration of the transfer region is greater proximate to the photodetector than proximate to the floating diffusion.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: October 3, 2006
    Assignee: Avago Technologies Sensor IP Pte. Ltd.
    Inventors: Fredrick P. LaMaster, John H. Stanback, Chintamani P. Palsule, Thomas E. Dungan