Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/64)
  • Patent number: 9019421
    Abstract: A method of manufacturing a miniaturization image capturing module includes adhesively placing a double side adhesive element onto a carrier board; adhesively placing an image capturing chip onto the double side adhesive element; adhesively placing a substrate unit onto the double side adhesive element, the substrate unit including a hollow substrate body adhered to the double side adhesive element and surrounding the image capturing chip; forming a fixing glue between the hollow substrate body and the image capturing chip to fix the position of the image capturing chip relative to the hollow substrate body; electrically connecting the image capturing chip to the substrate unit; positioning a lens unit on the top side of the hollow substrate body, the lens unit including a lens group disposed above the image capturing chip; and then removing the carrier board to expose the double side adhesive element.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: April 28, 2015
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corporation
    Inventor: Ti-Lun Liu
  • Patent number: 9012264
    Abstract: An integrated circuit package is provided with a thin-film battery electrically connected to and encapsulated with an integrated circuit die. The battery can be fabricated on a dedicated substrate, on the die pad, or on the integrated circuit die itself.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: April 21, 2015
    Assignee: STMicroelectronics, Inc.
    Inventors: Michael J. Hundt, Haibin Du, Krishnan Kelappan, Frank Sigmund
  • Publication number: 20150102450
    Abstract: A semiconductor integrated circuit has one or more integral nitride-type sensors. In one embodiment, an integral nitride-type sensor and a coplanar supplemental circuit are formed from a common silicon substrate base. In another embodiment, an integral nitride-type sensor and a supplemental circuit are integrated in a vertical orientation.
    Type: Application
    Filed: November 24, 2014
    Publication date: April 16, 2015
    Applicant: RoseStreet Labs, LLC
    Inventor: Robert Forcier
  • Publication number: 20150097210
    Abstract: A method for fabricating a composite device comprises providing a platform, providing a chip, and bonding the chip to the platform. The platform has a base layer and a device layer above the base layer. An opening in the device layer exposes a portion of the base layer. The chip is bonded to the portion of the base layer exposed by the opening in the device layer. A portion of the chip extends above the platform and is removed.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 9, 2015
    Applicant: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse, Amit Mizrahi, Timothy Creazzo, Elton Marchena, John Y. Spann
  • Publication number: 20150097211
    Abstract: A composite photonic device comprises a platform, a chip, and a contact layer. The platform comprises silicon. The chip is made of a III-V material. The contact layer has indentations to help control a flow of solder during bonding of the platform with the chip. In some embodiments, pedestals are placed under an optical path to prevent solder from flowing between the chip and the platform at the optical path.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 9, 2015
    Applicant: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse, Amit Mizrahi, Timothy Creazzo, Elton Marchena, John Y. Spann
  • Patent number: 8999743
    Abstract: A solar cell module is manufactured by forming silicone coating films (2, 2) on panels (1a, 1b), placing a solar cell matrix (3) on the silicone coating film on panel (1a), providing a seal member (4) consisting of a base seal member (4a) of butyl rubber and protrusive seal segments (4b) of butyl rubber on a peripheral region of panel (1a), mating the two panels together such that the seal member (4) may abut against a peripheral region of panel (1b), and the solar cell matrix (3) may be sandwiched between the silicone coating films (2), and compressing and heating the mated panels (1a, 1b) in vacuum for establishing a seal around the solar cell matrix (3).
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: April 7, 2015
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tomoyoshi Furihata, Hiroto Ohwada, Naoki Yamakawa, Masahiro Hinata
  • Patent number: 9000572
    Abstract: A semiconductor package substrate may include a first semiconductor chip, a second semiconductor chip, plugs and interconnection terminals. The second semiconductor chip may be arranged on an upper surface of the first semiconductor chip. The first and second semiconductor chips may have corresponding first regions and corresponding second regions. Conductive plugs may be built only in a first region of the first semiconductor chip. Circuitry of the second semiconductor chip may only be electrically connected to the first semiconductor chip through the conductive connectors corresponding to the first regions of the first and second semiconductor chips.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: April 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hoon Lee, Sang-Bo Lee
  • Publication number: 20150090333
    Abstract: An electrolyte-sealing structure for a dye-sensitized solar cell includes: a pair of opposing substrates; a fluid electrolyte sealed between the substrates; a thermoplastic resin layer positioned in such a way as to laminate the pair of substrates together while providing an area in which the fluid electrolyte is to be sealed; and a siloxane-containing layer between each of the substrates and the thermoplastic resin.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 2, 2015
    Inventor: Hidenori SOMEI
  • Patent number: 8993365
    Abstract: A wafer packaging method includes the following steps. A wafer having a plurality of integrated circuit units is provided. A first surface of the wafer opposite to the integrated circuit units is ground. A release layer is formed on a second surface of a light transmissive carrier. An ultraviolet temporary bonding layer is formed on the second surface of the light transmissive carrier or a third surface of the wafer. The ultraviolet temporary bonding layer is used to adhere the second surface of the light transmissive carrier to the third surface of the wafer. The first surface of the wafer is adhered to an ultraviolet tape. A fourth surface of the light transmissive carrier is exposed to ultraviolet to eliminate adhesion force of the ultraviolet temporary bonding layer. The light transmissive carrier and the release layer are removed.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: March 31, 2015
    Assignee: Xintec Inc.
    Inventors: Yi-Ming Chang, Kuo-Hua Liu, Yi-Cheng Wang, Sheng-Yen Chang
  • Patent number: 8993364
    Abstract: Photovoltaic modules may include multiple flexible thin film photovoltaic cells electrically connected in series, and laminated to a substantially transparent top sheet having a conductive grid pattern facing the cells. Methods of manufacturing photovoltaic modules including integrated multi-cell interconnections are provided. Methods may include steps of coordinating, integrating, and registering multiple rolls of substrates in continuous processes.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 31, 2015
    Assignee: Hanergy Hi-Tech Power (HK) Limited
    Inventors: Scott Wiedeman, Jeffrey S. Britt, Zulima Rhodes, Eric Sheehan
  • Publication number: 20150083222
    Abstract: Provided are a backsheet for a photovoltaic module, a method of manufacturing the same, and a photovoltaic module. As a resin layer including a fluoropolymer is formed by coating an aqueous dispersion composition including a crystalline fluoropolymer, a pigment, an aqueous dispersion binder and water on a substrate by an in-line coating process in a process of manufacturing the substrate, a process of manufacturing the backsheet may be simplified. In addition, since the process of manufacturing the backsheet does not use a toxic organic solvent, the process may be environmentally friendly and economical, and may enhance both productivity and product quality.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 26, 2015
    Inventors: Yoon Kyung KWON, Hyun Cheol KIM
  • Publication number: 20150084147
    Abstract: The present invention achieves reduction in size and thickness while removing the cause of defective image and the like. According to an image pickup module (1), a solid-state image pickup device (3) and a flexible substrate (2) are connected to each other by flip-chip bonding, and an opening (5) is formed in the flexible substrate 2 by melting the flexible substrate (2) and an anisotropically-conductive film (8) adhered to the flexible substrate (2).
    Type: Application
    Filed: March 1, 2013
    Publication date: March 26, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Naoki Sakota
  • Publication number: 20150084148
    Abstract: A sensor device and method of making same that includes a silicon substrate with opposing first and second surfaces, a sensor formed at or in the first surface, a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor, and a plurality of cooling channels formed as first trenches extending into the second surface but not reaching the first surface. The cooling channels instead can be formed on one or more separate substrates that are attached to the silicon substrate for cooling the silicon substrate.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 26, 2015
    Inventors: Vage Oganesian, Zhenhua Lu
  • Patent number: 8987029
    Abstract: A method of protecting a substrate during fabrication of semiconductor, MEMS devices. The method includes application of a protective thin film which typically has a thickness ranging from 3 angstroms to about 1,000 angstroms, wherein precursor materials used to deposit the protective thin film are organic-based precursors which include at least one fluorine-comprising functional group at one end of a carbon back bone and at least one functional bonding group at the opposite end of a carbon backbone, and wherein the carbon backbone ranges in length from 4 carbons through about 12 carbons. In many applications at least a portion of the protective thin film is removed during fabrication of the devices.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: March 24, 2015
    Assignee: Applied Microstructures, Inc.
    Inventors: Jeffrey D. Chinn, Boris Kobrin, Romuald Nowak
  • Publication number: 20150076645
    Abstract: Phosphate-based glass doped with copper ions having infrared blocking filter characteristics is formed into particles and is mixed with a transparent encapsulating resin to encapsulate a semiconductor element. The glass particles have a particle diameter four times or more as large as a wavelength of infrared radiation to be blocked. An optical semiconductor device can be obtained having a stable filter characteristics thereof even if an incident light angle changes and is resistant to moisture.
    Type: Application
    Filed: September 15, 2014
    Publication date: March 19, 2015
    Inventors: Hiroyuki FUJITA, Sadao OKU, Koji TSUKAGOSHI, Keiichiro HAYASHI
  • Patent number: 8980673
    Abstract: Provided are a solar cell and a method of manufacturing the same. The method of manufacturing the solar cell includes stacking a solar cell device layer containing GaN on a sacrificial substrate, etching the solar cell device layer to expose the sacrificial substrate, thereby forming one or more solar cell devices comprising the solar cell device layer, anisotropically etching the exposed sacrificial substrate, contacting the solar cell devices to a stamping processor to remove the solar cell devices from the sacrificial substrate, and transferring the solar cell devices onto a receiving substrate. A high temperature semiconductor process may be performed on a substrate such as a silicon substrate to transfer the solar cell devices onto the substrate, thereby manufacturing flexible solar cells. Also, a large number of solar cells may be excellently aligned on a large area. In addition, economical solar cells may be manufactured.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: March 17, 2015
    Assignees: LG Siltron Incorporated, Korea Advanced Institute of Science
    Inventors: Keon Jae Lee, Sang Yong Lee, Seung Jun Kim
  • Patent number: 8981387
    Abstract: A light emitting diode assembly includes a base, a light emitting chip mounted on the base, an elastic lens covering the light emitting chip, two rotation members rotatably arranged on the base, and two stopper poles fixed on the base. The two rotation members are capable of driving the elastic lens to rotate with respect to the two stopper poles. The stopper poles compress the elastic lens to cause the elastic lens to deform resiliently when the elastic lens is rotated by the rotation members to engage with the stopper poles.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: March 17, 2015
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Hou-Te Lin, Chao-Hsiung Chang
  • Patent number: 8981206
    Abstract: A photovoltaic cell including: (a) a housing including an at least partially transparent cell wall having an interior surface; (b) an electrolyte, containing an iodide based species; (c) a transparent electrically conductive coating disposed on the interior surface; (d) an anode disposed on the conductive coating, the anode including: (i) a porous film containing titania, the porous film adapted to make intimate contact with the iodide based species, and (ii) a dye, absorbed on a surface of the porous film, the dye and the porous film adapted to convert photons to electrons; (e) a cathode disposed on an interior surface of the housing; (f) electrically-conductive metallic wires, disposed within the cell, and electrically contacting the anode and the coating, and (g) a second electrically conductive coating including an inorganic binder and an inorganic electrically conductive filler, the second coating bridging between each of the wires and the transparent coating.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: March 17, 2015
    Assignee: 3GSolar Photovoltaics Ltd.
    Inventor: Jonathan Goldstein
  • Patent number: 8980674
    Abstract: Provided is a semiconductor image sensor device. The image sensor device includes a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon nitride. The image sensor device includes a metal shield formed on the compressively-stressed layer. The metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a second compressively-stressed layer formed on the metal shield and the first compressively-stressed layer. The second compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the second compressively-stressed layer.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: March 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Weng, Hsun-Ying Huang, Yung-Cheng Chang, Jin-Hong Cho
  • Publication number: 20150072451
    Abstract: A method for producing an electronic component and an electronic component, having barrier layers for the encapsulation of the component. The method involves providing a substrate (1) with at least one functional layer (22), and an electronic component, applying at least one first barrier layer (3) on the functional layer (22) by way of plasmaless atomic layer deposition (PLALD), and applying at least one second barrier layer (4) on the functional layer (22) by way of plasma-enhanced chemical v0apor deposition (PECVD).
    Type: Application
    Filed: November 13, 2014
    Publication date: March 12, 2015
    Inventors: Christian Schmid, Tilman Schlenker, Heribert Zull, Ralph Paetzold, Markus Klein, Karsten Heuser
  • Publication number: 20150072452
    Abstract: One or more masks may be used to control the application of protective (e.g., moisture-resistant, etc.) coatings to one or more portions of various components of an electronic device during assembly of the electronic device. A method for applying a protective coating to an electronic device includes assembling two or more components of the electronic device with one another. A mask may then be applied to the resulting electronic assembly. The mask may shield selected portions of the electronic assembly, while other portions of the electronic assembly, i.e., those to which a protective coating is to be applied, may remain exposed through the mask. With the mask in place, application of a protective coating to portions of the electronic assembly exposed through the mask may commence. After application of the protective coating, the mask may be removed from the electronic assembly. Embodiments of masked electronic assemblies are also disclosed.
    Type: Application
    Filed: November 14, 2014
    Publication date: March 12, 2015
    Inventors: Blake Stevens, Max Sorenson, Sidney Edward Martin, III
  • Publication number: 20150068582
    Abstract: A foldable, portable, lightweight photovoltaic module has a carrier layer divided into equal sections separated by hinge spaces, a substrate layer on the carrier layer, and a photovoltaic cell layer on the substrate layer, wherein the hinge spaces each have a free space between opposing edges of the adjacent sections to enable them to be folded in accordion-like fashion for storage. The carrier layer may be made of rip-stop fabric and preferably supports 6 sections each with 6 PV cells of crystalline silicon of up to about 22% conversion efficiency. The module has a power output of about 122 watts at 24 volts, and weighs about 7.4 pounds (3.36 kg), with a power-to-size ratio of 14 watts/sft or more, and a power-to-weight ratio of 16.5 watts/pound or more. An improved method of lamination applies heat and pressure on upper and lower sides of the laminate layers through upper and lower chambers with respective pressure bladders and heaters that are independently controllable.
    Type: Application
    Filed: November 13, 2014
    Publication date: March 12, 2015
    Applicant: ENRG SOLUTIONS INTERNATIONAL, LLC
    Inventor: James A. Chaney
  • Patent number: 8975694
    Abstract: A semiconductor device includes a semiconductor substrate with doped regions of a first type and doped regions of a second type. A first metallization layer connects to the doped regions of the first type through conductive paths, such that current is able to flow within the metallization layer along a plurality of linear axes. A second metallization layer connects to the doped regions of the second type through conductive paths, such that that current is able to flow within the metallization layer along a plurality of linear axes. Contacts on an exterior surface of the semiconductor device can be arranged concentrically.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 10, 2015
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Sergey Luzanov
  • Patent number: 8976291
    Abstract: An image sensor module includes a ceramic substrate, an image sensor, and a filter. The ceramic substrate defines a light transmitting hole and a receiving recess communicating with the light transmitting hole. The image sensor is received in the receiving recess. The filter is positioned on the ceramic substrate.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: March 10, 2015
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Shin-Wen Chen
  • Publication number: 20150064832
    Abstract: A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
    Type: Application
    Filed: November 3, 2014
    Publication date: March 5, 2015
    Inventors: Meng-Hsun Wan, Yi-Shin Chu, Szu-Ying Chen, Pao-Tung Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Publication number: 20150064831
    Abstract: A solar cell module is manufactured by encapsulating a solar cell matrix comprising a plurality of electrically connected solar cell components between a transparent panel and a backsheet with a resin. The method involves (i) embossing opposite surfaces of a green silicone rubber sheet, (ii) arranging a transparent panel (13a), silicone rubber sheet (11), solar cell matrix (14), silicone rubber sheet (11), and backsheet (13b) to form a multilayer assembly, and (iii) heating and compressing the assembly for vacuum lamination for establishing a seal around the solar cell matrix.
    Type: Application
    Filed: August 18, 2014
    Publication date: March 5, 2015
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tomoyoshi Furihata, Hiroto Ohwada, Junichi Tsukada, Atsuo Ito, Atsushi Yaginuma, Naoki Yamakawa, Minoru Igarashi
  • Patent number: 8969120
    Abstract: A two-stage packaging method of image sensors is disclosed. The packaging method includes the following steps: providing a substrate, fixing an image sensor chip on the substrate, fixing a transparent board on the image sensor chip, electrically connecting the image sensor chip and the substrate, forming a first encapsulant lay, and forming a second encapsulant layer. The two-stage packaging method prevents excessive pressure from being generated by formation of the encapsulant layers during the image sensor packaging process. Such excessive pressure, if generated, may result in position shift of the image sensor chip or damage of the bonding wires. The two-stage packaging method can increase the yield of the image sensor packaging process as well as the sensitivity of image sensors, thereby improving the quality and production of image sensor packaging while lowering the manufacturing costs.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: March 3, 2015
    Assignee: Kingpak Technology Inc.
    Inventors: Chun-Lung Huang, Hsiu-Wen Tu, Cheng-Chang Wu, Chung-Yu Yang, Rong-Chang Wang, Jo-Wei Yang
  • Publication number: 20150056737
    Abstract: A device includes a metal pad at a surface of an image sensor chip, wherein the image sensor chip includes an image sensor. A stud bump is disposed over, and electrically connected to, the metal pad. The stud bump includes a bump region, and a tail region connected to the bump region. The tail region includes a metal wire portion substantially perpendicular to a top surface of the metal pad. The tail region is short enough to support itself against gravity.
    Type: Application
    Filed: October 31, 2014
    Publication date: February 26, 2015
    Inventors: Chen-Hua Yu, Yung Ching Chen, Chien-Hsun Lee, Mirng-Ji Lii
  • Publication number: 20150056736
    Abstract: In various embodiments, photovoltaic modules are hermetically sealed by providing a first glass sheet, a photovoltaic device disposed on the first glass sheet, and a second glass sheet, a gap being defined between the first and second glass sheets, disposing a glass powder within the gap, and heating the powder to seal the glass sheets.
    Type: Application
    Filed: August 12, 2014
    Publication date: February 26, 2015
    Inventor: Markus Eberhard Beck
  • Publication number: 20150054109
    Abstract: A wafer level packaging structure for image sensors and a wafer level packaging method for image sensors are provided. The wafer level packaging structure includes: a wafer to be packaged including multiple chip regions and scribe line regions between the chip regions; pads and image sensing regions located on a first surface of the wafer and located in the chip regions; first dike structures covering surfaces of the pads and the scribe line regions; a packaging cover arranged facing the first surface of the wafer; and second dike structures located on a surface of the packaging cover. The second dike structures are arranged corresponding to the scribe line regions. The packaging cover and the wafer are jointed fixedly via the second dike structures and the first dike structures.
    Type: Application
    Filed: August 1, 2014
    Publication date: February 26, 2015
    Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
  • Patent number: 8962370
    Abstract: A radiation detector includes a sensor substrate and a scintillator layer. The sensor substrate is configured to be capable of performing photoelectric conversion. The scintillator layer includes a first area and a second area, the first area including an activator, the second area including the activator with a concentration lower than the concentration of the activator in the first area, the scintillator layer being provided on the sensor substrate so that the first area and the second area are arranged in a thickness direction of the scintillator layer and the first area is arranged from an end portion on a side of the sensor substrate in the scintillator layer in the thickness direction.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: February 24, 2015
    Assignee: Sony Corporation
    Inventors: Mitsuhiro Kawanishi, Ikumi Kusayama, Takahiro Igarashi
  • Publication number: 20150050759
    Abstract: In manufacturing a submount, a first electrode layer (12) is formed as a layer on the surface of a submount substrate (11); a side surface (122) of the first electrode layer (12) is formed on substantially the same plane as a side surface (112) of the submount substrate (11); and the side surface (122) of the first electrode layer (12) is a connection surface for creating an electrical connection with the first electrode layer (12). By making the first electrode layer (12) sufficiently thick, the surface area of the side surface (122) can be made sufficiently large to allow, for example, wire bonding using the side surface (122). Further, components such as an optical element (14) can be protected by a sealing material (16).
    Type: Application
    Filed: September 5, 2014
    Publication date: February 19, 2015
    Applicant: Advanced Photonics, Inc.
    Inventors: Xueliang Song, Foo Cheong Yit, Katsumasa Horiguchi, Shurong Wang
  • Publication number: 20150050770
    Abstract: The object is to provide a photoelectric surface member which allows higher quantum efficiency. In order to achieve this object, a photoelectric surface member 1a is a crystalline layer formed by a nitride type semiconductor material, and comprises a nitride semiconductor crystal layer 10 where the direction from the first surface 101 to the second surface 102 is the negative c polar direction of the crystal, an adhesive layer 12 formed along the first surface 101 of the nitride semiconductor crystal layer 10, and a glass substrate 14 which is adhesively fixed to the adhesive layer 12 such that the adhesive layer 12 is located between the glass substrate 14 and the nitride semiconductor crystal layer 10.
    Type: Application
    Filed: October 31, 2014
    Publication date: February 19, 2015
    Inventors: Tokuaki NIHASHI, Masatomo SUMIYA, Minoru HAGINO, Shunro FUKE
  • Publication number: 20150047695
    Abstract: The invention is to facilitate the attachment of an installation system in the production of a solar module. This is achieved via a process which comprises the following steps: a) mutual superposition of the layers that the structure of the solar module requires, where at least one heat-activatable double-sided adhesive tape is placed on the external side of the reverse-side layer and at least one retention plate is placed on said adhesive tape; b) mutual lamination of the layers mutually superposed in step a), at least with exposure to heat.
    Type: Application
    Filed: August 13, 2013
    Publication date: February 19, 2015
    Inventors: Michael SCHWERTFEGER, Andreas STEIN
  • Publication number: 20150048374
    Abstract: A light sensor and a manufacturing method thereof are disclosed. The light sensor is capable of being coupled to a carry object and includes a sensing chip and a plurality of conductive connecting elements. The sensing chip includes a first surface and a second surface opposite to each other. The sensing chip also includes a sensing unit disposed between the first surface and the second surface and at least partially exposed by a window formed on the second surface. The first surface faces the carry object when the light sensor is coupled to a carry object. The conductive connecting elements are disposed on the first surface and coupled to the sensing unit in order to couple the light sensor to the carry object.
    Type: Application
    Filed: June 16, 2014
    Publication date: February 19, 2015
    Inventor: Ping-Yuan Lin
  • Patent number: 8956914
    Abstract: An integrated circuit package system comprising: forming a substrate having a solder mask with a support structure formed from the solder mask; mounting a first integrated circuit device over the support structure; connecting the substrate and the first integrated circuit device; and encapsulating the first integrated circuit device and the support structure.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: February 17, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventors: Ja Eun Yun, Jong Wook Ju
  • Patent number: 8955219
    Abstract: The invention relates to a method for fabricating a bond by providing a body including a metallic surface provided with an inorganic, dielectric protective layer. The protective layer covers at least one surface zone of the metallic surface in which the metallic surface is to be electrically conductive bonded to a contact conductor. To fabricate the bond, a portion of a provided contact conductor above the surface zone is pressed on to the protective layer and the body so that the protective layer is destroyed above the surface zone in achieving an electrically conductive bond between the metallic surface and the contact conductor.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: February 17, 2015
    Assignee: Infineon Technologies AG
    Inventors: Roman Roth, Dirk Siepe
  • Publication number: 20150040981
    Abstract: The present disclosure generally relates to durable photovoltaic modules, methods of making durable photovoltaic modules, and constructions including durable photovoltaic cells and modules.
    Type: Application
    Filed: February 13, 2013
    Publication date: February 12, 2015
    Inventors: Scott R. Meyer, Mark K. Nestegard
  • Patent number: 8953088
    Abstract: A camera module including an image sensor and a circuit substrate that are each attached to a bottom surface of a glass substrate. The image sensor is positioned between the circuit substrate and the glass substrate. This arrangement allows passive components normally associated with the image sensor to be mounted to a top surface of the glass substrate rather than to the image sensor, thus reducing the necessary size of the top surface of the image sensor, which in turn can reduce the overall size of the image sensor. A lens assembly, including a housing and a lens, is attached to the circuit substrate to position the image sensor and the glass substrate within a cavity provided in the housing.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: February 10, 2015
    Inventors: Prebesh Pavithran, Yeow Thiam Ooi, Khen Ming Goh, Kumareson Darmalingam
  • Patent number: 8946797
    Abstract: There is provided a solid-state imaging device including a sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion section is provided and a sensor-side wiring layer provided on an opposite surface side from a light receiving surface of the sensor-side semiconductor layer, a circuit substrate having a circuit-side semiconductor layer and a circuit-side wiring layer and provided on a side of the sensor-side wiring layer of the sensor substrate, a connection unit region in which a connection section is provided, the connection section having a first through electrode, a second through electrode, and a connection electrode connecting the first through electrode and the second through electrode, and an insulating layer having a step portion which has the connection electrode embedded therein and has a film thickness that gradually decreases from the connection unit region to the pixel region.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: February 3, 2015
    Assignee: Sony Corporation
    Inventors: Kyohei Mizuta, Osamu Oka, Kaoru Koike, Nobutoshi Fujii, Hideki Kobayashi, Hirotaka Yoshioka
  • Patent number: 8946743
    Abstract: Disclosed is a light emitting apparatus. The light emitting apparatus includes a package body; first and second electrodes; a light emitting device electrically connected to the first and second electrodes and including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first and second conductive semiconductor layers; and a lens supported on the package body and at least a part of the lens including a reflective structure. The package body includes a first cavity, one ends of the first and second electrodes are exposed in the first cavity and other ends of the first and second electrodes are exposed at lateral sides of the package body, and a second cavity is formed at a predetermined portion of the first electrode exposed in the first cavity.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: February 3, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Bong Kul Min
  • Publication number: 20150021479
    Abstract: A bolometer and a preparation method thereof. The bolometer includes: an infrared detection element (1) and a readout circuit (2), wherein the infrared detection element (1) is formed on one side of a first substrate (100), and an edge of the infrared detection element (1) is provided with an electrode hole (9), and the readout circuit (2) is formed on one side of a second substrate (200) and the readout circuit (2) has an electrode, the first substrate (100) is formed thereon with a silicon via (8) passing through the first substrate (100) and filed with a conductive material, the electrode hole (9) of the infrared detection element (1) is electrically connected to the electrode of the readout circuit (2) via the conductive material filled in the silicon via (8).
    Type: Application
    Filed: July 25, 2012
    Publication date: January 22, 2015
    Inventors: Jian Cai, Qian Wang, Ziyu Liu, Yang Hu
  • Patent number: 8937362
    Abstract: An image pickup apparatus includes a semiconductor chip including a light receiving section, a frame-like spacer arranged on the semiconductor chip to surround the light receiving section, a transparent flat plate section arranged on the semiconductor chip via the spacer and having a plan view dimension larger than a plan view dimension of the spacer and smaller than a plan view dimension of the semiconductor chip, and a reinforcing member for filling a gap between the semiconductor chip and the transparent flat plate section on the outer side of the spacer and having a plan view dimension larger than the plan view dimension of the transparent flat plate section and smaller than the plan view dimension of the semiconductor chip.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: January 20, 2015
    Assignee: Olympus Corporation
    Inventor: Takatoshi Igarashi
  • Patent number: 8933524
    Abstract: The present invention provides a sealing material for a solar cell that seals a solar cell element of a solar cell in a short time in the production of a solar cell module, thereby enabling efficient production of solar cell modules. The sealing material for a solar cell of the present invention has a feature of containing 100 parts by weight of a modified butene-based resin that is produced by graft-modifying a butene-ethylene copolymer having a butene content of 1 to 25% by weight with maleic anhydride and has a total content of the maleic anhydride of 0.1 to 3% by weight, and 0.1 to 15 parts by weight of a silane compound having an epoxy group.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: January 13, 2015
    Assignee: Sekisui Chemical Co., Ltd.
    Inventors: Hiroshi Hiraike, Masahiro Asuka, Masahiro Ishii, Jiamo Guo, Kiyomi Uenomachi, Takahiko Sawada, Takahiro Nomura
  • Publication number: 20150007884
    Abstract: A photovoltaic module includes an encapsulated photovoltaic element and an infrared-transmissive decorative overlay simulating conventional roofing.
    Type: Application
    Filed: September 10, 2014
    Publication date: January 8, 2015
    Inventors: Husnu M. Kalkanoglu, Gregory F. Jacobs, Ming Liang Shiao
  • Publication number: 20150007874
    Abstract: A back-contact solar cell module, comprising: silicon wafer having a sunlight receiving surface and a rear surface, wherein n+ region and p+ region are formed on the rear surface; an n+ electrode formed on the n+ region of the silicon wafer; a p+ electrode formed on the p+ region of the silicon wafer; a printed wiring board comprising a substrate, a cathode and an anode, being placed in a way that the anode and the cathode are in contact with the n+ electrode and the p+ electrode respectively; wherein at least one of the n+ electrode and the p+ electrode, prior to firing, comprises a conductive composition comprising 11.0-39.9 wt % of silver particles, 10.0-40.0 wt % of glass frit, and 0.5-20.0 wt % of palladium particles, based on total weight of the composition.
    Type: Application
    Filed: July 2, 2013
    Publication date: January 8, 2015
    Inventors: ISAO HAYASHI, HIDEKI AKIMOTO
  • Publication number: 20150008555
    Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.
    Type: Application
    Filed: June 30, 2014
    Publication date: January 8, 2015
    Inventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba
  • Patent number: 8927318
    Abstract: A method cleaving a semiconductor material that includes providing a germanium substrate having a germanium and tin alloy layer is present therein. A stressor layer is deposited on a surface of the germanium substrate. A stress from the stressor layer is applied to the germanium substrate, in which the stress cleaves the germanium substrate to provide a cleaved surface. The cleaved surface of the germanium substrate is then selective to the germanium and tin alloy layer of the germanium substrate. In another embodiment, the germanium and tin alloy layer may function as a fracture plane during a spalling method.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Devendra K. Sadana, Davood Shahrjerdi
  • Patent number: 8927319
    Abstract: There is disclosed methods of making photosensitive devices, such as flexible photovoltaic (PV) devices, through the use of epitaxial liftoff. Also described herein are methods of preparing flexible PV devices comprising a structure having a growth substrate, wherein the selective etching of protective layers yields a smooth growth substrate that us suitable for reuse.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: January 6, 2015
    Assignee: The Regents of the University of Michigan
    Inventors: Stephen R. Forrest, Jeramy Zimmerman, Kyusang Lee, Kuen-Ting Shiu
  • Patent number: 8927851
    Abstract: Disclosed is a solar cell module that includes: a plurality of solar cells connected with one another in such a manner that electrodes formed on surfaces of neighboring solar cells are connected with each other through a wiring member. A portion of the wiring member bites the electrodes, and the solar cells and the wiring member are bonded to each other by a resin.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: January 6, 2015
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Toshiyuki Sakuma, Haruhisa Hashimoto, Satoshi Tohoda