With Substrate Handling (e.g., Conveying, Etc.) Patents (Class 438/716)
-
Patent number: 11476097Abstract: An apparatus, methods and controllers for electrostatically chucking varied substrate materials are disclosed. Some embodiments of the disclosure provide electrostatic chucks with variable polarity and/or voltage. Some embodiments of the disclosure provide electrostatic chucks able to operate as monopolar and bipolar electrostatic chucks. Some embodiments of the disclosure provide bipolar electrostatic chucks able to compensate for substrate bias and produce approximately equal chucking force at different electrodes.Type: GrantFiled: September 4, 2020Date of Patent: October 18, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Vinodh Ramachandran, Ananthkrishna Jupudi, Sarath Babu
-
Patent number: 11107681Abstract: A method of fabricating a semiconductor device and a semiconductor processing apparatus are provided. The method of fabricating a semiconductor device comprises preparing a semiconductor substrate having a front side and a back side, opposing each other, and forming a material layer on the semiconductor substrate. The material layer is formed on at least a portion of the back side of the semiconductor substrate while being formed on the front side of the semiconductor substrate. The material layer formed on the at least a portion of the back side of the semiconductor substrate is removed, while the material layer formed on the front side of the semiconductor substrate remains. A semiconductor process is performed to fabricate the semiconductor device using the material layer remaining on the front side of the semiconductor substrate.Type: GrantFiled: September 20, 2019Date of Patent: August 31, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ji Youn Seo, Ji Woon Im, Dai Hong Kim, Ik Soo Kim, Sang Ho Rha
-
Patent number: 11018092Abstract: A semiconductor wafer has a base material with a first thickness and first and second surfaces. A wafer scribe mark is disposed on the first surface of the base material. A portion of an interior region of the second surface of the base material is removed to a second thickness less than the first thickness, while leaving an edge support ring of the base material of the first thickness and an asymmetric width around the semiconductor wafer. The second thickness of the base material is less than 75 micrometers. The wafer scribe mark is disposed within the edge support ring. The removed portion of the interior region of the second surface of the base material is vertically offset from the wafer scribe mark. A width of the edge support ring is wider to encompass the wafer scribe mark and narrower elsewhere around the semiconductor wafer.Type: GrantFiled: February 14, 2020Date of Patent: May 25, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Michael J. Seddon
-
Patent number: 10847341Abstract: A plasma processing apparatus includes a processing chamber, a first electrode and a second electrode disposed to face each other, a high frequency power supply unit for applying a high frequency power to either the first electrode or the second electrode, a processing gas supply unit for supplying a processing gas to a processing space, and a main dielectric member provided at a substrate mounting portion on a main surface of the first electrode. A focus ring is attached to the first electrode to cover a peripheral portion of the main surface of the first electrode and a peripheral dielectric member is provided in a peripheral portion on the main surface of the first electrode so that an electrostatic capacitance per unit area applied between the first electrode and the focus ring is smaller than that applied between the first electrode and the substrate by the main dielectric member.Type: GrantFiled: September 7, 2016Date of Patent: November 24, 2020Assignee: Tokyo Electron LimitedInventors: Chishio Koshimizu, Naoki Matsumoto, Satoshi Tanaka, Toru Ito
-
Patent number: 10727087Abstract: Disclosed is a substrate transporting device including a transport mechanism, a transport chamber, a first exhaust fan, and a controller. The transport mechanism is movable in parallel in a given direction. The transport chamber includes a first wall disposed on a first side of the given direction of the transport mechanism, and a plurality of transportation ports each used for moving the substrate between an exterior and an interior of the transport chamber. The first exhaust fan is disposed closer to the first wall than any of the transportation ports, and exhausts gas in the transport chamber outside the transport chamber. The controller performs control such that, when the transport mechanism moves toward the first wall in a first proximal area whose distance from the first wall is of a given value or less, an exhaust amount of the first exhaust fan is larger than that when the transport mechanism moves toward the first wall out of the first proximal area.Type: GrantFiled: October 11, 2018Date of Patent: July 28, 2020Assignee: SCREEN Holdings Co., Ltd.Inventor: Joji Kuwahara
-
Patent number: 10325778Abstract: A chemical material is deposited on a surface of a substrate. A mandrel composition is deposited on a surface of the chemical material. A mandrel hard mask pattern is deposited on a surface of the mandrel composition. The mandrel composition is etched. The mandrel hard mask pattern is removed. A plurality of spacer materials are deposited sequentially onto a surface of the chemical material and a surface of the mandrel composition. A portion of each of the plurality of spacer materials are removed sequentially. A remainder of the mandrel composition is removed. The substrate is etched. The chemical material and at least one of the spacer materials of the plurality of spacer materials are removed.Type: GrantFiled: November 1, 2017Date of Patent: June 18, 2019Assignee: International Business Machines CorporationInventors: Lawrence A. Clevenger, John H. Zhang, Carl Radens
-
Patent number: 10262563Abstract: This application provides a LED display by utilizing flexible wires and the locations of the conductive pins on the bottom side of each single color LEDs or full color LEDs to make each of the single color LEDs or full color LEDs mount on each pixel defined by the flexible wires formed on a transparent substrate, and this LED display is characterized in separating the wires crossing with each other by a so-called bridge technology and utilizing a single-layered substrate to save costs of processes and materials.Type: GrantFiled: November 21, 2017Date of Patent: April 16, 2019Assignee: CHENG-CHANG TRANSFLEX DISPLAY CORP.Inventors: Hui-Lan Tso, Wen-Chang Fan
-
Patent number: 10141162Abstract: Linear coils, a first ceramic block, and a second ceramic block are arranged in an inductively-coupled plasma torch. A chamber has an annular shape. Plasma generated inside the chamber is ejected to a substrate through an opening portion in the chamber. The substrate is processed by relatively moving the chamber and the substrate in a direction perpendicular to a longitudinal direction of the opening portion. The coil is arranged inside a rotating cylindrical ceramic pipe. Accordingly, the plasma can be generated with excellent power efficiency, and fast plasma processing can be performed.Type: GrantFiled: July 11, 2017Date of Patent: November 27, 2018Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tomohiro Okumura, Satoshi Suemasu
-
Patent number: 10134609Abstract: Disclosed is a substrate transporting device including a transport mechanism, a transport chamber, a first exhaust fan, and a controller. The transport mechanism is movable in parallel in a given direction. The transport chamber includes a first wall disposed on a first side of the given direction of the transport mechanism, and a plurality of transportation ports each used for moving the substrate between an exterior and an interior of the transport chamber. The first exhaust fan is disposed closer to the first wall than any of the transportation ports, and exhausts gas in the transport chamber outside the transport chamber. The controller performs control such that, when the transport mechanism moves toward the first wall in a first proximal area whose distance from the first wall is of a given value or less, an exhaust amount of the first exhaust fan is larger than that when the transport mechanism moves toward the first wall out of the first proximal area.Type: GrantFiled: March 22, 2016Date of Patent: November 20, 2018Assignee: SCREEN Holdings Co., Ltd.Inventor: Joji Kuwahara
-
Patent number: 10056273Abstract: A heating apparatus includes a heater, an electron reflection plate, a filament arranged between the heater and the electron reflection plate, a heating power supply configured to supply an AC voltage between a first terminal and a second terminal of the filament to emit thermoelectrons from the filament, an acceleration power supply configured to supply an acceleration voltage between the filament and the heater, and a resistor arranged so as to form a path which connects the electron reflection plate and the heating power supply.Type: GrantFiled: September 6, 2017Date of Patent: August 21, 2018Assignee: Canon Anelva CorporationInventors: Masao Sasaki, Kazutoshi Yoshibayashi, Kenji Sato, Kenzou Murata
-
Patent number: 9741538Abstract: Linear coils, a first ceramic block, and a second ceramic block are arranged in an inductively-coupled plasma torch. A chamber has an annular shape. Plasma generated inside the chamber is ejected to a substrate through an opening portion in the chamber. The substrate is processed by relatively moving the chamber and the substrate in a direction perpendicular to a longitudinal direction of the opening portion. The coil is arranged inside a rotating cylindrical ceramic pipe. Accordingly, the plasma can be generated with excellent power efficiency, and fast plasma processing can be performed.Type: GrantFiled: March 18, 2016Date of Patent: August 22, 2017Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tomohiro Okumura, Satoshi Suemasu
-
Patent number: 9666467Abstract: A detachable high-temperature electrostatic chuck assembly including a chuck body for supporting a substrate, an interface plate coupled to the chuck body by a sealing ring, the sealing ring defining a pocket between the chuck body and the interface plate that is sealed from a surrounding vacuum environment, and a cooling plate disposed between the chuck body and the interface plate. An interface between the chuck body and the cooling plate is located within the pocket.Type: GrantFiled: November 21, 2014Date of Patent: May 30, 2017Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventor: Vijay D. Parkhe
-
Patent number: 9638376Abstract: A susceptor includes a first body including a plurality of first holes and a second body including a plurality of second holes. According to one arrangement, the second body is spaced from the first body to form a gap which allows a gas to pass from the second holes to the first holes. According to this or another arrangement, the first body is removably or rotatably coupled to the second body, or both. Rotation of the second body by a first amount or in a first direction brings at least one first hole in alignment with at least one second hole. And, rotation of the second body by a second amount or in a second direction causes a misalignment to occur between these holes.Type: GrantFiled: August 24, 2012Date of Patent: May 2, 2017Assignee: LG Siltron Inc.Inventors: Ju Jin Kang, Young Su Ku
-
Patent number: 9518326Abstract: In one embodiment, a method for forming an electrostatic chuck includes forming vias in a ceramic plate and printing a metal paste in the vias and curing the ceramic plate. The method includes printing the metal paste on a front surface of the ceramic plate and curing the ceramic plate, and printing the metal paste on a bottom surface of the ceramic plate and curing the ceramic plate to form one or more contact pads. The method also includes printing a dielectric film on the front surface of the ceramic plate and curing the ceramic plate. The method may further include printing one or more heating elements on a bottom surface of the ceramic plate and curing the ceramic plate, printing the dielectric film on the bottom, and bonding the ceramic plate to a backing plate.Type: GrantFiled: October 21, 2013Date of Patent: December 13, 2016Assignee: APPLIED MATERIALS, INC.Inventor: Karl M. Brown
-
Patent number: 9129902Abstract: A method for etching features with a continuous plasma is provided. A first plasma process is provided, comprising providing a flow of a first process gas into a process chamber, maintaining the continuous plasma, and stopping the flow of the first process gas into the process chamber. A transition process is provided, comprising providing a flow of a transition gas into the process chamber, maintaining the continuous plasma, and stopping the flow of the transition gas into the process chamber. A second plasma process is provided, comprising providing a flow of a second process gas into the process chamber, maintaining the continuous plasma, and stopping the second process gas into the process chamber.Type: GrantFiled: May 1, 2013Date of Patent: September 8, 2015Assignee: Lam Research CorporationInventors: Wonchul Lee, Qian Fu
-
Patent number: 9082807Abstract: A lid opening and closing device includes a table configured to mount a carrier thereon with a front surface of a carrier lid configured to face toward a conveying gateway, a gas injecting hole provided in an opposing surface portion and configured to supply a purge gas used in removing particles adhering to the carrier lid, an advancing/retreating mechanism configured to move the carrier placed on the table toward and away from the opposing surface portion, and a control unit configured to output a control signal such that a purge gas is supplied from the gas injecting hole to the carrier lid, wherein the carrier is positioned such that the distance between the opposing surface portion and the carrier lid is 5 mm or less and the carrier lid and the opposing surface portion are spaced apart from each other, and the carrier lid is subsequently removed from the carrier.Type: GrantFiled: March 21, 2012Date of Patent: July 14, 2015Assignee: TOKYO ELECTRON LIMITEDInventor: Yudo Sugawara
-
Patent number: 9070760Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a clamping electrode for electrostatically clamping the work piece to the work piece support; providing a mechanical partition between the plasma source and the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.Type: GrantFiled: March 6, 2013Date of Patent: June 30, 2015Assignee: Plasma-Therm LLCInventors: Linnell Martinez, David Pays-Volard, Chris Johnson, David Johnson, Russell Westerman, Gordon M. Grivna
-
Patent number: 9029267Abstract: A method for controlling thermal cycling of a faraday shield in a plasma process chamber is provided. The method includes: performing a first plasma processing operation on a first wafer in the plasma process chamber; terminating the first plasma processing operation; performing a first wafer transfer operation to transfer the first wafer out of the chamber; and, during the first wafer transfer operation, applying power to a TCP coil under a plasma limiting condition.Type: GrantFiled: May 16, 2013Date of Patent: May 12, 2015Assignee: Lam Research CorporationInventors: Sanket Sant, Raphael Casaes
-
Patent number: 8993422Abstract: In accordance with an embodiment of the present invention, a process tool includes a chuck configured to hold a substrate. The chuck is disposed in a chamber. The process tool further includes a shielding unit with a central opening. The shielding unit is disposed in the chamber over the chuck.Type: GrantFiled: November 6, 2012Date of Patent: March 31, 2015Assignee: Infineon Technologies AGInventor: Manfred Engelhardt
-
Patent number: 8980764Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.Type: GrantFiled: February 11, 2013Date of Patent: March 17, 2015Assignee: Plasma-Therm LLCInventors: Linnell Martinez, David Pays-Volard, Chris Johnson, David Johnson, Russell Westerman, Gordon M. Grivna
-
Publication number: 20150064923Abstract: A plasma processing device includes a processing chamber defining a plasma processing space and a stage for mounting thereon a target substrate in the processing chamber. The plasma processing device further includes a gas supply mechanism for introducing a processing gas into the plasma processing space, a plasma generation mechanism for supplying electromagnetic energy into the plasma processing space, and a control unit configured to, if a command to start a plasma process for the target substrate mounted on a substrate carry-in stage is issued, perform a warm-up process for supplying the processing gas into the plasma processing space by the gas supply mechanism and supplying the electromagnetic energy by the plasma generation mechanism in a state where no target substrate is mounted on the stage.Type: ApplicationFiled: May 21, 2013Publication date: March 5, 2015Applicant: TOKYO ELECTRON LIMITEDInventors: Naoki Matsumoto, Yugo Tomita
-
Patent number: 8946058Abstract: The present invention provides a method for plasma dicing a substrate, the method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing a work piece onto the work piece support, said work piece having a support film, a frame and the substrate; loading the work piece onto the work piece support; applying a tensional force to the support film; clamping the work piece to the work piece support; generating a plasma using the plasma source; and etching the work piece using the generated plasma.Type: GrantFiled: February 14, 2013Date of Patent: February 3, 2015Assignee: Plasma-Therm LLCInventors: Rich Gauldin, Chris Johnson, David Johnson, Linnell Martinez, David Pays-Volard, Russell Westerman, Gordon M. Grivna
-
Patent number: 8927435Abstract: A load lock includes a chamber including an upper portion, a lower portion, and a partition between the upper portion and the lower portion, the partition including an opening therethrough. The load lock further includes a first port in communication with the upper portion of the chamber and a second port in communication with the lower portion of the chamber. The load lock includes a rack disposed within the chamber and a workpiece holder mounted on a first surface of the rack, wherein the rack and the workpiece holder are movable by an indexer that is capable of selectively moving wafer slots of the rack into communication with the second port. The indexer can also move the rack into an uppermost position, at which the first surface of the boat and the partition sealingly separate the upper portion and the lower portion to define an upper chamber and a lower chamber. Auxiliary processing, such as wafer pre-cleaning, or metrology can be conducted in the upper portion.Type: GrantFiled: May 8, 2013Date of Patent: January 6, 2015Assignee: ASM America, Inc.Inventors: Ravinder K. Aggarwal, Jeroen Stoutjesdijk, Eric R. Hill, Loring G. Davis, John T. DiSanto
-
Patent number: 8901008Abstract: A substrate plasma-processing apparatus for plasma-processing a surface of an electrode of an organic light emitting device. The substrate plasma-processing apparatus may adjust the distance between a first electrode and a substrate and adjust the distance between a second electrode and the substrate.Type: GrantFiled: August 21, 2013Date of Patent: December 2, 2014Assignee: Samsung Display Co., Ltd.Inventors: Tae-Wook Kang, Ou-Hyen Kim, Chang-Soon Ji, Hyun-Lae Cho, Cheng-Guo An, Jeong-Yeol Lee, Jae-Mork Park
-
Publication number: 20140295672Abstract: A vacuum processing apparatus including an atmospheric transfer chamber including on a front side a plurality of cassette stages on which cassettes having stored samples as processing objects are to be mounted, a first transfer chamber which is disposed via a lock chamber on a back side of the atmospheric transfer chamber and to which a sample decompressed to first pressure is transferred, a second transfer chamber which is disposed on a back side of the first transfer chamber and to which the sample is transferred via a relay chamber from the first transfer chamber, a first processing vessel which is coupled to the first transfer chamber and in which the sample is transferred under the first pressure, and a second processing vessel which is coupled to the second transfer chamber and in which the sample is transferred under the second pressure.Type: ApplicationFiled: February 17, 2014Publication date: October 2, 2014Inventor: Susumu Tauchi
-
Publication number: 20140273481Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.Type: ApplicationFiled: April 7, 2014Publication date: September 18, 2014Applicant: APPLIED MATERIALS, INC.Inventors: Anchuan Wang, Xinglong Chen, Zihui Li, Hiroshi Hamana, Zhijun Chen, Ching-Mei Hsu, Jiayin Huang, Nitin K. Ingle, Dmitry Lubomirsky, Shankar Venkataraman, Randhir Thakur
-
Publication number: 20140273489Abstract: Systems, chambers, and processes are provided for controlling process defects caused by moisture contamination. The systems may provide configurations for chambers to perform multiple operations in a vacuum or controlled environment. The chambers may include configurations to provide additional processing capabilities in combination chamber designs. The methods may provide for the limiting, prevention, and correction of aging defects that may be caused as a result of etching processes performed by system tools.Type: ApplicationFiled: April 7, 2014Publication date: September 18, 2014Applicant: APPLIED MATERIALS, INC.Inventors: Anchuan Wang, Xinglong Chen, Zihui Li, Hiroshi Hamana, Zhijun Chen, Ching-Mei Hsu, Jiayin Huang, Nitin K. Ingle, Dmitry Lubomirsky, Shankar Venkataraman, Randhir Thakur
-
Patent number: 8815746Abstract: An apparatus and the use of such an apparatus and method for producing microcomponents with component structures are presented which are generated in a process chamber on a substrate according to the LIGA method for example and are stripped from the enclosing photoresist with the help of a cooled remote plasma source.Type: GrantFiled: August 30, 2012Date of Patent: August 26, 2014Assignee: R3T GmbH Rapid Reactive Radicals TechnologyInventor: Josef Mathuni
-
Publication number: 20140235063Abstract: An edge ring assembly is disclosed for use in a plasma processing chamber, which includes an RF conductive ring positioned on an annular surface of a base plate and configured to surround an upper portion of the baseplate and extend underneath an outer edge of a wafer positioned on the upper surface of the baseplate, and a wafer edge protection ring positioned above an upper surface of the RF conductive ring and configured to extend over the outer edge of the wafer. The protection ring has an inner edge portion with a uniform thickness, which extends over the outer edge of the wafer, a conical upper surface extending outward from the inner edge portion to a horizontal upper surface, an inner annular recess which is positioned on the upper surface of the RF conductive and configured to extend over the outer edge of the wafer.Type: ApplicationFiled: February 7, 2014Publication date: August 21, 2014Applicant: Lam Research CorporationInventors: Brian McMillin, Arthur Sato, Neil Benjamin
-
Patent number: 8785332Abstract: The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.Type: GrantFiled: February 11, 2013Date of Patent: July 22, 2014Assignee: Plasma-Therm LLCInventors: Chris Johnson, David Johnson, Linnell Martinez, David Pays-Volard, Rich Gauldin, Russell Westerman, Gordon M. Grivna
-
Publication number: 20140134829Abstract: In accordance with an embodiment of the present invention, a process tool includes a chuck configured to hold a substrate. The chuck is disposed in a chamber. The process tool further includes a shielding unit with a central opening. The shielding unit is disposed in the chamber over the chuck.Type: ApplicationFiled: November 9, 2012Publication date: May 15, 2014Applicant: INFINEON TECHNOLOGIES AGInventor: Manfred Engelhardt
-
Patent number: 8673166Abstract: In a plasma processing apparatus, thrust-up pins are elevated and a thrust-up force is detected when electrostatic attraction for a substrate by a substrate holding device is ceased after completion of plasma processing, the elevation of the thrust-up pins is ceased upon detection of a detection threshold, and a stepped elevating operation in which the elevation and stoppage of the thrust-up pins are repeated a plurality of times are thereafter commenced on condition that the detected thrust-up force falls to or below the detection threshold and that release of the substrate from a placement surface has not been completed. In the stepped elevating operation, operation timing of the thrust-up device is controlled so that the completion of the release of the substrate from the placement surface is detected when the thrust-up pins are stopped after being elevated and so that the stepped elevating operation is continued on condition that the release has not been completed.Type: GrantFiled: May 28, 2009Date of Patent: March 18, 2014Assignee: Panasonic CorporationInventors: Shogo Okita, Hiromi Asakura, Syouzou Watanabe, Toshihiro Wada, Mitsuhiro Okune, Mitsuru Hiroshima
-
Publication number: 20140073138Abstract: A method for plasma etching is provided, wherein a substrate pre-defining a plurality of to-be-etched segments is secured on a movable stage, and a spray area of plasma from a plasma gun is limited to get a spray-area-limited plasma. Then, at least one of the to-be-etched segments is positioned in an etch position in turn by a step and repeat manner, to make the to-be-etched segments in the etch position to be etched by the spray-area-limited plasma. A plasma etching apparatus is also provided, so that the uniformity of the plasma etching process may be controlled precisely to raise the etching uniformity.Type: ApplicationFiled: September 12, 2012Publication date: March 13, 2014Inventors: Ming-Yu HUANG, Min-Chi Hwang
-
Patent number: 8664123Abstract: There is provided a method for manufacturing a nitride semiconductor substrate, comprising: etching and flattening a surface of a nitride semiconductor substrate disposed facing a surface plate, by using the surface plate having a surface composed of any one of Ni, Ti, Cr, W, and Mo or nitride of any one of them, disposing the surface of the surface plate and a flattening surface of a nitride semiconductor substrate proximately so as to be faced each other, and supplying gas containing at least hydrogen and ammonia between the surface of the surface plate and the surface of the nitride semiconductor substrate, wherein the surface plate and the nitride semiconductor substrate facing each other are set in a high temperature state of 900° C. or more.Type: GrantFiled: June 6, 2012Date of Patent: March 4, 2014Assignee: Hitachi Cable, Ltd.Inventor: Hajime Fujikura
-
Patent number: 8658048Abstract: The present invention aims to prevent decreases in etching rate due to adhesion of an etched film to a substrate holder. A method of manufacturing a magnetic recording medium includes: forming a first film on a substrate holder not yet having a substrate mounted thereon; mounting a substrate on the substrate holder having the first film formed thereon, the substrate having a resist layer formed on a multilayer film including a magnetic film layer, the resist layer having a predetermined pattern; and processing the magnetic film layer into a shape based on the predetermined pattern by performing dry etching on the substrate. The first film is a film that is not etched as easily as the films in the multilayer film to be removed by the dry etching.Type: GrantFiled: October 31, 2011Date of Patent: February 25, 2014Assignee: Canon Anelva CorporationInventors: Kazuto Yamanaka, Shogo Hiramatsu
-
Publication number: 20140038418Abstract: A bevel etcher incorporating a vacuum chuck used for cleaning the bevel edge and for reducing the bending curvature of a semiconductor substrate. The bevel etcher includes a vacuum chuck and a plasma generation unit which energizes process gas into a plasma state. The vacuum chuck includes a chuck body and a support ring. The top surface of the chuck body and inner periphery of the support ring form a vacuum region enclosed by the bottom surface of a substrate mounted on the support ring. A vacuum pump evacuates the vacuum region during operation. The vacuum chuck is operative to hold the substrate in place by the pressure difference between the top and bottom surfaces of the substrate. The pressure difference also generates a bending force to reduce the bending curvature of the substrate.Type: ApplicationFiled: October 7, 2013Publication date: February 6, 2014Applicant: Lam Research CorporationInventors: Andrew D. Bailey, III, Alan M. Schoepp, Gregory Sexton, William S. Kennedy
-
Patent number: 8633115Abstract: Provided are methods of etching a substrate using atomic layer deposition apparatus. Atomic layer deposition apparatus including a gas distribution plate with a thermal element are discussed. The thermal element is capable of locally changing the temperature of a portion of the surface of the substrate to vaporize an etch layer deposited on the substrate.Type: GrantFiled: November 30, 2011Date of Patent: January 21, 2014Assignee: Applied Materials, Inc.Inventors: Mei Chang, Joseph Yudovsky
-
Publication number: 20140011356Abstract: A chuck, a system including a chuck and a method for making a semiconductor device are disclosed. In one embodiment the chuck includes a first conductive region configured to be capacitively coupled to a first RF power generator, a second conductive region configured to be capacitively coupled to a second RF power generator and an insulation region that electrically insulates the first conductive region from the second conductive region.Type: ApplicationFiled: July 6, 2012Publication date: January 9, 2014Applicant: INFINEON TECHNOLOGIES AGInventor: Manfred Engelhardt
-
Patent number: 8501499Abstract: The invention provides a method of processing a wafer using Ion Energy (IE)-related multilayer process sequences and Ion Energy Controlled Multi-Input/Multi-Output (IEC-MIMO) models and libraries that can include one or more measurement procedures, one or more IEC-etch sequences, and one or more Ion Energy Optimized (IEO) etch procedures. The IEC-MIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple IEC etch sequences. The multiple layers and/or the multiple IEC etch sequence can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using IEO etch procedures.Type: GrantFiled: March 28, 2011Date of Patent: August 6, 2013Assignee: Tokyo Electron LimitedInventors: Radha Sundararajan, Merritt Funk, Lee Chen, Barton Lane
-
Patent number: 8470692Abstract: The present invention discloses a method and a device for preparing a compound semiconductor film. The method comprises the steps of: providing a substrate above at least an evaporation source in a vacuum condition; heating a source material contained in the evaporation source so that the source material is vapor-deposited on the substrate; and taking out the substrate under protection of an inert gas. The substrate may be rotated around an axis of a plane where the evaporation source is positioned, and the substrate is tilted by a predetermined angle with respect to the plane. The compound semi-conductive film thus prepared has a uniform thickness with a larger area. The method provides a simplified process and enhanced efficiency.Type: GrantFiled: March 25, 2010Date of Patent: June 25, 2013Assignee: Byd Co., Ltd.Inventors: Beijun Zhong, Wenyu Cao, Yong Zhou, Zhanfeng Jiang
-
Publication number: 20130023128Abstract: There is provided a method for manufacturing a nitride semiconductor substrate, comprising: etching and flattening a surface of a nitride semiconductor substrate disposed facing a surface plate, by using the surface plate having a surface composed of any one of Ni, Ti, Cr, W, and Mo or nitride of any one of them, disposing the surface of the surface plate and a flattening surface of a nitride semiconductor substrate proximately so as to be faced each other, and supplying gas containing at least hydrogen and ammonia between the surface of the surface plate and the surface of the nitride semiconductor substrate, wherein the surface plate and the nitride semiconductor substrate facing each other are set in a high temperature state of 900° C. or more.Type: ApplicationFiled: June 6, 2012Publication date: January 24, 2013Applicant: HITACHI CABLE, LTD.Inventor: Hajime FUJIKURA
-
Patent number: 8309465Abstract: A system produces devices that include a semiconductor part and a non-semiconductor part. A front end is configured to receive a semiconductor part and to process the semiconductor part. A back end is configured to receive the processed semiconductor part and to assemble the processed semiconductor part and a non-semiconductor part into a device. A transfer device is configured to automatically handle the semiconductor part in the front end and to automatically transfer the processed semiconductor part to the back end.Type: GrantFiled: January 21, 2011Date of Patent: November 13, 2012Assignee: Infineon Technologies AGInventors: Oskar Neuhoff, Tobias Gamon, Norbert Martin Haueis, Dirk Pikorz, Michael Wolfgang Larisch, Franz Reithner
-
Patent number: 8298957Abstract: The present invention is a plasma etching method comprising: a cleaning step (a) in which a cleaning gas is supplied into a processing vessel and the cleaning gas is made plasma, so that a deposit adhering to an inside of the processing vessel is removed by means of the plasma; a film depositing step (b), succeeding the cleaning step (a), in which a film depositing gas containing carbon and fluorine is supplied into the processing vessel and the film depositing gas is made plasma, so that a film containing carbon and fluorine is deposited on the inside of the processing vessel by means of the plasma; an etching step (c), succeeding the film depositing step (b), in which a substrate is placed on a stage inside the processing vessel, and an etching gas is supplied into the processing vessel and the etching gas is made plasma, so that the substrate is etched by means of the plasma; and an unloading step (d), succeeding the etching step (c), in which the substrate is unloaded from the processing vessel; wherein,Type: GrantFiled: February 6, 2009Date of Patent: October 30, 2012Assignee: Tokyo Electron LimitedInventors: Yosuke Sakao, Kensuke Kamiutanai, Akitaka Shimizu
-
Method for the removal of doped surface layers on the back faces of crystalline silicon solar wafers
Patent number: 8211323Abstract: The invention relates to a method for the one-sided removal of a doped surface layer on rear sides of crystalline silicon solar wafers. In accordance with the object set, doped surface layers should be able to be removed from rear sides of such solar wafers in a cost-effective manner and with a handling which is gentle on the substrate. In addition, the front side should not be modified. In accordance with the invention, an etching gas is directed onto the rear side surface of silicon solar wafers with a plasma atmospheric pressure.Type: GrantFiled: June 14, 2006Date of Patent: July 3, 2012Assignees: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung E.V., Centrotherm Photovoltaics AGInventors: Moritz Heintze, Rainer Moeller, Harald Wanka, Elena Lopez, Volkmar Hopfe, Ines Dani, Milan Rosina -
Publication number: 20120156888Abstract: A slimming method includes transferring an object to be processed on which a patterned carbon-containing thin film is formed into a process chamber in an oxidation apparatus; and oxidizing and removing the surface of the carbon-containing thin film by an oxidizing gas while supplying moisture into the process chamber, to reduce widths of the protruded portions on the pattern of the carbon-containing thin film.Type: ApplicationFiled: December 19, 2011Publication date: June 21, 2012Applicant: TOKYO ELECTRON LIMITEDInventors: Jun SATO, Masayuki HASEGAWA
-
Patent number: 8202796Abstract: A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The polished surface of the silicon carbide substrate is then masked to define a predetermined location for at least one via that is opposite the device metal contact and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, the via is metallized.Type: GrantFiled: February 7, 2011Date of Patent: June 19, 2012Assignee: Cree, Inc.Inventors: Zoltan Ring, Scott Thomas Sheppard, Helmut Hagleitner
-
Patent number: 8183119Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: GrantFiled: March 15, 2010Date of Patent: May 22, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
-
Publication number: 20120115332Abstract: A method for processing a substrate includes etching a surface of the substrate using an etching chemistry in a plasma chamber, the etching configured to define one or more features on the surface of the substrate. The features have some etch polymer residues as a result of the etching. The etching is terminated. A dry flash chemistry is applied into the plasma chamber. The plasma chamber is powered for a period of time between about 5 seconds and about 10 seconds to perform a dry flash etch. During the dry flash etch, the chamber is set to a low pressure of between about 5 mTorr and about 40 mTorr. The dry flash etch acts to weaken adhesion of the etch polymer residues to the features. The substrate is moved from plasma chamber and into a wet clean chamber for cleaning which removes the etch polymer residues during fluid cleaning.Type: ApplicationFiled: January 19, 2012Publication date: May 10, 2012Applicant: LAM RESEARCH CORPORATIONInventors: Seokmin Yun, Mark Wilcoxson, Ji Zhu, Kevin Chuang, Hsiao Wei Chang, David Lou
-
Patent number: 8163611Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: GrantFiled: December 22, 2006Date of Patent: April 24, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
-
Patent number: 8158527Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.Type: GrantFiled: March 15, 2010Date of Patent: April 17, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa