Specific Surface Topography (e.g., Textured Surface, Etc.) Patents (Class 438/71)
  • Publication number: 20150037923
    Abstract: Processes increase light absorption into silicon wafers by selectively changing the reflective properties of the bottom portions of light trapping cavity features. Modification of light trapping features includes: deepening the bottom portion, increasing the curvature of the bottom portion, and roughening the bottom portion, all accomplished through etching. Modification may also be by the selective addition of material at the bottom of cavity features. Different types of features in the same wafers may be treated differently. Some may receive a treatment that improves light trapping while another is deliberately excluded from such treatment. Some may be deepened, some roughened, some both. No alignment is needed to achieve this selectively. The masking step achieves self-alignment to previously created light trapping features due to softening and deformation in place.
    Type: Application
    Filed: January 6, 2013
    Publication date: February 5, 2015
    Applicant: 1366 TECHNOLOGIES, INC.
    Inventors: Vladimir S. Tarasov, Ali Ersen, ERIC Stern, Jason M. Criscione, Emanuel M. Sachs
  • Patent number: 8945972
    Abstract: The invention relates to a layered system for producing a solar cell on a metal substrate and to a method of producing the layered system.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: February 3, 2015
    Assignee: Tata Steel Nederland Technology BV
    Inventors: Joost Willem Hendrik Van Krevel, Albertus Johannes Maria Wigchert, Ganesan Palaniswamy
  • Patent number: 8946737
    Abstract: A light emitting diode (LED) includes a substrate, a buffer layer and an epitaxial structure. The substrate has a first surface with a patterning structure formed thereon. The patterning structure includes a plurality of projections. The buffer layer is arranged on the first surface of the substrate. The epitaxial structure is arranged on the buffer layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer arranged on the buffer layer in sequence. The first semiconductor layer has a second surface attached to the active layer. A distance between a peak of each the projections and the second surface of the first semiconductor layer is ranged from 0.5 ?m to 2.5 ?m.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: February 3, 2015
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang, Chia-Hung Huang, Shun-Kuei Yang
  • Patent number: 8940572
    Abstract: A conductive contact pattern is formed on a surface of solar cell by forming a thin conductive layer over at least one lower layer of the solar cell, and ablating a majority of the thin conductive layer using a laser beam, thereby leaving behind the conductive contact pattern. The laser has a top-hat profile, enabling precision while scanning and ablating the thin layer across the surface. Heterocontact patterns are also similarly formed.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: January 27, 2015
    Assignee: Tetrasun, Inc.
    Inventor: Adrian Turner
  • Patent number: 8940573
    Abstract: A method of manufacturing a semiconductor light-receiving element includes: forming a semiconductor layer structure having a one-conductivity-type semiconductor layer having a first conduction type located on a side of light incidence, an opposite-conductivity-type semiconductor layer having a second conduction type opposite to the first conduction type, and a light-absorbing layer between the one-conductivity-type semiconductor layer and the opposite-conductivity type semiconductor layer, the opposite-conductivity-type semiconductor layer having a structure in which a first semiconductor layer comprised of a binary mixed crystal, a second semiconductor layer comprised of a three-or-more-element mixed crystal, and a third semiconductor layer comprised of a three-or-more-element mixed crystal having an energy gap smaller than that of the second semiconductor layer are laminated in this order from the light incidence side; forming a metal film that is in contact with the third semiconductor layer; and performin
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 27, 2015
    Assignee: Sumitomo Electric Device Innovations, Inc.
    Inventor: Yuji Koyama
  • Publication number: 20150020877
    Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects as well as Fabrication methods and structures for forming thin film back contact solar cells are described.
    Type: Application
    Filed: August 9, 2012
    Publication date: January 22, 2015
    Applicant: SOLEXEL, INC.
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, Virendra V. Rana, Sean Seutter, Anand Deshpande, Anthony Calcaterra, Gerry Olsen, Kamran Manteghi, Thom Stalcup, George D. Kamian, David Xuan-Qi Wang, Yen-Sheng Su, Michael Wingert
  • Publication number: 20150014802
    Abstract: A light guide grid can include a grid structure having a plurality of intersecting grid lines, each grid line having a width w, and a plurality of openings for photosensor elements between intersecting grid lines. The grid structure has a diagonal grid width between two adjacent ones of the plurality of openings in a diagonal direction. The diagonal grid width has a value exceeding approximately ?3 w. An image sensor can include a light guide grid having a grid structure as described above and further include a micro-lens such as a sinking micro-lens and a color filter. A method of fabricating a light guide grid can include forming a grid above at least one photo sensor, the grid having intersecting grid lines of width w and a diagonal grid width in a diagonal direction having a value exceeding approximately ?3 w.
    Type: Application
    Filed: July 8, 2013
    Publication date: January 15, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yun-Wei CHENG, Volume Chien, I-I Cheng, Chi-Cherng Jeng
  • Patent number: 8932896
    Abstract: The solar cell manufacturing apparatus includes: a load lock chamber configured to allow loading and unloading of a substrate by switching between atmospheric ambient and vacuum ambient; a processing chamber where the substrate for a solar cell is to be doped with impurity ions for pn junction formation in the vacuum ambient; and a conveyance chamber including a conveyance unit configured to convey the substrate between the load lock chamber and the processing chamber. The doping of impurity ions is performed by irradiation with the impurity ions from an ion gun, and the ion gun is provided with a grid plate, as its ion irradiation surface, facing the substrate conveyed to the processing chamber.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: January 13, 2015
    Assignee: Ulvac, Inc.
    Inventor: Genji Sakata
  • Patent number: 8927324
    Abstract: A method for the production of a wafer-based, back-contacted heterojunction solar cell includes providing at least one absorber wafer. Metallic contacts are deposited as at least one of point contacts and strip contacts in a predetermined distribution on a back side of the at least one absorber wafer. The contacts have steep flanks that are higher than a cumulative layer thickness of an emitter layer and an emitter contact layer and are sheathed with an insulating sheath. The emitter layer is deposited over an entire surface of the back side of the at least one absorber wafer. The emitter contact layer is deposited over an entire surface of the emitter layer so as to form an emitter contact system. At least one of the emitter layer and the emitter contact layer is selectively removed so as to expose the steep flanks of the contacts that are covered with the insulating sheath.
    Type: Grant
    Filed: October 10, 2009
    Date of Patent: January 6, 2015
    Assignee: Helmholtz-Zentrum Berlin Fuer Materialien und Energie GmbH
    Inventor: Rolf Stangl
  • Patent number: 8916409
    Abstract: An electronic device includes a substrate and a plurality of particles anchored to the substrate. An electrode material is formed over the particles and configured to form peaks over the particles. One or more operational layers are fog led over the electrode material for performing a device function.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ahmed Abou-Kandil, Keith E. Fogel, Augustin J. Hong, Jeehwan Kim, Hisham S. Mohamed, Devendra K. Sadana
  • Publication number: 20140370644
    Abstract: A method of manufacturing a solar cell including a crystalline semiconductor substrate, includes: etching or washing at least part of a first principal surface of the substrate by treatment with an aqueous alkaline solution; and depositing a p-type semiconductor layer containing boron on at least part of a second principal surface of the substrate before the treatment with the aqueous alkaline solution.
    Type: Application
    Filed: September 5, 2014
    Publication date: December 18, 2014
    Inventors: Masato NAKASU, Naoya SOTANI, Yutaka KIRIHARA
  • Publication number: 20140370643
    Abstract: Acid etch compositions for etching multicrystalline silicon substrates are disclosed which may include hydrofluoric acid, an oxidizer, an acid diluent, and soluble silicon. The soluble silicon may be hexafluorosilicic acid or ammonium fluorosilicate. Silicon substrates patterned with organic resist may be used with the acid etch compositions for selective silicon patterning for solar cell applications.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 18, 2014
    Applicant: 1366 TECHNOLOGIES INC
    Inventors: Eric Stern, Bradley M. West, Jason Criscione
  • Patent number: 8912035
    Abstract: Discussed herein are a solar cell and a fabricating method thereof. The solar cell includes a first conductivity-type semiconductor substrate, a second conductivity-type semiconductor layer formed on a front surface of the first conductivity-type semiconductor substrate, and having a conductivity opposite to that of the first conductivity-type semiconductor substrate, an anti-reflection film including at least one opening exposing a part of a surface of the second conductivity-type semiconductor layer, and formed on the second conductivity-type semiconductor layer, at least one front electrode contacting a part of the surface of the second conductivity-type semiconductor layer exposed through the at least one opening, and at least one rear electrode formed on a rear surface of the first conductivity-type semiconductor substrate, wherein the at least one front electrode includes a metal containing silver and lead-free glass frit.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: December 16, 2014
    Assignee: LG Electronics Inc.
    Inventors: Seongeun Lee, Jiweon Jeong
  • Patent number: 8912653
    Abstract: A semiconductor wafer has integrated circuits formed thereon and a top passivation layer applied. The passivation layer is patterned and selectively etched to expose contact pads on each semiconductor die. The wafer is exposed to ionized gas causing the upper surface of passivation layer to roughen and to slightly roughen the upper surface of the contact pads. The wafer is cut to form a plurality of semiconductor dies each with a roughened passivation layer. The plurality of semiconductor dies are placed on an adhesive layer and a reconstituted wafer formed. Redistribution layers are formed to complete the semiconductor package having electrical contacts for establishing electrical connections external to the semiconductor package, after which the wafer is singulated to separate the dice.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: December 16, 2014
    Assignee: STMicroelectronics Pte Ltd.
    Inventors: Kah Wee Gan, Yonggang Jin, Anandan Ramasamy, Yun Liu
  • Publication number: 20140352771
    Abstract: A single-crystalline silicon substrate with bowl-shaped surface structures and a manufacturing method of the same are provided. The manufacturing method comprises a sandblasting treatment for forming a textured structure on one surface of the single-crystalline silicon substrate and an etching process for etching the textured structure into plural bowl-shaped surface structures, thereby to manufacture the bowl-shaped surface structures with anti-reflection effect and to lower the reflection ratio of the single-crystalline silicon substrate. Without the need of coating an anti-reflection film, the single-crystalline silicon substrate with bowl-shaped textured surface structures has a very low reflection ratio of less than 2% in the 400-800 nm wavelength visible light region, and can be used as efficient silicon-based solar cell substrate.
    Type: Application
    Filed: July 9, 2013
    Publication date: December 4, 2014
    Inventors: Shao-Liang CHENG, Cheng-Hsuan CHUNG
  • Publication number: 20140357012
    Abstract: A method for manufacturing an optical substrate includes: a step for preparing a long film-shaped mold; a step for preparing a sol; a step for forming a coating film of the sol on a substrate; a step for drying the coating film; a step for pressing a pattern surface of the film-shaped mold against the dried coating film with a pressing roll while feeding the film-shaped mold to the pressing roll; a step for releasing the film-shaped mold from the coating film; and a step for baking the coating film to which the concave and convex pattern has been transferred.
    Type: Application
    Filed: August 20, 2014
    Publication date: December 4, 2014
    Inventors: Shigetaka TORIYAMA, Suzushi NISHIMURA, Naoto KOZASA, Yoshihiro KUMAGAI, Madoka TAKAHASHI
  • Patent number: 8895347
    Abstract: The disclosure provides a method for fabricating a semiconductor layer having a textured surface, including: (a) providing a textured substrate; (b) forming at least one semiconductor layer on the textured substrate; (c) forming a metal layer on the semiconductor layer; and (d) conducting a thermal process or a low temperature process to the textured substrate, the semiconductor layer and the metal layer, wherein the semiconductor layer is separated from the textured substrate by the thermal process to obtain the semiconductor layer having the metal layer and a textured surface.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: November 25, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Teng-Yu Wang, Chien-Hsun Chen, Chen-Hsun Du, Chung-Yuan Kung
  • Publication number: 20140342492
    Abstract: Methods for preparing a substrate surface are provided, for purposes including manufacturing a low reflectivity surface. In some aspects, the methods include providing a material comprising an etching mask on a substrate, subjecting the material to a first isotropic etching phase, and subjecting the material to a first anisotropic etching phase, thereby forming a textured surface on the material, wherein the textured surface comprises structures with dimensions in a sub-micron range.
    Type: Application
    Filed: July 31, 2014
    Publication date: November 20, 2014
    Inventors: Jeayoung Choi, Christiana Honsberg
  • Patent number: 8889464
    Abstract: A method for manufacturing a solar cell includes performing a dry etching process to form a textured surface including a plurality of minute protrusions on a first surface of a semiconductor substrate, performing a first cleansing process for removing damaged portions of surfaces of the minute protrusions using a basic chemical and removing impurities adsorbed on the surfaces of the minute protrusions, performing a second cleansing process for removing impurities remaining or again adsorbed on the surfaces of the minute protrusions using an acid chemical after performing the first cleansing process, and forming an emitter region at the first surface of the semiconductor substrate.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: November 18, 2014
    Assignee: LG Electronics Inc.
    Inventors: Mann Yi, Jeonghyo Kwon, Seongeun Lee, Taeyoung Kwon
  • Patent number: 8889463
    Abstract: A method for manufacturing a sloped structure is disclosed. The method includes the steps of: (a) forming a sacrificial film above a substrate; (b) forming a first film above the sacrificial film, the first film having a first portion connected to the substrate, a second portion located above the sacrificial film, a third portion located between the first portion and the second portion, and a thin region in a portion of the third portion or in a boundary section between the second portion and the third portion and having a thickness smaller than the first portion; (c) removing the sacrificial film; and (d) bending the first film in the thin region, after the step (c), thereby sloping the second portion of the first film with respect to the substrate.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: November 18, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Takahiko Yoshizawa
  • Patent number: 8889462
    Abstract: The invention provides photovoltaic concentrator solar cells and a method of forming these from a semiconductor wafer. The method has the steps of first doping the rear surface of said wafer so as to provide a first doped region. Depositing passivation layers on the front and rear surfaces. Forming a deep groove in the rear surface through the passivation layer and doping said rear surface so as to provide an oppositely doped second doped region in the deep groove. Then an opening is formed through the rear passivation layer to the first doped region; and electrical contacts are formed on the rear surface to electrically connect to the first and second doped regions. The photovoltaic concentrator solar cell has a semiconductor wafer with a passivation layer deposited on front and rear surfaces; and a first doped region at the rear surface.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 18, 2014
    Assignee: Silicon CPV PLC
    Inventor: Humayun Akhter Mughal
  • Publication number: 20140335646
    Abstract: The present invention is related to a method for forming a metal silicide layer on a textured silicon substrate surface. The method includes providing a metal layer on a textured silicon substrate and performing a pulsed laser annealing step providing at least one UV laser pulse with a laser fluence in the range between 0.1 J/cm2 and 1.5 J/cm2 and with a laser pulse duration in the range between 1 ns and 10 ms. Then, the method includes converting at least part of the metal layer into a metal silicide layer. In addition, the present invention is related to the use of such a method in a process for fabricating a photovoltaic cell, wherein the dielectric layer is a surface passivation layer, or wherein the dielectric layer is an antireflection coating.
    Type: Application
    Filed: November 23, 2012
    Publication date: November 13, 2014
    Inventors: Loic Tous, Monica Aleman, Joachim John, Thierry Emeraud
  • Patent number: 8883543
    Abstract: Provided is a method of producing a wafer for a solar cell that can produce the solar cell with high conversion efficiency. A method of producing a wafer for a solar cell according to the present invention comprises a first step of contacting lower alcohol to at least one surface of the semiconductor wafer and a second step, after the first step, of contacting hydrofluoric acid containing metal ion to the at least one surface of the semiconductor wafer, and a third step that is, after the second step, a step of contacting alkali solution to the at least one surface of the semiconductor wafer, a step of contacting acid solution containing hydrofluoric acid and nitric acid to the at least one surface of the semiconductor wafer, or a step of carrying out an oxidation treatment to the at least one surface of the semiconductor wafer.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: November 11, 2014
    Assignee: SUMCO Corporation
    Inventor: Shigeru Okuuchi
  • Publication number: 20140326310
    Abstract: The invention relates to an organic photovoltaic device, in a layered structure, comprising a substrate, a bottom electrode, a top electrode, wherein the bottom electrode is closer to the substrate than the top electrode, an electronically active region, the electronically active region being provided between and being in electrical contact with the bottom electrode and the top electrode, a light absorbing region provided in the electronically active region, and at least one of a non-flat layer provided in the electronically active region, and an electronically inactive non-flat layer provided between the substrate and the bottom electrode. Furthermore, the invention relates to a method of producing a photovoltaic device.
    Type: Application
    Filed: December 6, 2012
    Publication date: November 6, 2014
    Inventors: Sven Murano, Jan Birnstock, Steffen Pfuetzner, Ansgar Werner, Michael Hofmann, Tobias Canzler, Rudolf Lessmann
  • Patent number: 8878116
    Abstract: A method of manufacturing a solid-state imaging element includes: manufacturing an element chip in which photoelectric conversion units are arranged on a main surface side; preparing a base configured using a material with an expansion coefficient greater than the element chip and having an opening of which the periphery of the opening is shaped as a flat surface; expanding the base by heating, mounting the element chip on the flat surface of the base in a state where the opening of the base is covered; and three-dimensionally curving a portion corresponding to the opening in the element chip by cooling and contracting the base in a state where the element chip is fixed to the flat surface of the expanded base.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: November 4, 2014
    Assignee: Sony Corporation
    Inventor: Kazuichiro Itonaga
  • Publication number: 20140318612
    Abstract: A manufacturing method of a silicon solar cell and the silicon solar cell thereof are provided. A silicon substrate formed with a doped layer on a light receiving surface thereof is provided. First and second dielectric layers are respectively formed on the light receiving surface and the rear surface of the silicon substrate. A patterned second dielectric layer with an opening and a groove in the silicon substrate are formed by partially removing the second dielectric layer and the silicon substrate. First and second electrode compositions are respectively formed on the light receiving surface and the rear surface, and the second electrode composition is filled into the groove. After performing a high temperature process to co-firing the silicon substrate and the first and second electrode compositions, a first electrode and a second electrode are respectively formed on the light receiving surface and the rear surface.
    Type: Application
    Filed: November 7, 2013
    Publication date: October 30, 2014
    Applicant: Terasolar Energy Materials Corp. Ltd.
    Inventors: Yi-Chin Chou, Chia-Yun Liu, Cheng-Liang Cheng, Pin-Sheng Wang, Bang-Hao Wu
  • Publication number: 20140319463
    Abstract: An epitaxial wafer of the present invention includes a substrate composed of a III-V compound semiconductor, a multiple quantum well structure composed of a III-V compound semiconductor and located on the substrate, and a top layer composed of a III-V compound semiconductor and located on the multiple quantum well structure. The substrate has a plane orientation of (100) and an off angle of ?0.030° or more and +0.030° or less, and a surface of the top layer has a root-mean-square roughness of less than 10 nm.
    Type: Application
    Filed: April 23, 2014
    Publication date: October 30, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Kei FUJII, Kaoru SHIBATA, Katsushi AKITA
  • Publication number: 20140322858
    Abstract: Systems and methods for producing nanoscale textured low reflectivity surfaces may be utilized to fabricate solar cells. A substrate may be patterned with a resist prior to an etching process that produces a nanoscale texture on the surface of the substrate. Additionally, the substrate may be subjected to a dopant diffusion process. Prior to dopant diffusion, the substrate may be optionally subjected to liquid phase deposition to deposit a material that allows for patterned doping. The order of the nanoscale texture etching and dopant diffusion may be modified as desired to produce post-nano emitters or pre-nano emitters.
    Type: Application
    Filed: April 24, 2014
    Publication date: October 30, 2014
    Applicant: Natcore Technology, Inc.
    Inventors: David H. Levy, Daniele Margadonna, Dennis Flood, Wendy G. Ahearn, Richard W. Topel, JR., Theodore Zubil
  • Patent number: 8871555
    Abstract: A photoelectric conversion device having a new anti-reflection structure is provided. A photoelectric conversion device includes a first-conductivity-type crystalline semiconductor region that is provided over a conductive layer; a crystalline semiconductor region that is provided over the first-conductivity-type crystalline semiconductor region and has an uneven surface by including a plurality of whiskers including a crystalline semiconductor; and a second-conductivity-type crystalline semiconductor region that covers the uneven surface of the crystalline semiconductor region having the uneven surface, the second conductivity type being opposite to the first conductivity type. In the photoelectric conversion device, a concentration gradient of an impurity element imparting the first conductivity type is formed from the first-conductivity-type crystalline semiconductor region toward the crystalline semiconductor region having the uneven surface.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 28, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20140311566
    Abstract: Described herein are microstructured wavelength conversion films for enhanced solar harvesting efficiency of photovoltaic devices or solar cells. The microstructured wavelength conversion film comprises a luminescent medium that is provided with a microstructured surface, where the luminescent medium and the microstructured surface can be combined into a single layer or made up of two or more separate layers. A photovoltaic module which utilizes the medium to improve the performance of photovoltaic devices or solar cells is also provided, along with a method of improving a solar cell or photovoltaic device by utilizing the microstructured wavelength conversion film.
    Type: Application
    Filed: November 2, 2012
    Publication date: October 23, 2014
    Inventors: Hongxi Zhang, Peng Wang, Stanislaw Rachwal, Zongcheng Jiang, Michiharu Yamamoto
  • Publication number: 20140312327
    Abstract: A transparent conductive oxide (TCO) electrode for an organic light emitting diode (OLED) has a first layer of a crystalline material and a second layer of an amorphous material. The material of the second layer can include one or more dopant materials.
    Type: Application
    Filed: March 7, 2014
    Publication date: October 23, 2014
    Applicant: PPG Industries Ohio, Inc.
    Inventors: Abhinav Bhandari, James W. McCamy
  • Publication number: 20140312448
    Abstract: The present disclosure includes devices for detecting photons, including avalanche photon detectors, arrays of such detectors, and circuits including such arrays. In some aspects, the detectors and arrays include a virtual beveled edge mesa structure surrounded by resistive material damaged by ion implantation and having side wall profiles that taper inwardly towards the top of the mesa structures, or towards the direction from which the ion implantation occurred. Other aspects are directed to masking and multiple implantation and/or annealing steps. Furthermore, methods for fabricating and using such devices, circuits and arrays are disclosed.
    Type: Application
    Filed: April 21, 2014
    Publication date: October 23, 2014
    Applicant: LightSpin Technologies, Inc.
    Inventor: Eric S. Harmon
  • Patent number: 8865510
    Abstract: A solar cell is manufactured, which includes: a solar cell substrate including a semiconductor substrate, a p-type surface and an n-type surface exposed on a first principal surface, and a texture structure in a second principal surface; a p-side electrode disposed on the p-type surface; an n-side electrode disposed on the n-type surface; and an insulation layer formed on the first principal surface and isolating the p-side electrode and the n-side electrode from each other. The manufacturing method of the solar cell includes: forming an insulation film covering the first principal surface; forming the texture structure in the second principal surface; and removing part of the insulation film, thereby forming the insulation layer.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: October 21, 2014
    Assignee: SANYO Electric Co., Ltd.
    Inventors: Tsuyoshi Takahama, Hiroyuki Mori, Kei Tamoto
  • Patent number: 8865017
    Abstract: A method of texturing a surface of a crystalline silicon substrate is provided. The method includes immersing a crystalline silicon substrate into an aqueous alkaline etchant solution to form a pyramid shaped textured surface, with (111) faces exposed, on the crystalline silicon substrate. The aqueous alkaline etchant solution employed in the method of the present disclosure includes an alkaline component and a nanoparticle slurry component. Specifically, the aqueous alkaline etchant solution of the present disclosure includes 0.5 weight percent to 5 weight percent of an alkaline component and from 0.1 weight percent to 5 weight percent of a nanoparticle slurry on a dry basis.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: October 21, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mahadevaiyer Krishnan, Jun Liu, Satyavolu S. Papa Rao, George G. Totir
  • Patent number: 8865509
    Abstract: A cleaning method of a silicon substrate includes a first step of etching a surface of a silicon substrate by a metal-ion-containing mixed aqueous solution of an oxidizing agent and hydrofluoric acid and of forming a porous layer on the surface of the silicon substrate, a second step of etching a pore of the porous layer by mixed acid mainly containing hydrofluoric acid and nitric acid and of forming texture on the surface of the silicon substrate, a third step of etching the surface of the silicon substrate on which the texture is formed with an alkaline chemical solution, and a fourth step of treating the silicon substrate etched by the alkaline chemical solution by ozone-containing water, of generating an air bubble within the pore formed in the silicon substrate, and of removing metal and organic impurities from within the pore.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: October 21, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoichiro Nishimoto, Nozomu Yasunaga, Takayoshi Matsuda
  • Publication number: 20140307300
    Abstract: An athermal optical modulator includes a waveguide, a ring resonator configured to receive light input from the waveguide and output modulated light to the waveguide, the ring resonator including a ridge unit located at a center of the ring resonator in a vertical section, a first contact connected to one side of the ridge unit and a second contact connected to the other side of the ridge unit, the first contact and the second contact forming paths for applying electricity to the ring resonator to form an electric field in the ring resonator, and a polymer layer covering the ridge unit.
    Type: Application
    Filed: August 22, 2013
    Publication date: October 16, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Moon-seung YANG, Seong-ho CHO, Rakib Uddin MOHAMMAD
  • Publication number: 20140299186
    Abstract: A photo-voltaic cell with semiconductor substrate having a first conductivity type has a first pattern of base and emitter surface regions on the back surface, the base and emitter surface regions being coupled to first and second output terminals respectively. A second pattern of first and second further surface regions on the front surface, electrically floating with respect to the first and second output terminals. The first and second further surface regions have the first and second conductivity type respectively. The first and second further surface regions at least partly overlap the emitter and base regions respectively, when seen in a projection along a direction perpendicular to the first surface.
    Type: Application
    Filed: August 31, 2012
    Publication date: October 9, 2014
    Applicant: STICHTING ENERGIEONDERZOEK CENTRUM NEDERLAND
    Inventor: Ilkay Cesar
  • Publication number: 20140299184
    Abstract: A photo-active device is provided that has a cavity in an integrated, transparent mold material. An active material layer is disposed therein along with other layers disposed in and about said cavity to define a dome-like array architecture. A process for forming the dome-like array structure includes disposing an active layer into a series of empty periodically positioned cavities of a dome-like array template working mold material. Each of the series of empty periodically positioned cavities has curvature variations of the interior surface of the dome-array cavities optimized for device efficiency, reduction of performance sensitivity to light impingement angle, or a combination thereof. At least one of absorber layers, contact layers, spacer/transport layers, and electrode layers are also disposed in the series of cavities.
    Type: Application
    Filed: March 31, 2014
    Publication date: October 9, 2014
    Applicant: SOLARITY, INC.
    Inventors: Stephen J. Fonash, Charles Smith
  • Publication number: 20140299955
    Abstract: A method for manufacturing a sloped structure is disclosed. The method includes the steps of: (a) forming a sacrificial film above a substrate; (b) forming a first film above the sacrificial film, the first film having a first portion connected to the substrate, a second portion located above the sacrificial film, a third portion located between the first portion and the second portion, and a thin region in a portion of the third portion or in a boundary section between the second portion and the third portion and having a thickness smaller than the first portion; (c) removing the sacrificial film; and (d) bending the first film in the thin region, after the step (c), thereby sloping the second portion of the first film with respect to the substrate.
    Type: Application
    Filed: June 24, 2014
    Publication date: October 9, 2014
    Inventor: Takahiko YOSHIZAWA
  • Patent number: 8853524
    Abstract: A solar cell and method of fabrication are disclosed. In one embodiment of the present invention, the method comprises depositing a first doped amorphous silicon layer on a first surface of a silicon substrate, depositing a second doped amorphous silicon layer on the first surface of the silicon substrate. The second doped amorphous silicon layer is doped oppositely from the first doped amorphous silicon layer. An anneal is performed to transform the first doped amorphous silicon layer and second doped amorphous silicon layer to crystalline silicon layers.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventor: Harold John Hovel
  • Patent number: 8852990
    Abstract: A method of fabricating a solar cell includes the following steps. At first, a substrate including a doped layer is provided. Subsequently, a patterned material layer partially overlapping the doped layer is formed on the substrate, and a first metal layer is conformally formed on the patterned material layer and the doped layer. Furthermore, a patterned mask layer totally overlapping the patterned material layer is formed on the first metal layer, and a second metal layer is formed on the doped layer not overlapped by the patterned material layer. Then, the patterned mask layer, the first metal layer between the patterned mask layer and the patterned material layer and a part of the patterned material layer are removed.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: October 7, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Wei-Lin Chen, Chih-Chung Wang, Chiu-Te Lee, Ke-Feng Lin
  • Patent number: 8852982
    Abstract: A photoelectric device is disclosed. The photoelectric device includes a semiconductor substrate, first and second semiconductor stacks having opposite conductive types and alternately arranged on a first surface of the semiconductor substrate, and a gap insulation layer formed between the first and second semiconductor stacks. An undercut may be formed in the gap insulation layer. A method of manufacturing a photoelectric device is also disclosed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 7, 2014
    Assignee: Samsung SDI Co., Ltd.
    Inventors: June-Hyuk Jung, Young-Soo Kim, Sung-Chul Lee, Jae-Ho Shin, Dong-Hun Lee
  • Patent number: 8852989
    Abstract: Methods for increasing the power output of a TFPV solar panel using thin absorber layers comprise techniques for roughening and/or texturing the back contact layer. The techniques comprise roughening the substrate prior to the back contact deposition, embedding particles in sol-gel films formed on the substrate, and forming multicomponent, polycrystalline films that result in a roughened surface after a wet etch step, etc.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: October 7, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Jeroen Van Duren, Haifan Liang
  • Patent number: 8853521
    Abstract: The present disclosure presents a partially-transparent (see-through) three-dimensional thin film solar cell (3-D TFSC) substrate. The substrate includes a plurality of unit cells. Each unit cell structure has the shape of a truncated pyramid, and its parameters may be varied to allow a desired portion of sunlight to pass through.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: October 7, 2014
    Assignee: Solexel, Inc.
    Inventors: Mehrdad Moslehi, David Xuan-Qi Wang
  • Patent number: 8852974
    Abstract: A method for manufacturing semiconductor light-emitting devices comprising the steps of: providing a multi-layer semiconductor film comprising a surface; roughening the surface of the multi-layer semiconductor film to form a scattering surface; re-growing a semiconductor layer on the scattering surface; and roughening the semiconductor layer to form a sub-scattering portion on the scattering surface; wherein the sub-scattering portion is structurally smaller than the scattering surface.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: October 7, 2014
    Assignee: Epistar Corporation
    Inventors: Chien-Fu Huang, Yi-Ming Chen, Yi-Tang Lai, Chia-Liang Hsu, Tsung-Hsien Yang, Tzu-Chieh Hsu
  • Publication number: 20140295612
    Abstract: A solar cell and a manufacturing method thereof are provided. A laser doping process is adopted to form positive and negative doping regions for an accurate control of the doping regions. No metal contact coverage issue arises since a contact opening is formed by later firing process. The solar cell is provided with a comb-like first electrode, a sheet-like second electrode corresponding to the doping regions to obtain high photoelectric conversion efficiency by fully utilizing the space in the semiconductor substrate. Furthermore, the sheet-like second electrode can be formed by a material having high reflectivity to improve the light utilization rate of the solar cell. The manufacturing process of the solar cell is simplified and the processing yield is improved.
    Type: Application
    Filed: June 13, 2014
    Publication date: October 2, 2014
    Inventors: Cheng-Chang Kuo, Yen-Cheng Hu, Hsin-Feng Lee, Tsung-Pao Chen, Jen-Chieh Chen, Zhen-Cheng Wu
  • Patent number: 8846435
    Abstract: An integrated die-level camera system and method of making the camera system include a first die-level camera formed at least partially in a die. A second die level camera is also formed at least partially in the die. Baffling is formed to block stray light between the first and second die-level cameras.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: September 30, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Dennis Gallagher, Adam Douglas Greengard, Paulo E. X. Silveira, Chris Linnen, Vlad V. Chumanchenko, Jungwon Aldinger
  • Publication number: 20140264704
    Abstract: Methods and structures of barrier detectors are described. The structure may include an absorber that is at least partially reticulated. The at least partially reticulated absorber may also include an integrated electricity conductivity structure. The structure may include at least two contact regions isolated from one another. The structure may further include a barrier layer disposed between the absorber and at least two contact regions.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: DRS RSTA, Inc.
    Inventors: Arvind I. D'souza, Mark Muzilla, Adrian Ionescu
  • Publication number: 20140261652
    Abstract: A device, system, and method for a multi junction solar cell are described herein. An exemplary multi-solar cell structure can have a substrate having a first surface having a (111) crystalline etched surface. A dielectric layer can be deposited on the first surface of the substrate. A graded buffer layer can be grown on a second surface of the substrate with the second surface having a (100) crystalline surface. A first solar subcell within or on top of the graded buffer layer and a second solar subcell grown on top of the first solar subcell.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 18, 2014
    Applicant: Amberwave Inc.
    Inventor: Anthony Lochtefeld
  • Publication number: 20140273331
    Abstract: A method of fabricating a solar cell is disclosed. The method includes forming a polished surface on a silicon substrate and forming a first flowable matrix in an interdigitated pattern on the polished surface, where the polished surface allows the first flowable matrix to form an interdigitated pattern comprising features of uniform thickness and width. In an embodiment, the method includes forming the silicon substrate using a method such as, but not limited to, of diamond wire or slurry wafering processes. In another embodiment, the method includes forming the polished surface on the silicon substrate using a chemical etchant such as, but not limited to, sulfuric acid (H2SO4), acetic acid (CH3COOH), nitric acid (HNO3), hydrofluoric acid (HF) or phosphoric acid (H3PO4). In still another embodiment, the etchant is an isotropic etchant. In yet another embodiment, the method includes providing a surface of the silicon substrate with at most 500 nanometer peak-to-valley roughness.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventors: Genevieve A. Solomon, Scott Harrington, Kahn Wu, Paul Loscutoff, Junbo Wu, Steven Edward Molesa