Specific Surface Topography (e.g., Textured Surface, Etc.) Patents (Class 438/71)
  • Publication number: 20130210187
    Abstract: A solar cell is manufactured, which includes: a solar cell substrate including a semiconductor substrate, a p-type surface and an n-type surface exposed on a first principal surface, and a texture structure in a second principal surface; a p-side electrode disposed on the p-type surface; an n-side electrode disposed on the n-type surface; and an insulation layer formed on the first principal surface and isolating the p-side electrode and the n-side electrode from each other. The manufacturing method of the solar cell includes: forming an insulation film covering the first principal surface; forming the texture structure in the second principal surface; and removing part of the insulation film, thereby forming the insulation layer.
    Type: Application
    Filed: March 21, 2013
    Publication date: August 15, 2013
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Sanyo Electric Co., Ltd.
  • Patent number: 8501604
    Abstract: A method of forming a doped region in a semiconductor layer of a substrate by alloying with doping elements is disclosed. In one aspect, the method includes screen printing a paste layer of doping element paste to the substrate and firing the screen printed paste layer of doping element paste, wherein a highly pure doping element layer is applied to the semiconductor layer after which the paste layer is screen printed to the doping element layer.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: August 6, 2013
    Assignee: IMEC
    Inventor: Sukhvinder Singh
  • Patent number: 8492191
    Abstract: A method for manufacturing a see-through solar battery module includes disposing a first mask above a transparent substrate, forming a plurality of metal electrode layers alternately arranged on the transparent substrate, disposing a second mask above the transparent substrate, forming a photoelectric transducing layer on each metal electrode layer by the second mask, removing a part of each photoelectric transducing layer along a first direction to expose a part of each metal electrode layer, forming a transparent electrode layer on each photoelectric transducing layer and each metal electrode layer, and removing a part of each transparent electrode layer and a part of each photoelectric transducing layer to expose a part of each metal electrode layer so as to make the plurality of metal electrode layers and the transparent electrode layer in series connection along a second direction respectively.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: July 23, 2013
    Assignee: Axuntek Solar Energy
    Inventors: Shih-Wei Lee, Ching-Ju Lin, Wei-Min Huang, Jung-Tai Tsai, Chio-An Tseng, Shih-Chi Wu
  • Publication number: 20130183790
    Abstract: A novel surface texturing provides improved light-trapping characteristics for photovoltaic cells. The surface is asymmetric and includes shallow slopes at between about 5 and about 30 degrees from horizontal as well as steeper slopes at about 70 degrees or more from horizontal. It is advantageously used as either the front or back surface of a thin semiconductor lamina, for example between about 1 and about 20 microns thick, which comprises at least the base or emitter of a photovoltaic cell. In embodiments of the present invention, the shallow slopes are formed using imprint photolithography.
    Type: Application
    Filed: March 5, 2013
    Publication date: July 18, 2013
    Applicant: GTAT Corporation
    Inventor: GTAT Corporation
  • Publication number: 20130183791
    Abstract: The purpose of the present invention is to obtain a finer texture for a silicon substrate having a textured surface and thereby obtain a thinner silicon substrate for a solar cell. The invention provides a silicon substrate that has a thickness of 50 [mu]m or less and substrate surface orientation (111), and that has a textured surface on which a texture has been formed. Such a silicon substrate is produced by a process comprising a step (A) for preparing a silicon substrate that preferably has a thickness of 50 [mu]m or less and substrate surface orientation (111), and a step (B) for texturing by blowing etching as comprising a fluorine-containing gas onto the surface of the prepared silicon substrate.
    Type: Application
    Filed: April 13, 2012
    Publication date: July 18, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Ichiro Nakayama, Tsuyoshi Nomura, Tomohiro Okumura, Mitsuo Saitoh, Hiroshi Tanabe, Yukiya Usui
  • Publication number: 20130181241
    Abstract: A method of manufacturing a substrate, characterized by a first surface and a second surface, for use in a semiconductor device is provided. The method includes providing a mold having a first template and/or a second template corresponding to a first texture and a second texture respectively. Then, the method includes injection molding a material for the substrate in the mold, to form the substrate, such that the material is injection molded to create the first texture on the first surface and/or the second texture on the second surface. The first texture and/or the second texture facilitate light extraction or light trapping in the semiconductor device.
    Type: Application
    Filed: January 18, 2012
    Publication date: July 18, 2013
    Inventors: Jan Matthijs Ter Meulen, Patrick Peeters, Erik Jan Prins
  • Publication number: 20130168792
    Abstract: Semiconductor devices having three dimensional (3D) architectures and methods form making such devices are provided. In one aspect, for example, a method for making a semiconductor device can include forming a device layer on a front side of a semiconductor layer that is substantially defect free, bonding a carrier substrate to the device layer, processing the semiconductor layer on a back side opposite the device layer to form a processed surface, and bonding a smart substrate to the processed surface. In some aspects, the method can also include removing the carrier substrate from the semiconductor layer to expose the device layer.
    Type: Application
    Filed: October 15, 2012
    Publication date: July 4, 2013
    Applicant: SIONYX, INC.
    Inventor: SiOnyx, Inc.
  • Publication number: 20130167915
    Abstract: Back contact back junction three dimensional solar cell and methods for manufacturing are provided. The back contact back contact back junction three dimensional solar cell comprises a three-dimensional substrate. The substrate comprises a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer is positioned on the doped backside emitter region. Backside emitter contacts and backside base contacts connected to metal interconnects and selectively formed on three-dimensional features of the backside of three-dimensional solar cell.
    Type: Application
    Filed: December 9, 2010
    Publication date: July 4, 2013
    Applicant: SOLEXEL, INC.
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virenda V. Rana
  • Publication number: 20130167923
    Abstract: A solar cell element containing: a semiconductor substrate; an antireflection film disposed in a first region on one main surface of the semiconductor substrate; and a front surface electrode disposed in a second region on the one main surface of the semiconductor substrate and containing silver as a main component and a tellurium-based glass containing tellurium, tungsten, and bismuth. The solar cell element is manufactured by forming the antireflection film on the one main substrate surface; printing on the antireflection film a conductive paste containing a conductive powder mainly containing silver, a tellurium-based glass frit containing tellurium, tungsten, and bismuth, and an organic vehicle; and disposing the antireflection film in the first region and forming the front surface electrode in the second region, by firing the paste and eliminating the antireflection film positioned under the paste.
    Type: Application
    Filed: October 4, 2011
    Publication date: July 4, 2013
    Inventors: Masami Nakamura, Naoto Shindo, Tadashi Kanasaku, Junichi Atobe
  • Publication number: 20130171761
    Abstract: A solar cell system making method includes steps of making a round P-N junction by (a) stacking a P-type silicon layer and a N-type silicon layer on top of each other, and (b) forming a P-N junction near an interface between the P-type silicon layer and the N-type silicon layer; cutting the round P-N junction into a plurality of arc shaped solar cell preforms; forming an arc shaped surface by stacking the plurality of arc shaped solar cell preforms along a first direction and forming an electrode layer between each adjacent two of the plurality of arc shaped solar cell preforms; and forming a first collection electrode and a second collection electrode to form an arc shaped solar cell system having a photoreceptive surface being on the arc shaped surface and being configured to receive incident light beams.
    Type: Application
    Filed: August 8, 2012
    Publication date: July 4, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YUAN-HAO JIN, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20130167920
    Abstract: A fabricating method of a conductive substrate including the following steps is provided. A substrate is provided. A barrier layer having a first roughened surface is formed on the substrate by an atmospheric pressure plasma process, wherein the surface roughness (Ra) of the first roughened surface formed by the atmospheric pressure plasma process is between 10 nanometers (nm) and 100 nm. A first electrode layer is formed on the first roughened surface of the barrier layer by a vacuum sputter process, wherein a second roughened surface with the surface roughness (Ra) between 10 nm and 100 nm is formed on a surface of the first electrode layer. Furthermore, a photoelectric conversion layer is formed on the second roughened surface of the first electrode layer. A second electrode layer is formed on the photoelectric conversion layer. A solar cell and a conductive substrate are also provided.
    Type: Application
    Filed: August 6, 2012
    Publication date: July 4, 2013
    Applicants: BAY ZU PRECISION CO., LTD., INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Chiang Chang, Chin-Jyi Wu, Chun-Hsien Su, Dao-Yang Huang
  • Patent number: 8476099
    Abstract: Methods, structures, and design structures for improved adhesion of protective layers of imager microlens structures are disclosed. A method of fabricating a semiconductor structure includes forming an interfacial region between a microlens and a protective oxide layer. The interfacial region has a lower concentration of oxygen than the protective oxide layer.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Edward C. Cooney, III, Jeffrey P. Gambino, Robert K. Leidy, Charles F. Musante, John G. Twombly
  • Patent number: 8476681
    Abstract: Backside illuminated photosensitive devices and associated methods are provided. In one aspect, for example, a backside-illuminated photosensitive imager device can include a semiconductor substrate having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation, and a passivation region positioned between the textured region and the at least one junction. The passivation region is positioned to isolate the at least one junction from the textured region, and the semiconductor substrate and the textured region are positioned such that incoming electromagnetic radiation passes through the semiconductor substrate before contacting the textured region. Additionally, the device includes an electrical transfer element coupled to the semiconductor substrate to transfer an electrical signal from the at least one junction.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: July 2, 2013
    Assignee: Sionyx, Inc.
    Inventors: Homayoon Haddad, Jutao Jiang, Jeffrey McKee, Drake Miller, Chintamani Palsule, Leonard Forbes
  • Publication number: 20130164879
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Inventors: Peter J. Cousins, David D. Smith, Seung B. Rim
  • Publication number: 20130164878
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Inventors: Peter J. Cousins, David D. Smith, Seung B. Rim
  • Publication number: 20130153018
    Abstract: A method for manufacturing a solar cell includes texturing a front surface of a semiconductor substrate having a first conductive type dopant by using a dry etching method, forming an emitter layer by ion-implanting a second conductive type dopant into the front surface of the semiconductor substrate, forming a back passivation film on a back surface of the semiconductor substrate; and forming a first electrode electrically connected to the emitter layer and a second electrode being in partial contact with the back surface of the semiconductor substrate.
    Type: Application
    Filed: May 11, 2012
    Publication date: June 20, 2013
    Applicant: LG ELECTRONICS INC.
    Inventors: Kyoungsoo LEE, Myungjun SHIN, Jiweon JEONG
  • Publication number: 20130153025
    Abstract: The invention relates to a method for producing a solar cell and to a solar cell which can be produced accordingly. On a solar cell substrate, first a ridged texture, which may for example comprise pyramids produced by alkaline etching, is formed both on a front face and on a rear face of the solar cell substrate. Then an etching barrier layer is applied to the front face of the solar cell substrate. Next the texture on the rear face of, the solar cell substrate is smoothed by etching in an isotropically acting etching solution which for example contains acid, wherein the front face is protected by the etching barrier layer. Thus, ridged structures on the rear face can be avoided and in this way reflection can be increased and surface passivation can be improved, both of which can lead to an increased potential efficiency.
    Type: Application
    Filed: August 23, 2011
    Publication date: June 20, 2013
    Applicant: UNIVERSITÄT KONSTANZ
    Inventors: Giso Hahn, Amir Dastgheib-Shirazi
  • Patent number: 8465660
    Abstract: A blazed grating is disclosed as well as mode hop-free tunable lasers and a process for fabricating gratings of this type. The grating lies in a general plane and includes a plurality of elongate beams carrying mutually parallel respective reflection surfaces spaced apart from one another with a predefined pitch, each of these reflection surfaces having a normal direction inclined at a grating angle ? to the normal direction of the general plane. The grating includes a plurality of resilient suspension arms connected to the beams and intended to be fastened to a grating support. A first pair of comb electrodes is provided for applying a mechanical force to this assembly, being placed on a first side of the grating, along an axis transverse to the beams, and designed so as to allow the pitch of the grating to be modified in response to the application of the mechanical force.
    Type: Grant
    Filed: January 22, 2007
    Date of Patent: June 18, 2013
    Assignee: CSEM Centre Suisse d'Electronique et de Microtechnique SA-Recherche et Developpement
    Inventors: Ross Stanley, Maurizio Tormen, Rino Kunz, Philippe Niedermann
  • Publication number: 20130146131
    Abstract: A multiple-junction photoelectric device includes sequentially, a substrate, a first conducting layer, at least two elementary photoelectric devices, at least one of the elementary photoelectric devices being made of microcrystalline silicon, and a second conducting layer. The first conducting layer has a surface facing the microcrystalline silicon elementary photoelectric device such that the surface: has a lateral feature size bigger than 100 nm, and a root-element-square roughness bigger than 40 nm, includes inclined elementary surfaces such that ?50 is greater than 20°, where ?50 is the angle for which 50% of the elementary surfaces of the surface of the first conducting layer have an inclination equal to or less than this angle, and includes valleys formed between two elementary surfaces and having a radius of curvature smaller than 100 nm.
    Type: Application
    Filed: June 23, 2011
    Publication date: June 13, 2013
    Applicant: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
    Inventors: Peter Cuony, Matthieu Despeisse, Christophe Ballif, Gaetano Parascandolo
  • Publication number: 20130149808
    Abstract: A solar cell and a fabricating method thereof are provided. In the method of fabricating the solar cell, a p-type semiconductor substrate on whose light-receiving surface an anti-reflection coating is formed is loaded into a processing chamber. In this case, the p-type semiconductor substrate may be loaded on a substrate support of an apparatus of processing a plurality of substrates along the circumference of the substrate support, in the state where the back surface of the p-type semiconductor substrate faces upward. Then, a back surface field (BSF) layer having the characteristic of Negative Fixed Charge (NFC) is formed with AlO, AN or ALON on the back surface of the p-type semiconductor substrate.
    Type: Application
    Filed: January 17, 2013
    Publication date: June 13, 2013
    Applicant: WONIK IPS CO., LTD.
    Inventor: WONIK IPS CO., LTD.
  • Patent number: 8460963
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: June 11, 2013
    Assignee: SunPower Corporation
    Inventor: David D. Smith
  • Patent number: 8460954
    Abstract: A semiconductor device includes a thin film transistor and a thin film diode on a same substrate. A semiconductor layer (109) of the thin film transistor and a semiconductor layer (110) of the thin film diode are crystalline semiconductor layers formed by crystallizing the same non-crystalline semiconductor film. The thickness of the semiconductor layer (110) of the thin film diode is greater than the thickness of the semiconductor layer (109) of the thin film transistor, and the surface of the semiconductor layer (110) of the thin film diode is rougher than the surface of the semiconductor layer (109) of the thin film transistor.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: June 11, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masaki Yamanaka, Hiroshi Nakatsuji, Naoki Makita
  • Publication number: 20130143349
    Abstract: In one embodiment, a method of manufacturing a solar cell includes forming a first electrode over a substrate; forming a light-converting layer over the first electrode and patterning the light-converting layer to form a plurality of patterned light-converting layers that are spaced apart from each other; forming a transparent insulating layer over the first electrode including the patterned light-converting layers; and forming a second electrode over the transparent insulating layer.
    Type: Application
    Filed: January 25, 2013
    Publication date: June 6, 2013
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventor: JUSUNG ENGINEERING CO., LTD.
  • Patent number: 8455292
    Abstract: A method for forming a photodetector device includes forming waveguide feature on a substrate, and forming a photodetector feature including a germanium (Ge) film, the Ge film deposited on the waveguide feature using a plasma enhanced chemical vapor deposition (PECVD) process, the PECVD process having a deposition temperature from about 500° C. to about 550° C., and a deposition pressure from about 666.612 Pa to about 1066.579 Pa.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: June 4, 2013
    Assignee: International Business Machines Corporation
    Inventors: Solomon Assefa, Pratik P. Joshi, Deborah A. Neumayer
  • Patent number: 8450134
    Abstract: A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. An interrupted trench structure separates the P-type doped region from the N-type doped region in some locations but allows the P-type doped region and the N-type doped region to touch in other locations. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. Among other advantages, the resulting solar cell structure allows for increased efficiency while having a relatively low reverse breakdown voltage.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: May 28, 2013
    Assignee: SunPower Corporation
    Inventors: Denis De Ceuster, Peter John Cousins, David D. Smith
  • Patent number: 8450822
    Abstract: Disclosed herein an image sensor chip, including a substrate having at least one via extending through at least one inter layer dielectric (ILD); a first conductive layer over the ILD, wherein the first conductive layer has a first thickness; a second conductive layer over the first conductive layer, wherein the second conductive layer has a second thickness of less than the first thickness; a polymer layer over the second conductive layer, the polymer layer including a cavity; a plurality of cavity components in the cavity; and an optically transparent layer contacting the polymer layer and covering the cavity.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: May 28, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Publication number: 20130125969
    Abstract: This disclosure provides photovoltaic apparatus and methods of forming the same. In one implementation, a method of forming a photovoltaic device includes forming a plurality of substrate features on a surface of a glass substrate, the substrate features having a depth dimension in the range of about 10 ?m to about 1000 ?m and a width dimension in the range of about 10 ?m to about 1000 ?m. The method further includes forming a thin film solar cell over the surface of the glass substrate including over the plurality of substrate features.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 23, 2013
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventors: Wilhelmus A. de Groot, Sijin Han, Fan Yang
  • Patent number: 8445309
    Abstract: A method of forming an anti-reflective surface for photovoltaic modules. A photovoltaic module including a surface configured to be illuminated is provided. The surface is contacted with an etchant, thereby modifying a portion of the surface to alter the index of refraction.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: May 21, 2013
    Assignee: First Solar, Inc.
    Inventors: Benyamin Buller, Markus Gloeckler, Yu Yang
  • Patent number: 8445314
    Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The template has a shape such that the 3-D shape is substantially retained after each substrate release. Prior art reusable templates may have a tendency to change shape after each subsequent reuse; the present disclosure aims to address this and other deficiencies from the prior art, therefore increasing the reuse life of the template.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: May 21, 2013
    Assignee: Solexel, Inc.
    Inventors: Suketu Parikh, David Dutton, Pawan Kapur, Somnath Nag, Mehrdad Moslehi, Joe Kramer, Nevran Ozguven, Asli Buccu Ucok
  • Publication number: 20130118553
    Abstract: A solar cell product including: a bulk semiconductor substrate having one or more solar cells formed therein; and nanoscale particles distributed over a surface of the solar cells to scatter sunlight forward into the solar cells and thereby enhance the efficiency of the solar cells.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 16, 2013
    Applicant: SWINBURNE UNIVERSITY OF TECHNOLOGY
    Inventor: Swinburne University of Technology
  • Publication number: 20130118552
    Abstract: A thin-film solar cell product, including: a thin film semiconductor having one or more solar cells formed therein, the solar cells having a front surface for receiving incident sunlight, and a rear surface; at least one reflective layer to reflect light that has passed through the thin film semiconductor without having been absorbed therein; and a scattering layer including broadband scattering particles configured to scatter light incident upon the scattering layer to increase the absorption of the light in the solar cells.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 16, 2013
    Applicant: Swinburne University of Technology
    Inventor: Swinburne University of Technology
  • Patent number: 8440518
    Abstract: A manufacturing method of a semiconductor element from a pattern formed body capable of attaining patterning efficiently with a high precision. The method includes a photoresist pattern formation step, a hydrophilicity imparting step and a photoresist pattern peeling step.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: May 14, 2013
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Kenichi Ogawa, Tomomi Suzuki, Masataka Kano
  • Patent number: 8440494
    Abstract: Alternative additives that can be used in place of isopropyl alcohol in aqueous alkaline etchant solutions for texturing a surface of a single-crystalline silicon substrate are provided. The alternative additives do not have volatile constituents, yet can be used in an aqueous alkaline etchant solution to provide a pyramidal shaped texture surface to the single-crystalline silicon substrate that is exposed to such an etchant solution. Also provided is a method of forming a textured silicon surface. The method includes immersing a single-crystalline silicon substrate into an etchant solution to form a pyramid shaped textured surface on the single-crystalline silicon substrate. The etchant solution includes an alkaline component, silicon (etched into the solution as a bath conditioner) and glycerol or ethylene glycol as an additive. The textured surface of the single-crystalline silicon substrate has (111) faces that are now exposed.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: May 14, 2013
    Assignee: International Business Machines Corporation
    Inventors: Kathryn C. Fisher, Jun Liu, Satyavolu S. Papa Rao, George G. Totir, James Vichiconti
  • Patent number: 8435812
    Abstract: A method for making a solar cell includes following steps. A silicon substrate is provided, and the silicon substrate has a first surface and a second surface opposite to the first surface. A patterned mask layer is located on the second surface, and the patterned mask layer includes a number of bar-shaped protruding structures aligned side by side. A slot is defined between each two adjacent protruding structures to expose a portion of the second surface of the silicon substrate. The exposed portion of the second surface is etched to form a protruding pair. The mask layer is removed. A doped silicon layer is located on the three-dimensional nano-structures. An upper electrode is applied on at least part of a surface of the doped silicon layer. A back electrode is placed on the first surface of the silicon substrate.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: May 7, 2013
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Zhen-Dong Zhu, Qun-Qing Li, Shou-Shan Fan
  • Publication number: 20130109127
    Abstract: A method for making a solar cell includes following steps. A silicon substrate is provided, and the silicon substrate has a first surface and a second surface opposite to the first surface. A patterned mask layer is located on the second surface, and the patterned mask layer includes a number of bar-shaped protruding structures aligned side by side. A slot is defined between each two adjacent protruding structures to expose a portion of the second surface of the silicon substrate. The exposed portion of the second surface is etched to form a protruding pair. The mask layer is removed. A doped silicon layer is located on the three-dimensional nano-structures. An upper electrode is applied on at least part of a surface of the doped silicon layer. A back electrode is placed on the first surface of the silicon substrate.
    Type: Application
    Filed: December 29, 2011
    Publication date: May 2, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: ZHEN-DONG ZHU, QUN-QING LI, SHOU-SHAN FAN
  • Publication number: 20130109128
    Abstract: In order to form a texture structure of inverse pyramid concavities with high speed and accuracy, when a reflection preventing texture is formed on a surface of a photovoltaic power device by laser patterning of an etching resistance film and wet etching, a plurality of laser apertures are machined in a diagonal direction of a square to be a base of the intended pyramid concavity by using a pulse laser and a laser beam splitting means, and a laser aperture pitch between the squares is set to be larger than a pitch on the diagonal.
    Type: Application
    Filed: May 17, 2010
    Publication date: May 2, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomotaka Katsura, Kunihiko NIshimura, Shinya Nishimura, Tatsuki Okamoto, Shuichi Fujikawa
  • Publication number: 20130109126
    Abstract: Methods for increasing the power output of a TFPV solar panel using thin absorber layers comprise techniques for roughening and/or texturing the back contact layer. The techniques comprise roughening the substrate prior to the back contact deposition, embedding particles in sol-gel films formed on the substrate, and forming multicomponent, polycrystalline films that result in a roughened surface after a wet etch step, etc.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 2, 2013
    Applicant: Intermolecular, Inc.
    Inventors: Jeroen Van Duren, Haifan Liang
  • Patent number: 8432009
    Abstract: A method and system for providing a magnetic junction usable in a magnetic device are described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. At least one of the pinned layer and the free layer includes a magnetic substructure. The magnetic substructure includes at least two magnetic layers interleaved with at least one insertion layer. Each insertion layer includes at least one of Cr, Ta, Ti, W, Ru, V, Cu, Mg, aluminum oxide, and MgO. The magnetic layers are exchange coupled.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: April 30, 2013
    Assignee: Grandis, Inc.
    Inventors: Dmytro Apalkov, Xueti Tang, Vladimir Nikitin
  • Patent number: 8429809
    Abstract: A method for manufacturing a mirror device is presented. The method includes forming a mirror from a first substrate and forming a hinge/support structure from a second substrate. The hinge/support structure is formed with a recessed region and a torsional hinge region. The mirror is attached to the hinge/support structure at the recessed region. Further, a driver system is employed to cause the mirror to pivot about the torsional hinge region.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: April 30, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: John W. Orcutt
  • Publication number: 20130102107
    Abstract: It is an object to provide a method for processing a silicon substrate that can reduce surface reflectance as much as possible. The method includes a first step of forming a thin film including a metal having higher electronegativity than silicon and having a plurality of openings on a silicon substrate, a second step of soaking the silicon substrate subjected to the first step in a hydrofluoric acid solution containing oxidizer, and a third step of soaking the silicon substrate subjected to the second step in an ammonia aqueous solution containing oxidizer. By performing the steps in the above order, a minute uneven structure is formed on a surface of the silicon substrate to reduce the reflectance.
    Type: Application
    Filed: October 11, 2012
    Publication date: April 25, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: SEMICONDUCTOR ENERGY LABORATORY CO.
  • Patent number: 8426239
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes providing a transparent substrate having predefined active regions and non-active regions. Thereafter, the method includes spraying droplets of a lacquer on the predefined active regions to form corresponding lacquer layer regions, such that the non-active regions do not have presence of the lacquer. The lacquer layer regions are of a predefined thickness to enable their functional texturing. Texturing of lacquer layer enables light trapping or light extraction. Thereafter, one or more semiconductor layers are deposited o the lacquer layer regions and a cover substrate is provided. The cover substrate is joined to the transparent substrate at a portion of the non-active regions and encapsulates the lacquer layer regions and the one or more semiconductor layers between itself and the transparent substrate.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: April 23, 2013
    Inventor: Patrick Peeters
  • Publication number: 20130095596
    Abstract: The surface of silicon is textured to create black silicon on a nano-micro scale by electrochemical reduction of a silica layer on silicon in molten salts. The silica layer can be a coating, or a layer caused by the oxidation of the silicon.
    Type: Application
    Filed: June 27, 2011
    Publication date: April 18, 2013
    Inventors: Derek John Fray, Eimutis Juzeliunas
  • Publication number: 20130095595
    Abstract: A method for producing a photovoltaic solar cell, including the following steps: A. texturizing a front (2) of a semiconductor substrate; B. generating a selective emitter doping on the front (2) of the semiconductor substrate by generating on the front (2) a first low-doped region (4) and a local high-doped region (3) within the first low-doped region; and C. applying at least one metal emitter contact structure to the front (2) of the semiconductor substrate, at least in the regions of local high doping, wherein, between method steps B and C, a respective silicon oxide layer (5a, 5b) is generated in a method step B1 simultaneously on the front and back of the semiconductor substrate via thermal oxidation.
    Type: Application
    Filed: June 16, 2011
    Publication date: April 18, 2013
    Applicant: Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V.
    Inventors: Sebastian Mack, Ulrich Jager, Andreas Wolf, Daniel Biro, Ralf Preu, Gero Kastner
  • Patent number: 8420435
    Abstract: A front contact thin-film solar cell is formed on a thin-film crystalline silicon substrate. Emitter regions, selective emitter regions, and a back surface field are formed through ion implantation processes. In yet another embodiment, a back contact thin-film solar cell is formed on a thin-film crystalline silicon substrate. Emitter regions, selective emitter regions, base regions, and a front surface field are formed through ion implantation processes.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: April 16, 2013
    Assignee: Solexel, Inc.
    Inventors: Virendra V. Rana, Pawan Kapur, Mehrdad M. Moslehi
  • Patent number: 8420436
    Abstract: A solar cell manufacturing method according to the present invention is a solar cell manufacturing method that forms a transparent conductive film of ZnO as an electric power extracting electrode on a light incident side, the method comprises at least in a following order: a process A forming the transparent conductive film on a substrate by applying a sputtering voltage to sputter a target made of a film formation material for the transparent conductive film; a process B forming a texture on a surface of the transparent conductive film; a process C cleaning the surface of the transparent conductive film on which the texture has been formed using an UV/ozone; and a process D forming an electric power generation layer on the transparent conductive film.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: April 16, 2013
    Assignee: ULVAC, Inc.
    Inventors: Hirohisa Takahashi, Satoru Ishibashi, Sadayuki Ukishima, Masahide Matsubara, Satoshi Okabe
  • Patent number: 8415187
    Abstract: Methods for forming semiconductor devices include providing a crystalline template having an initial grain size, annealing the crystalline template, the annealed template having a final grain size larger than the initial grain size, forming a buffer layer over the annealed template, and forming a semiconductor layer over the buffer layer.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: April 9, 2013
    Assignee: Solexant Corporation
    Inventors: Leslie G. Fritzemeier, Christopher J. Vineis
  • Publication number: 20130082343
    Abstract: One of disclosed embodiments provides a photoelectric conversion device, comprising a member including a first surface configured to receive light, and a second surface opposite to the first surface, and a plurality of photoelectric conversion portions aligned inside the member in a depth direction from the first surface, wherein at least one of the plurality of photoelectric conversion portions other than the photoelectric conversion portion positioned closest to the first surface includes, on a boundary surface thereof with the member, unevenness having a difference in level larger than a difference in level of unevenness of the photoelectric conversion portion positioned closest to the first surface, and wherein the boundary surface having the unevenness is configured to localize or resonate light incident on the member from a side of the first surface around the boundary surface having the unevenness.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 4, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Fudaba, Masatsugu Itahashi, Masahiro Kobayashi, Hideo Kobayashi
  • Publication number: 20130081680
    Abstract: Solar cells with doped groove regions separated by ridges and methods of fabricating solar cells are described. In an example, a solar cell includes a substrate having a surface with a plurality of grooves and ridges. A first doped region of a first conductivity type is disposed in a first of the grooves. A second doped region of a second conductivity type, opposite the first conductivity type, is disposed in a second of the grooves. The first and second grooves are separated by one of the ridges.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 4, 2013
    Inventors: Steven Edward Molesa, Thomas Pass, Steve Kraft
  • Patent number: 8409899
    Abstract: A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: April 2, 2013
    Assignee: Intnernational Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy, Charles F. Musante, Richard J. Rassel
  • Publication number: 20130078756
    Abstract: An aqueous alkaline etching and cleaning composition for treating the surface of silicon substrates, the said composition comprising: (A) a quaternary ammonium hydroxide; and (B) a component selected from the group consisting of water-soluble acids and their water-soluble salts of the general formulas (I) to (V): (R1—S03-)nXn+ (I), R—P032?(Xn+)3-n (II); (RO—S03-)nXn+ (III), RO—P032?(Xn+)3-n, (IV), and [(RO)2P02-]nXn+ (V); wherein the n=1 or 2; X is hydrogen or alkaline or alkaline-earth metal; the variable R1 is an olefinically unsaturated aliphatic or cycloaliphatic moiety and R is R1 or an alkylaryl moiety; the use of the composition for treating silicon substrates, a method for treating the surface of silicon substrates, and methods for manufacturing devices generating electricity upon the exposure to electromagnetic radiation.
    Type: Application
    Filed: June 1, 2011
    Publication date: March 28, 2013
    Applicant: BASF SE
    Inventors: Berthold Ferstl, Simon Braun, Achim Fessenbecker