Abstract: Methods of creating a workpiece having a smooth side and a textured side are disclosed. In some embodiments, a first side of a workpiece is doped, using ion implantation or diffusion, to create a doped layer. This doped layer of the first side may be more resistant to chemical treatment than the second side of the workpiece. This allows the second side of the workpiece to be textured without capping or otherwise protecting the doped first side, even though the doped layer of the first side physically contacts the chemical treatment. In some embodiments, a p-type dopant is used to create the doped layer. In some embodiments, the workpiece is processed to form a solar cell.

Abstract: A method of manufacturing see-through thin film solar cells includes the steps of: placing a patterned photo mask above a first substrate which has a photoelectric conversion film formed on the surface thereof; and ablating the photoelectric conversion film via a laser beam passing through the patterned photo mask to form at least one hollow-out zone with different transmittance. By incorporating the laser beam with the photo mask in the manufacturing process, the problem of shortened laser lifespan caused by frequent switching of the laser for ablating patterns that occurs to the conventional technique can be resolved. Through controlling the thickness of the patterned photo mask, grey scale patterns can be displayed and resolution thereof can also be increased, thereby improve the added value of the thin film solar cells.

Abstract: Certain example embodiments relate to techniques for creating improved photovoltaic (PV) modules. In certain example embodiments and first and second glass substrate are provided. A PV array is provided between the first and second glass substrates. The first and second substrates are laminated together with the PV array between the glass substrates. In certain example embodiments the PV module is dimensioned to be similar to an existing roof system (e.g., a sunroof) in a vehicle. In certain example embodiments, holes are provided in a PV module sandwiched between two substrates, the holes being shaped and arranged within the PV module so as to allow light transmission into the vehicle at desired level while still being substantially filled by the laminate or adhesive material used to secure the PV module to the two surrounding substrates.

Abstract: The present invention reduces the time required to manufacture a solar cell. After etching main surfaces (10B1, 10B2) of a crystalline silicon substrate (10B) using one etching solution, the main surfaces (10B1, 10B2) of the crystalline silicon substrate (10B) are etched at a lower etching rate than the etching performed using the one etching solution by using another etching solution that has a higher concentration of etching components than the one etching solution. In this way, a textured structure is formed in the main surfaces (10B1, 10B2) of the crystalline silicon substrate (10B).

Abstract: A novel reversal lithography process without etch back is described. The reversal material comprises nanoparticles that are selectively deposited into the gaps between features without overcoating the tops of the features. As a result, a patterned imaging layer can be removed using solvent, blanket exposure followed by developer washing, or dry etching directly, without an etch-back process, and the original bright field lithography pattern can be reversed into dark field features, and transferred into subsequent layers using the nanoparticle reversal material as an etch mask.

Abstract: A photovoltaic device includes a substrate; a back contact layer disposed above the substrate; an absorber layer for photon absorption disposed above the back contact layer; a buffer layer disposed above the absorber layer; a conductive coating disposed above the buffer layer; and a transparent conductive layer disposed over the conductive coating. The conductive coating includes at least one type of nanomaterial, which has at least one dimension in the range of from 0.5 nm to 1000 nm.

Abstract: An optoelectronic device includes: (1) a top transparent electrode; (2) a bottom electrode spaced apart from the top transparent electrode; and (3) nanopillars arranged between the top transparent electrode and the bottom electrode such that each of the nanopillars includes a top end electrically connected to the top transparent electrode and a bottom end electrically connected to the bottom electrode. The top transparent electrode is shaped to provide optical elements each arranged to couple light into or out of a respective one of the nanopillars.

Abstract: This invention relates to a method of manufacturing a substrate for photoelectric conversion device including, on a substrate, a first electrode layer formed of a transparent conductive material. The method includes a first transparent conductive film forming step of forming a first transparent conductive film on the substrate, a second transparent conductive film forming step of forming a second transparent conductive film under a film forming condition that an etching rate is low compared with the first transparent conductive film at a later etching step, and an etching step of wet-etching the second and first transparent conductive films to form recesses that pierce through at least the second transparent conductive film, with the bottoms of the recesses being present in the first transparent conductive film.

Abstract: Embodiments of the invention generally relate to solar cell devices and methods for manufacturing such solar cell devices. In one embodiment, a method for forming a solar cell device includes depositing a conversion layer over a first surface of a substrate, depositing a first transparent conductive oxide layer over a second surface of the substrate that is opposite the first surface, depositing a first p-doped silicon layer over the first transparent conductive oxide layer, depositing a first intrinsic silicon layer over the first p-doped silicon layer, and depositing a first n-doped silicon layer over the first intrinsic silicon layer. The method further includes depositing a second transparent conductive oxide layer over the first n-doped silicon layer, and depositing an electrically conductive contact layer over the second transparent conductive oxide layer.

Abstract: A novel surface texturing provides improved light-trapping characteristics for photovoltaic cells. The surface is asymmetric and includes shallow slopes at between about 5 and about 30 degrees from horizontal as well as steeper slopes at about 70 degrees or more from horizontal. It is advantageously used as either the front or back surface of a thin semiconductor lamina, for example between about 1 and about 20 microns thick, which comprises at least the base or emitter of a photovoltaic cell. In embodiments of the present invention, the shallow slopes are formed using imprint photolithography.

Abstract: Provided is a wafer for solar cell which can be produced using a polycrystalline semiconductor wafer cut out using a bonded abrasive wire, which wafer can be used for manufacturing a solar cell with high conversion efficiency. In a wafer for solar cell before acid texturing of the present invention, produced from a polycrystalline semiconductor wafer cut out using a bonded abrasive wire, an amorphous layer does not exist, and irregularities caused due to the cutting using the bonded abrasive wire are left in at least one surface of the wafer for solar cell.

Abstract: A nano-scale tower structure array having increased surface area on each tower for gathering incident light is provided for use in three-dimensional solar cells. Embodiments enhance surface roughness of each tower structure to increase the surface area available for light gathering. Enhanced roughness can be provided by manipulating passivation layer etching parameters used during a formation process of the nano-scale tower structures, in order to affect surface roughness of a photoresist layer used for the etch. Manipulable etching parameters can include power, gas pressure, and etching compound chemistry.

Abstract: A process for forming a nano-element structure is provided that includes contacting a template with a material to form the nano-element structure having an array of nano-elements and a base physically connecting the array of nano-elements. The material that is contacted with the template is the nano-element structure material or precursor material from which the array of nano-elements is formed. The nano-element structure is then removed from contact with the template. The nano-element structure material or its precursor is brought into contact with the template for the forming of the array of nano-elements by techniques such as nano-imprinting and printing. A final substrate subsequently supports the array of nano-elements so produced. The array of nano-elements is exposed free and at least one layer of a dopant layer, a spacer layer, a light absorber layer, a conductor, or a counter electrode layer, are employed to complete an operative device.

Abstract: A method (300) for etching a silicon surface (116) to reduce reflectivity. The method (300) includes electroless deposition of copper nanoparticles about 20 nanometers in size on the silicon surface (116), with a particle-to-particle spacing of 3 to 8 nanometers. The method (300) includes positioning (310) the substrate (112) with a silicon surface (116) into a vessel (122). The vessel (122) is filled (340) with a volume of an etching solution (124) so as to cover the silicon surface (116). The etching solution (124) includes an oxidant-etchant solution (146), e.g., an aqueous solution of hydrofluoric acid and hydrogen peroxide. The silicon surface (116) is etched (350) by agitating the etching solution (124) with, for example, ultrasonic agitation, and the etching may include heating (360) the etching solution (124) and directing light (365) onto the silicon surface (116). During the etching, copper nanoparticles enhance or drive the etching process.

Abstract: A photoelectric conversion device with a novel anti-reflection structure. In the photoelectric conversion device, a front surface of a semiconductor substrate which serves as a light-receiving surface is covered with a group of whiskers (a group of nanowires) so that surface reflection is reduced. In other words, a semiconductor layer which has a front surface where crystals grow so that whiskers are formed is provided on the light-receiving surface side of the semiconductor substrate. The semiconductor layer has a given uneven structure, and thus has effects of reducing reflection on the front surface of the semiconductor substrate and increasing conversion efficiency.

Abstract: A method of producing a structure comprising a substrate (11) having at least one integral first face at a first angle relative to a normal from the substrate, at least one second integral second face at a second angle relative to a normal from the substrate; with a cavity in the structure between the first and second faces; the method comprising the steps of: coating a portion (15) of the first face with a first conducting layer; coating a portion (18) of the second face with a second conducting layer; and depositing in the cavity an active material (31) to provide ohmic and rectifying contacts for insertion or extraction of charge from the active material by way of the first and second conducting layers. The active material may be photovoltaic, light emitting or ion conducting.

Abstract: Disclosed are configurations of long-range ordered features of solar cell materials, and methods for forming same. Some features include electrical access openings through a backing layer to a photovoltaic material in the solar cell. Some features include textured features disposed adjacent a surface of a solar cell material. Typically the long-range ordered features are formed by ablating the solar cell material with a laser interference pattern from at least two laser beams.

Abstract: A thin film solar cell includes a first substrate, a transparent conductive layer on an inner surface of the first substrate, the transparent conductive layer having an uneven top surface and including through-holes, a light-absorbing layer on the transparent conductive layer, a reflection electrode on the light-absorbing layer, a second substrate facing and attached with the first substrate, and a polymeric material layer on an inner surface of the second substrate.

Abstract: The present disclosure provides a catalyst-free growth mode of defect-free Gallium Arsenide (GaAs)-based nanoneedles on silicon (Si) substrates with a complementary metal-oxide-semiconductor (CMOS)-compatible growth temperature of around 400° C. Each nanoneedle has a sharp 2 to 5 nanometer (nm) tip, a 600 nm wide base and a 4 micrometer (?m) length. Thus, the disclosed nanoneedles are substantially hexagonal needle-like crystal structures that assume a 6° to 9° tapered shape. The 600 nm wide base allows the typical micro-fabrication processes, such as optical lithography, to be applied. Therefore, nanoneedles are an ideal platform for the integration of optoelectronic devices on Si substrates. A nanoneedle avalanche photodiode (APD) grown on silicon is presented in this disclosure as a device application example. The APD attains a high current gain of 265 with only 8V bias.

Abstract: Multi-crystalline silicon processing techniques are provided. In one aspect, a method for roughening a multi-crystalline silicon surface is provided. The method includes the following steps. The multi-crystalline silicon surface is coated with a diblock copolymer. The diblock copolymer is annealed to form nanopores therein. The multi-crystalline silicon surface is etched through the nanopores in the diblock copolymer to roughen the multi-crystalline silicon surface. The diblock copolymer is removed. A multi-crystalline silicon substrate with a roughened surface having a plurality of peaks and troughs is also provided, wherein a distance from one peak to an adjacent peak on the roughened surface is from about 20 nm to about 400 nm.

Abstract: Novel methods of producing photovoltaic cells are provided herein, as well as photovoltaic cells produced thereby, and uses thereof. In some embodiments, a method as described herein comprises doping a substrate so as to form a p+layer on one side and an n+layer on an another side, removing at least a portion of the n+layer, and then forming a second n+layer, such that a concentration of the n-dopant in the second n+layer is variable throughout a surface of the substrate.

Abstract: A technique includes fabricating a layered precursor including: depositing a first film including a first indium gallium selenide compound on a substrate; then depositing a second film including a CuSe compound; then heating the substrate, the first film and the second film to convert the CuSe compound in the second film to a Cu2-xSe (0.2=?x?1) compound; then reactively depositing a third film including a second indium gallium selenide compound to convert the first film, the second film and the third film into a CIGS absorber film; and forming nanoscale morphological asymmetries in the CIGS absorber film, wherein a surface portion of the CIGS absorber film has a distribution of grain sizes with gaps between most of their surface area characterized by reentrant angles which effectively trap light.

Abstract: The surface of silicon is textured to create black silicon on a nano-micro scale by electrochemical reduction of a silica layer on silicon in molten salts. The silica layer can be a coating, or a layer caused by the oxidation of the silicon.

Abstract: A method for making light emitting diode includes the following steps. A substrate is provided. A first semiconductor layer is grown on a surface of the substrate. A patterned mask layer is located on a surface of the first semiconductor layer, and the patterned mask layer includes a number of bar-shaped protruding structures, a slot is defined between each two adjacent protruding structures to expose a portion of the first semiconductor layer. The exposed first semiconductor layer is etched to form a protruding pair. A number of three-dimensional nano-structures are formed. An active layer and a second semiconductor layers are grown on the number of three-dimensional nano-structures in that order. The substrate is removed and a surface of the first semiconductor layer is exposed. A first electrode is applied to cover the exposed surface. A second electrode is electrically connected with the second semiconductor layer.

Abstract: Semiconductor photovoltaic cells have surfaces that are textured for processing and photovoltaic reasons. The absorbing regions may have parallel grooves that reduce loss of solar energy that would otherwise be lost by reflection. One form of texturing has parallel grooves and ridges. The cell also includes regions of metallization for collecting the generated electrical carriers and conducting them away, which may be channels. The topography is considered during production, using a process that takes advantage of the topography to govern what locations upon will receive a specific processing, and which locations will not receive such a processing. Liquids are treated directly into zones of the cell. They migrate throughout a zone and act upon the locations contacted. They do not migrate to other zones, due to impediments to fluid flow that are features of the surface texture, such as edges, walls and ridges.

Abstract: An integrated circuit device is provided. The integrated circuit device can include a substrate; a first radiation-sensing element disposed over a first portion of the substrate; and a second radiation-sensing element disposed over a second portion of the substrate. The first portion comprises a first radiation absorption characteristic, and the second portion comprises a second radiation absorption characteristic different from the first radiation absorption characteristic.

Abstract: A nano-scale tower structure array having increased surface area on each tower for gathering incident light is provided for use in three-dimensional solar cells. Embodiments enhance surface roughness of each tower structure to increase the surface area available for light gathering. Enhanced roughness can be provided by manipulating passivation layer etching parameters used during a formation process of the nano-scale tower structures, in order to affect surface roughness of a photoresist layer used for the etch. Manipulable etching parameters can include power, gas pressure, and etching compound chemistry.

Abstract: A solar cell is disclosed. The solar cell includes a transparent conductive layer formed on a substrate, microstructures protruding vertically aslant from a surface of the transparent conductive layer, an electron transport layer configured to cover the microstructures and formed of an electron transport metal oxide, a light absorber adhered to inner pores and a surface of the electron transport layer, a hole transport layer configured to cover the surface of the electron transport layer and formed of a hole transport material, and an electrode formed on the hole transport layer. In the solar cell, the thickness of a light absorption layer can be maximized to obtain a high current density and high photoelectric conversion efficiency.

Abstract: A method of manufacturing see-through thin film solar cells includes the steps of: placing a patterned photo mask above a first substrate which has a photoelectric conversion film formed on the surface thereof; and ablating the photoelectric conversion film via a laser beam passing through the patterned photo mask to form at least one hollow-out zone with different transmittance. By incorporating the laser beam with the photo mask in the manufacturing process, the problem of shortened laser lifespan caused by frequent switching of the laser for ablating patterns that occurs to the conventional technique can be resolved. Through controlling the thickness of the patterned photo mask, grey scale patterns can be displayed and resolution thereof can also be increased, thereby improve the added value of the thin film solar cells.

Abstract: A method for making light emitting diode is provided. The method includes following steps. A substrate is provided. A first semiconductor layer is grown on a surface of the substrate. A patterned mask layer is located on a surface of the first semiconductor layer, and the patterned mask layer includes a number of bar-shaped protruding structures, a slot is defined between each two adjacent protruding structures to expose a portion of the first semiconductor layer. The exposed first semiconductor layer is etched to form a protruding pair. A number of three-dimensional nano-structures are formed by removing the patterned mask layer. An active layer and a second semiconductor layers are grown on the number of three-dimensional nano-structures in that order. A first electrode is electrically connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer.

Abstract: A method for making light emitting diode includes following steps. A substrate is provided. A first semiconductor layer is grown on a surface of the substrate. A patterned mask layer is located on a surface of the first semiconductor layer, and the patterned mask layer includes a number of bar-shaped protruding structures, a slot is defined between each two adjacent protruding structures to expose a portion of the first semiconductor layer. The exposed first semiconductor layer is etched to form a protruding pair. A number of three-dimensional nano-structures are formed by removing the patterned mask layer. An active layer and a second semiconductor layers are grown on the number of three-dimensional nano-structures in that order. A first electrode is electrically connected with the first semiconductor layer. A second electrode is located to cover the entire surface of the second semiconductor layer which is away from the active layer.

Abstract: Novel laser processed semiconductor materials, systems, and methods associated with the manufacture and use of such materials are provided. In one aspect, for example, a method of processing a semiconductor material can include providing a semiconductor material and irradiating a target region of the semiconductor material with a beam of laser radiation to form a laser treated region. The laser radiation is irradiated at an angle of incidence relative to the semiconductor material surface normal of from about 5° to about 89°, and the laser radiation can be at least substantially p-polarized.

Abstract: Capacitance between a detection capacitor and a reset transistor is the largest among the capacitances between the detection capacitor and transistors placed around the detection capacitor. In order to reduce this capacitance, it is effective to reduce the channel width of the reset transistor. It is possible to reduce the effective channel width by distributing, in the vicinity of the channel of the reset transistor and the boundary line between an active region and an element isolation region, ions which enhance the generation of carriers of an opposite polarity to the channel.

Abstract: A method for manufacturing a layer arrangement in accordance with various embodiments may include: providing a first layer having a side; forming one or more nanoholes in the first layer that are open towards the side of the first layer; depositing a second layer over the side of the first layer.

Abstract: Monocrystalline semiconductor substrates are textured with alkaline solutions to form pyramid structures on their surfaces to reduce incident light reflectance and improve light absorption of the wafers. The alkaline baths include hydantoin compounds and derivatives thereof in combination with alkoxylated glycols to inhibit the formation of flat areas between pyramid structures to improve the light absorption.

Abstract: The present invention relates to cost effective methods for metallization and or metallization and interconnection of high efficiency silicon based back-contacted back-junction solar panels and solar panels thereof having a multiplicity of alternating rectangular emitter- and base regions on the back-side of each cell, each with rectangular metallic electric finger conductor above and running in parallel with the corresponding emitter- and base region, a first insulation layer in-between the wafer and finger conductors, and a second insulation layer in between the finger conductors and cell interconnections.

Abstract: A plasmonically enhanced electro-optic device includes a dielectric layer; a plurality of nanopillars arranged in a periodic array such that each nanopillar has a protruding portion that extends beyond a surface of the dielectric layer; a metallic layer formed on the surface of the dielectric layer and on portions of the plurality of nanopillars by an oblique directional deposition such that the metallic layer defines a periodic array of nano-holes and nano-antennas, each nano-hole of the periodic array of nano-holes being in a deposition shadow region of a corresponding nanopillar; and an electrode electrically connected to at least one nanopillar of the plurality of nanopillars at an end opposing the protruding portion thereof.

Abstract: Methods of fabricating solar cell emitter regions using etch resistant films and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a plurality of regions of N-type doped silicon nano-particles on a first surface of a substrate of the solar cell. A P-type dopant-containing layer is formed on the plurality of regions of N-type doped silicon nano-particles and on the first surface of the substrate between the regions of N-type doped silicon nano-particles. A capping layer is formed on the P-type dopant-containing layer. An etch resistant layer is formed on the capping layer. A second surface of the substrate, opposite the first surface, is etched to texturize the second surface of the substrate. The etch resistant layer protects the capping layer and the P-type dopant-containing layer during the etching.

Abstract: Solar cells with silicon oxynitride dielectric layers and methods of forming silicon oxynitride dielectric layers for solar cell fabrication are described. For example, an emitter region of a solar cell includes a portion of a substrate having a back surface opposite a light receiving surface. A silicon oxynitride (SiOxNy, 0<x, y) dielectric layer is disposed on the back surface of the portion of the substrate. A semiconductor layer is disposed on the silicon oxynitride dielectric layer.

Abstract: Provided is a solar cell including a first electrode, a first semiconductor layer on the first electrode, a second semiconductor layer on the first semiconductor layer, and a second electrode on the second semiconductor layer. The second semiconductor layer may include a nano wire that may be formed along a grain boundary of a top surface thereof to have a mesh-shaped structure.

Abstract: A method of manufacturing antireflective coating for solar cell having a moth-eye structure and a solar cell including the same are provided to greatly reduce reflectivity by forming an antireflective coating layer having a moth-eye structure on an upper electrode layer of the solar cell using a bottom-up method. A bottom electrode layer is formed on a substrate. A photoreactive layer is formed on the bottom electrode layer. The photoreactive layer is made of CIS (Copper, Indium, Selenide) materials. A buffer layer is formed on the photoreactive layer. A ZnO layer is formed on the buffer layer. A top electrode layer is formed on the ZnO layer.

Abstract: Methods of fabricating solar cell emitter regions using N-type doped silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a plurality of regions of N-type doped silicon nano-particles on a first surface of a substrate of the solar cell. A P-type dopant-containing layer is formed on the plurality of regions of N-type doped silicon nano-particles and on the first surface of the substrate between the regions of N-type doped silicon nano-particles. At least a portion of the P-type dopant-containing layer is mixed with at least a portion of each of the plurality of regions of N-type doped silicon nano-particles.

Abstract: A method of fabricating submicron textures on glass and transparent conductors includes depositing a plurality of silica or silica-coated polystyrene nanospheres onto a substrate, etching the silica coated polystyrene nanospheres and the substrate to form a plurality of nanocone projections on a first side of the substrate, and depositing a transparent conducting oxide onto the substrate on top of the nanocone projections.

Abstract: A method of manufacturing a solar cell is disclosed. The method includes forming a dielectric film on a semiconductor substrate doped with a first conductive type impurity, exposing a high concentration doping region of a predetermined selective emitter by partially removing the dielectric film, and ion-implanting a second conductive type impurity into a front surface of the semiconductor substrate with the dielectric film formed thereon to form a high concentration doping layer in the semiconductor substrate to correspond to the high concentration doping region and to form a low concentration doping layer in the semiconductor substrate to correspond to a region in which the dielectric film is formed.

Abstract: A coherent spin field effect transistor is provided by depositing a ferromagnetic base like cobalt on a substrate. A magnetic oxide layer is formed on the cobalt by annealing at temperatures on the order of 1000° K to provide a few monolayer thick layer. Where the gate is cobalt, the resulting magnetic oxide is Co3O4(111). Other magnetic materials and oxides may be employed. A few ML field of graphene is deposited on the cobalt (III) oxide by molecular beam epitaxy, and a source and drain are deposited of base material. The resulting device is scalable, provides high on/off rates, is stable and operable at room temperature and easily fabricated with existing technology.

Abstract: A semiconductor device comprises a semiconductor substrate, and a multilayer wiring structure arranged on the semiconductor substrate, the multilayer wiring structure including a plurality of first electrically conductive lines, an insulating film covering the plurality of first electrically conductive lines, and a second electrically conductive line arranged on the insulating film so as to intersect the plurality of first electrically conductive lines, wherein the insulating film has gaps in at least some of a plurality of regions where the plurality of first electrically conductive lines and the second electrically conductive line intersect each other, and a width of the gap in a direction along the second electrically conductive line is not larger than a width of the first electrically conductive line.

Abstract: A multilayer anti-reflection structure for a backside contact solar cell. The anti-reflection structure may be formed on a front side of the backside contact solar cell. The anti-reflection structure may include a passivation level, a high optical absorption layer over the passivation level, and a low optical absorption layer over the high optical absorption layer. The passivation level may include silicon dioxide thermally grown on a textured surface of the solar cell substrate, which may be an N-type silicon substrate. The high optical absorption layer may be configured to block at least 10% of UV radiation coming into the substrate. The high optical absorption layer may comprise high-k silicon nitride and the low optical absorption layer may comprise low-k silicon nitride.

Abstract: Described herein is a photovoltaic device operable to convert light to electricity, comprising a substrate, a first junction, a second junction and a third junction; wherein the first junction and the second junction are arranged with opposite polarity and the second junction and the third junction are arranged with opposite polarity. The photovoltaic device may further comprise a terminal directly electrically connected to anodes of the first and second junctions or to cathodes of the first and second junctions.

Abstract: A dry etching apparatus includes a tray for conveying substrates. The tray has substrate housing holes as through holes each capable of housing the three substrates. The substrates are supported by a substrate support section protruding from a hole wall of each of the substrate housing holes. A stage is provided in a chamber in which plasma is generated. The stage includes substrate installation sections to be inserted from a lower surface side of the tray to the substrate housing holes so that lower surfaces of the plurality of the substrates transferred from the substrate support section are installed on substrate installation surfaces that are their upper end surfaces. High shape controllability and favorable productivity for the angular substrate can be implemented while preventing increased in size of the apparatus.

Abstract: A photodiode array PDA1 is provided with a substrate S wherein a plurality of photodetecting channels CH have an n-type semiconductor layer 32. The photodiode array PDA1 is provided with a p? type semiconductor layer 33 formed on the n-type semiconductor layer 32, resistors 24 provided for the respective photodetecting channels CH and each having one end portion connected to a signal conducting wire 23, and an n-type separating portion 40 formed between the plurality of photodetecting channels CH. The p? type semiconductor layer 33 forms pn junctions at an interface to the n-type semiconductor layer 32 and has a plurality of multiplication regions AM for avalanche multiplication of carriers generated with incidence of detection target light, corresponding to the respective photodetecting channels. An irregular asperity 10 is formed in a surface of the n-type semiconductor layer 32 and the surface is optically exposed.