Vertically Arranged (e.g., Tandem, Stacked, Etc.) Patents (Class 438/74)
  • Patent number: 6852566
    Abstract: A PIN active pixel sensor array including self aligned encapsulated electrodes and a method for forming the same the method including forming an electrically conductive layer over a substrate; forming a first doped semiconductor layer over the conductive layer; photolithographically patterning and etching through a thickness portion of the first doped semiconductor layer and conductive layer to expose the substrate to form a plurality of spaced apart electrodes having an upper portion comprising the first doped semiconductor layer; blanket depositing a second doped semiconductor layer to cover the spaced apart electrodes including the exposed substrate; and, etching through at least a thickness portion of the second doped semiconductor layer.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: February 8, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventor: Dun-Nian Yaung
  • Publication number: 20040261837
    Abstract: A multi-junction solar cell device (10) is provided. The multi-junction solar cell device (10) comprises either two or three active solar cells connected in series in a monolithic structure. The multi-junction device (10) comprises a bottom active cell (20) having a single-crystal silicon substrate base and an emitter layer (23). The multi-junction device (10) further comprises one or two subsequent active cells each having a base layer (32) and an emitter layer (23) with interconnecting tunnel junctions between each active cell. At least one layer that forms each of the top and middle active cells is composed of a single-crystal semiconductor alloy that is substantially lattice-matched to the silicon substrate (22). The polarity of the active p-n junction cells is either p-on-n or n-on-p.
    Type: Application
    Filed: May 27, 2004
    Publication date: December 30, 2004
    Inventors: Daniel J Friedman, John F Geisz
  • Patent number: 6809250
    Abstract: In a method of repairing a solar panel having a defective solar cell or cells, a replacement cell (or cells) is glued onto a defective solar cell or cells of the solar panel, and is electrically integrated in the solar panel.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: October 26, 2004
    Assignee: Astrium GmbH
    Inventor: Reiner Gerson
  • Publication number: 20040206389
    Abstract: On a surface of a GaAs substrate, layers to be a top cell are formed by epitaxial growth. On the top cell, layers to be a bottom cell are formed. Thereafter, on a surface of the bottom cell, a back surface electrode is formed. Thereafter, a glass plate is adhered to the back surface electrode by wax. Then, the GaAs substrate supported by the glass plate is dipped in an alkali solution, whereby the GaAs substrate is removed. Thereafter, a surface electrode is formed on the top cell. Finally the glass plate is separated from the back surface electrode. In this manner, a compound solar battery that improves efficiency of conversion to electric energy can be obtained.
    Type: Application
    Filed: March 22, 2004
    Publication date: October 21, 2004
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Tatsuya Takamoto, Takaaki Agui
  • Patent number: 6803513
    Abstract: A photovoltaic module includes at least a first and a second photovoltaic cell each having a substrate electrode, a top electrode and a photovoltaic semiconductor body disposed therebetween in electrical communication with the substrate electrode and the top electrode. Each cell includes a plurality of current collecting grid wires disposed atop the top electrode in electrical contact therewith. The grid wires of the first cell are in electrical communication with a current collecting bus bar and the grid wires of the second cell extend onto the first cell so as to establish an unbroken current path therebetween. The grid wires of the second cell may establish electrical communication with the substrate electrode of the first cell, in which case a series connection therebetween is established. Alternatively, the grid wires of the second cell may establish electrical communication with the top electrode of the first cell so as to create a parallel electrical connection therebetween.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: October 12, 2004
    Assignee: United Solar Systems Corporation
    Inventors: Kevin Beernink, Eric Akkashian
  • Patent number: 6790706
    Abstract: The present invention is directed to a leadless and interconnected semiconductor package. The package includes a first chip having bond pads with a second chip having bond pads positioned on the first chip to form a vertically stacked package. Interconnections between the bond pads are formed by metallized layers on the package that extend to an edge of the package to join castellations along sides of the package to form a plurality of leadless input/output locations for the package. In one embodiment, the castellations include planar metallized portions. In another embodiment, the castellations include semi-cylindrical metallized portions. In still another embodiment, insulators are positioned between the chips, and on the package base. In still another embodiment, a chip includes a photosensitive device having screening optical layers. Bond pads on the chip are electrically coupled to castellations extending from the bond pads to form leadless input/output locations for the package.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: September 14, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Boon Suan Jeung, Chia Yong Poo, Low Siu Waf
  • Publication number: 20040163698
    Abstract: A solar cell having a multifunction solar cell structure with a bypass diode is disclosed. The bypass diode provides a reverse bias protection for the multijunction solar cell structure. In one embodiment, the multifunction solar cell structure includes a substrate, a bottom cell, a middle cell, a top cell, a bypass diode, a lateral conduction layer, and a shunt. The lateral conduction layer is deposited over the top cell. The bypass diode is deposited over the lateral conduction layer. One side of the shunt is connected to the substrate and another side of the shunt is connected to the lateral conduction layer. In another embodiment, the bypass diode contains an i-layer to enhance the diode performance.
    Type: Application
    Filed: February 6, 2004
    Publication date: August 26, 2004
    Inventors: Paul R. Sharps, Daniel J. Aiken, Doug Collins, Mark A. Stan
  • Patent number: 6777715
    Abstract: An integrated circuit with a number of optical waveguides that are formed in high aspect ratio holes. The high aspect ratio holes extend through a semiconductor wafer. The optical waveguides include a highly reflective material that is deposited so as to line an inner surface of the high aspect ratio holes which may be filled with air or a material with an index of refraction that is greater than 1. These metal confined waveguides are used to transmit signals between functional circuits on the semiconductor wafer and functional circuits on the back of the wafer or beneath the wafer.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: August 17, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Joseph E. Geusic, Kie Y. Ahn, Leonard Forbes
  • Publication number: 20040118451
    Abstract: An alloy having a large band gap range is used in a multijunction solar cell to enhance utilization of the solar energy spectrum. In one embodiment, the alloy is In1-xGaxN having an energy bandgap range of approximately 0.7 eV to 3.4 eV, providing a good match to the solar energy spectrum. Multiple junctions having different bandgaps are stacked to form a solar cell. Each junction may have different bandgaps (realized by varying the alloy composition), and therefore be responsive to different parts of the spectrum. The junctions are stacked in such a manner that some bands of light pass through upper junctions to lower junctions that are responsive to such bands.
    Type: Application
    Filed: May 27, 2003
    Publication date: June 24, 2004
    Inventors: Wladyslaw Walukiewicz, Kin Man Yu, Junqiao Wu, William J. Schaff
  • Patent number: 6750394
    Abstract: A thin-film solar cell comprises a set of a transparent conductive layer and a photoelectric conversion layer laminated in this order on a substrate, wherein the photoelectric conversion layer is made of a p-i-n junction, the i-layer is made of a crystalline layer and the transparent conductive layer is provided with a plurality of holes at its surface of the side of the photoelectric conversion layer, each of said holes having irregularities formed on its surface.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: June 15, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Yamamoto, Kenji Wada
  • Patent number: 6743974
    Abstract: A multijunction solar cell comprising a silicon solar cell with a germanium solar cell formed on the backside of the silicon solar cell. The silicon solar cell and germanium solar cell are directly coupled via a p-p junction to inactivate interface dislocations. Preferably, the silicon solar cell comprises a p++ type silicon layer; an intrinsic silicon layer formed on the p++ type silicon layer; an n++ type silicon layer formed on the intrinsic type silicon layer; and a p-type silicon layer formed on the n++ type silicon layer. The germanium solar cell preferably comprises an n-type germanium layer; and a p-type germanium layer form on the n-type germanium layer. The p-type germanium layer is coupled to the p++ type silicon layer.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: June 1, 2004
    Assignee: Massachusetts Institute of Technology
    Inventors: Kazumi Wada, Lionel C. Kimerling
  • Patent number: 6734452
    Abstract: An AlxGa1−xAs/GaAs/AlxGa1−xAs quantum well exhibiting a bound-to-quasibound intersubband absorptive transition is described. The bound-to-quasibound transition exists when the first excited state has the same energy as the “top” (i.e., the upper-most energy barrier) of the quantum well. The energy barrier for thermionic emission is thus equal to the energy required for intersubband absorption. Increasing the energy barrier in this way reduces dark current. The amount of photocurrent generated by the quantum well is maintained at a high level.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: May 11, 2004
    Assignee: California Institute of Technology
    Inventors: Sarath Gunapala, John K. Liu, Jin S. Park, True-Lon Lin, Mani Sundaram
  • Patent number: 6723577
    Abstract: An integrated circuit with a number of optical fibers that are formed in high aspect ratio holes. The high aspect ratio holes extend through a semiconductor wafer. The optical fibers include a cladding layer and a core formed in the high aspect ratio hole. These optical fibers are used to transmit signals between functional circuits on the semiconductor wafer and functional circuits on the back of the wafer or beneath the wafer.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: April 20, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Joseph E. Geusic, Kie Y. Ahn, Leonard Forbes
  • Patent number: 6709885
    Abstract: A method of fabricating an image sensor having pin photodiodes residing vertically atop underlying CMOS control circuitry. In the preferred technique, pin photodiodes fabricated in amorphous silicon are utilized.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: March 23, 2004
    Assignee: Intel Corporation
    Inventors: Jack S. Uppal, David B. Fraser, Stephen Bradford Gospe, Kevin M. Connolly
  • Patent number: 6677516
    Abstract: A dye-sensitized photovoltaic cell comprising an electroconductive support, a porous photovoltaic layer constituted with a porous semiconductor layer containing a photosensitizing dye, a hole transporting layer, and a support on a counter electrode side, the porous photovoltaic layer having a multi-layer structure, and the semiconductor layer having a haze ratio at a wavelength in a visible light region of 60% or more.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: January 13, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuo Chiba, Masafumi Shimizu, Liyuan Han, Ryohsuke Yamanaka
  • Patent number: 6653165
    Abstract: For efficiently forming a semiconductor element with excellent adhesion and environment resistance, a semiconductor element forming method is configured to have a step of forming a plurality of pin junctions of a silicon-based material on a substrate by a high-frequency plasma CVD process under a pressure of not more than atmospheric pressure, and the method further has a step of forming a p-layer, an i-layer, and a portion of an n-layer of a first pin junction of the pin junctions or forming an n-layer, an i-layer, and a portion of a p-layer of a first pin junction of the pin junctions, and thereafter exposing the p-layer or the n-layer exposed in the surface, to an oxygen-containing atmosphere; a step of forming on the p-layer or the n-layer as exposed to the oxygen-containing atmosphere a layer of the same conductivity type as that of the p-layer or the n-layer; and a step of forming an n-layer or a p-layer of a second pin junction adjacent to the first pin junction to form a pn interface.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: November 25, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takaharu Kondo, Masafumi Sano, Akira Sakai, Koichi Matsuda, Yuzo Koda, Tadashi Hori
  • Patent number: 6653550
    Abstract: An integrated thin-film photoelectric conversion module includes a multi-layered film including a first electrode layer, a semiconductor layer and a second electrode layer stacked on a main surface of a substrate. The multi-layered film includes a cell region including a plurality of photoelectric conversion cells connected in series, a bypass diode region and a connection region. The connection region does not connect the bypass diode to the cell during reverse bias treatment of the cell and the bypass diode, while the connection region connects the bypass diode in antiparallel to at least one of the plurality of cells connected in series after the reverse bias treatment.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: November 25, 2003
    Assignee: Kaneka Corporation
    Inventors: Katsuhiko Hayashi, Tomomi Meguro
  • Patent number: 6613974
    Abstract: P-type and n-type regions are defined in the first surface of a substrate upon which is formed an epitaxial layer of preferably Si—Ge material, preferably capped by Si material. During epitaxy formation, dopant in the defined regions diffuses down to form p-type and n-type junctions in the Si material, and diffuses up to form p-type and n-type junctions in the Si—Ge epitaxial material. Si junctions are buried beneath the surface and are surface recombination velocity effects are reduced. Photon energy striking the second substrate surface generates electron-hole pairs that experience the high bandgap of the Si materials and the low bandgap of the Si—Ge epitaxy. The tandem structure absorbs photon energy from about 0.6 eV to about 3.5 eV and exhibits high conversion efficiency.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: September 2, 2003
    Assignee: Micrel, Incorporated
    Inventor: John Durbin Husher
  • Publication number: 20030140962
    Abstract: A solar cell having a multijunction solar cell structure with a bypass diode is disclosed. The bypass diode provides a reverse bias protection for the multijunction solar cell structure. In one embodiment, the multifunction solar cell structure includes a substrate, a bottom cell, a middle cell, a top cell, a bypass diode, a lateral conduction layer, and a shunt. The lateral conduction layer is deposited over the top cell. The bypass diode is deposited over the lateral conduction layer. One side of the shunt is connected to the substrate and another side of the shunt is connected to the lateral conduction layer. In another embodiment, the bypass diode contains an i-layer to enhance the diode performance.
    Type: Application
    Filed: October 24, 2002
    Publication date: July 31, 2003
    Inventors: Paul R. Sharps, Daniel J. Aiken, Doug Collins, Mark A. Stan
  • Patent number: 6600202
    Abstract: A compact sensing apparatus having reduced cross section and methods are provided for sensing the magnitude and direction of an electrical or magnetic field. The compact sensing apparatus and method preferably provide one of two transducer orientations in relation to the direction of the field arranged in the sensor apparatus to provide the smallest possible cross section. The compact sensing apparatus preferably includes a plurality of mounting pins. Each of the plurality of mounting pins preferably includes a first pin portion and a second pin portion connected to the first pin portion at a predetermined angle. The predetermined angle is preferably less than 180 degrees and more preferably in the range of about 70-110 degrees.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: July 29, 2003
    Assignee: Wolff Controls Corporation
    Inventors: Marshall E. Smith, Jr., Peter U. Wolff, Richard W. Stettler
  • Patent number: 6576490
    Abstract: The present invention relates to a method for micro-fabricating a pixelless thermal imaging device. The imaging device up-converts a sensed 2-dimensional M/FIR image into a 2-dimensional image in the NIR to visible spectrum in dependence thereupon. A plurality of layers forming an integrated QWIP-LED wafer are crystallographically grown on a surface of a first substrate. The layers comprise an etch stop layer, a bottom contact layer, a plurality of layers forming a QWIP and a LED, and a top contact layer. At the top of the QWIP-LED wafer an optical coupler such as a diffraction grating for coupling at least a portion of incident M/FIR light into modes having an electric field component perpendicular to quantum wells of the QWIP is provided. In following processing steps the first substrate and the etch stop layer are removed. Various different thermal imaging devices are manufactured by changing the order of manufacturing steps, omitting some steps or using different materials.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: June 10, 2003
    Assignee: National Research Council of Canada
    Inventors: Margaret Buchanan, Martin Byloos, Shen Chiu, Emmanuel Dupont, Mae Gao, Hui Chun Liu, Chun-ying Song
  • Patent number: 6566159
    Abstract: A method of manufacturing a tandem thin-film solar cell is provided, the solar cell including a plurality of photoelectric conversion units stacked on a substrate, the photoelectric conversion units each having a p-type layer, an i-type photoelectric conversion layer and an n-type layer deposited in this order from a light-incident side of the solar cell, and at least a rear unit among the photoelectric conversion units that is furthest from the light-incident side being a crystalline unit including a crystalline i-type photoelectric conversion layer. The manufacturing method includes the steps of forming at least one of the units on the substrate by plasma CVD and immediately thereafter forming an i-type boundary layer to a thickness of at most 5 nm by plasma CVD, and thereafter removing the substrate into the atmosphere to expose a surface of the i-type boundary layer to the atmosphere and then forming a crystalline unit on the i-type boundary layer by plasma CVD.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: May 20, 2003
    Assignee: Kaneka Corporation
    Inventors: Toru Sawada, Masashi Yoshimi
  • Patent number: 6552259
    Abstract: In this bypass-function added solar cell, a plurality of island-like p+ regions, which is third regions, are formed at a boundary between a p-type region and an n-type region layer constituting a substrate so that the p+ regions project into the region and the region and are separated away from the surface of the substrate. Therefore, in this solar cell, unlike prior art counterparts, the insulating film for isolating the p+ regions and the n electrodes constituting the np+ diode from one another is no longer necessary, thus allowing a reduction in manufacturing cost. As a result, a bypass-function added solar cell with a bypass-diode function added thereto can be provided with low cost and by simple process.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: April 22, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shigeyuki Hosomi, Tadashi Hisamatsu
  • Patent number: 6541298
    Abstract: An infrared sensor including a substrate, a plurality of infrared detection pixels arrayed on a substrate with each of the infrared detection pixels including an infrared absorption portion formed over the substrate and configured to absorb infrared radiation, a thermoelectric converter portion formed over the substrate and configured to convert a temperature change in the infrared absorption portion into an electrical signal, and support structures configured to support the thermoelectric converter portion and the infrared absorption portion over the substrate via a separation space, the support structures having conductive interconnect layers configured to deliver the electrical signal from the thermoelectric converter portion to the substrate.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: April 1, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshinori Iida, Keitaro Shigenaka, Naoya Mashio
  • Patent number: 6521967
    Abstract: A three-color QWIP focal plane array is based on a GaAs/AlGaAs material system. Three-color QWIPs enable target recognition and discriminating systems to precisely obtain the temperature of two objects in the presence of a third unknown parameter. The QWIPs are designed to reduce the normal reflection over a significant wavelength range. One aspect of the present invention involves two photon absorptions per transition in a double quantum well structure which is different from typical QWIP structures. This design is expected to significantly reduce the dark current as a result of higher thermionic barriers and therefore allow the devices to operate at elevated temperatures. The device is expected to be fabricate using a GaAs/AlxGa1−xAs material system on a semi-insulating GaAs substrate by Molecular Beam Epitacy (MBE).
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: February 18, 2003
    Assignee: California Institute of Technology
    Inventors: Sumith V. Bandara, John K. Liu, Daniel Wilson, Sarath D. Gunapala, William Parrish
  • Publication number: 20020179142
    Abstract: A multijunction solar cell comprising a silicon solar cell with a germanium solar cell formed on the backside of the silicon solar cell. The silicon solar cell and germanium solar cell are directly coupled via a p-p junction to inactivate interface dislocations. Preferably, the silicon solar cell comprises a p++ type silicon layer; an intrinsic silicon layer formed on the p++ type silicon layer; an n++ type silicon layer formed on the intrinsic type silicon layer; and a p-type silicon layer formed on the n++ type silicon layer. The germanium solar cell preferably comprises an n-type germanium layer; and a p-type germanium layer form on the n-type germanium layer. The p-type germanium layer is coupled to the p++ type silicon layer.
    Type: Application
    Filed: May 8, 2002
    Publication date: December 5, 2002
    Inventors: Kazumi Wada, Lionel C. Kimerling
  • Publication number: 20020139933
    Abstract: A supporting beam line for supporting, afloat in a cavity on a semiconductor substrate, an infrared detection pixel comprising an infrared absorption portion for absorbing an incident infrared ray and converting it into heat and a thermoelectric conversion portion for converting a temperature change caused by the heat generated in the infrared absorption portion into an electric signal is formed by a damascene metal on the same layer as the gate of a damascene metal gate MOS transistor to be used in a peripheral circuit. The supporting beam line comprises a conductor line with U-shaped cross section inside which a metal is filled.
    Type: Application
    Filed: March 29, 2002
    Publication date: October 3, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshinori Iida, Keitaro Shigenaka, Naoya Mashio
  • Patent number: 6437233
    Abstract: A solar cell comprises a superstrate formed from a material that is transparent to light, a first layer formed of delta doped silicon, a plurality of layers formed from semiconductor materials, each characterized by multi-quantum wells and multiple band gaps, a first semiconductor layer having a band gap energy state that is the smallest, the last semiconductor layer having-a band gap that is the largest, and the intermediate semiconductor layers having band gaps transitioning from the smallest to the largest, a second layer overlying the semiconductor layers and formed of delta doped silicon, an n-cap layer formed on the second delta doped layer, and a metal layer formed on the n-cap layer and serving to reflect light into the semiconductor.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: August 20, 2002
    Assignee: TRW Inc.
    Inventors: Dean Tran, George J. Vendura, Jr., William L. Jones, Edward A. Rezek
  • Patent number: 6420647
    Abstract: A thin film silicon solar cell is provided on a glass substrate, is illustrated, the glass having a textured surface, including larger scale surface features and smaller scale surface features. Over the surface is deposited a thin barrier layer which also serves as an anti-reflection coating. The barrier layer may be a silicon nitride layer for example and will be 70 nm ±20% in order to best achieve its anti-reflection function. Over the barrier layer is formed an essentially conformal silicon film having a thickness which is less than the dimensions of the larger scale features of the glass surface and of a similar dimension to the smaller scale features of the glass surface.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: July 16, 2002
    Assignee: Pacific Solar Pty Limited
    Inventors: Jing Jia Ji, Zhengrong Shi
  • Publication number: 20020040727
    Abstract: Apparatus and Method for Optimizing the Efficiency of Germanium Junctions in Multi-Junction Solar Cells. In a preferred embodiment, an indium gallium phosphide (InGaP) nucleation layer is disposed between the germanium (Ge) substrate and the overlying dual-junction epilayers for controlling the diffusion depth of the n-doping in the germanium junction. Specifically, by acting as a diffusion barrier to arsenic (As) contained in the overlying epilayers and as a source of n-type dopant for forming the germanium junction, the nucleation layer enables the growth time and temperature in the epilayer device process to be minimized without compromising the integrity of the dual-junction epilayer structure. This in turn allows the arsenic diffusion into the germanium substrate to be optimally controlled by varying the thickness of the nucleation layer.
    Type: Application
    Filed: June 19, 2001
    Publication date: April 11, 2002
    Inventors: Mark A. Stan, Nein Y. Li, Frank A. Spadafora, Hong Q. Hou, Paul R. Sharps, Navid S. Fatemi
  • Patent number: 6346811
    Abstract: A compact sensing apparatus having reduced cross section and methods are provided for sensing the magnitude and direction of an electrical or magnetic field. The compact sensing apparatus and method preferably provide one of two transducer orientations in relation to the direction of the field arranged in the sensor apparatus to provide the smallest possible cross section. The compact sensing apparatus preferably includes a plurality of mounting pins. Each of the plurality of mounting pins preferably is formed of a magnetic material and includes a first pin portion and a second pin portion connected to the first pin portion at a predetermined angle. The predetermined angle is preferably less than 180 degrees and more preferably in the range of about 70-110 degrees.
    Type: Grant
    Filed: December 3, 1999
    Date of Patent: February 12, 2002
    Assignee: Wolff Controls Corp.
    Inventors: Marshall E. Smith, Jr., Peter U. Wolff, Richard W. Stettler
  • Patent number: 6316716
    Abstract: A solar cell includes a substrate carrier for current generating photoactive layers that include at least one front layer and one layer toward the substrate of different polarities, a front contact, at least one back contact and an integral protective diode which has a polarity opposite the solar cell integrated in and disposed on a front side of the solar cell and including at least one diode semiconductor layer. A tunnel diode extends between the photoactive layers and a region of the substrate toward the front, the tunnel diode being recessed adjacent the protective diode. The region of the substrate toward the front, or a layer toward the front applied to or formed by the front, together with a photoactive layer of corresponding polarity toward the front, make up the at least one diode semiconductor layer of the protective diode.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: November 13, 2001
    Assignee: Angewandte Solarenergie - Ase GmbH
    Inventor: Just Hilgrath
  • Patent number: 6294794
    Abstract: A non-linear optical device includes a plurality of quantum dots in an active layer such that the quantum dots have a composition or doping modified asymmetric in a direction perpendicular to the active layer.
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: September 25, 2001
    Assignee: Fujitsu Limited
    Inventors: Tetsuzo Yoshimura, Toshiro Futatsugi
  • Patent number: 6288323
    Abstract: The present invention provides a thin film photoelectric conversion module, including a substrate and a plurality of thin film photoelectric conversion cells formed on the substrate and connected to each other in series to form a series-connected array.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: September 11, 2001
    Assignee: Kaneka Corporation
    Inventors: Katsuhiko Hayashi, Hideo Yamagishi
  • Patent number: 6278055
    Abstract: A stacked organic photosensitive optoelectronic device optimized to enhance desired characteristics such as external quantum efficiency and voltage is described. The photosensitive optoelectronic device has a plurality of photosensitive optoelectronic subcells electrically configured in series. The substrate may be the bottom electrode or there may be a bottom electrode distinct from the substrate. Each subcell comprises one or more organic photoconductive layers between electrode layers or charge transfer layers. In one embodiment the top electrode is transparent. In other embodiments two or more electrodes are transparent. In other embodiments photosensitive optoelectronic devices with multilayer photoconductive structures and photosensitive optoelectronic devices with a reflective layer or a reflective substrate are disclosed.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: August 21, 2001
    Assignee: The Trustees of Princeton University
    Inventors: Stephen R. Forrest, Vladimir Bulovic
  • Patent number: 6242686
    Abstract: A photovoltaic device have a pin junction of a p-layer, an i-layer and an n-layer, wherein the p-layer includes a first p-layer and a second p-layer thereover, the first p-layer having a thickness of 5 nm or less and being uniformly doped with a p-type impurity, and the second p-layer being formed by decomposition of a gas which does not positively incorporate a p-type impurity.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: June 5, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsushi Kishimoto, Takanori Nakano, Hitoshi Sannomiya, Katsuhiko Nomoto
  • Patent number: 6239354
    Abstract: A monolithically interconnected photovoltaic module having cells which are electrically connected which comprises a substrate, a plurality of cells formed over the substrate, each cell including a primary absorber layer having a light receiving surface and a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, and a cell isolation diode layer having a p-region, formed with a p-type dopant, and an n-region formed with an n-type dopant adjacent the p-region to form a single pn-junction, the diode layer intervening the substrate and the absorber layer wherein the absorber and diode interfacial regions of a same conductivity type orientation, the diode layer having a reverse-breakdown voltage sufficient to prevent inter-cell shunting, and each cell electrically isolated from adjacent cells with a vertical trench trough the pn-junction of the diode layer, interconnects disposed in the trenches contacting the absorber regions of adja
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: May 29, 2001
    Assignee: Midwest Research Institute
    Inventor: Mark W. Wanlass
  • Patent number: 6211529
    Abstract: An AlxGa1−xAs/GaAs/AlxGa1−xAs quantum well exhibiting a bound-to-quasibound intersubband absorptive transition is described. The bound-to-quasibound transition exists when the first excited state has the same energy as the “top” (i.e., the upper-most energy barrier) of the quantum well. The energy barrier for thermionic emission is thus equal to the energy required for intersubband absorption. Increasing the energy barrier in this way reduces dark current. The amount of photocurrent generated by the quantum well is maintained at a high level.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: April 3, 2001
    Assignee: California Institute of Technology
    Inventors: Sarath Gunapala, John K. Liu, Jin S. Park, True-Lon Lin, Mani Sundaram
  • Patent number: 6187609
    Abstract: A compact sensing apparatus having reduced cross section and methods are provided for sensing the magnitude and direction of an electrical or magnetic field. The compact sensing apparatus and method preferably provide one of two transducer orientations in relation to the direction of the field arranged in the sensor apparatus to provide the smallest possible cross section. The compact sensing apparatus preferably includes a plurality of mounting pins. Each of the plurality of mounting pins preferably includes a first pin portion and a second pin portion connected to the first pin portion at a predetermined angle. The predetermined angle is preferably less than 180 degrees and more preferably in the range of about 70-110 degrees.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: February 13, 2001
    Assignee: Wolff Controls Corporation
    Inventors: Marshall E. Smith, Jr., Peter U. Wolff, Richard W. Stettler
  • Patent number: 6184538
    Abstract: Quantum-well sensing arrays for detecting radiation with two or more wavelengths. Each pixel includes at least two different quantum-well sensing stacks that are biased at a common voltage.
    Type: Grant
    Filed: October 16, 1998
    Date of Patent: February 6, 2001
    Assignee: California Institute of Technology
    Inventors: Sumith V. Bandara, Sarath D. Gunapala, John K. Liu
  • Patent number: 6184057
    Abstract: The invention pertains to a method of manufacturing a photovoltaic foil supported by a carrier and comprising a plurality of photovoltaic layers which together have the ability of generating electric current from incident light, a back-electrode layer on one side adjacent and parallel to the photovoltaic layers, and a transparent conductor layer on the other side of, and adjacent and parallel to the photovoltaic layers, which method comprises the following subsequent steps: providing a temporary substrate, applying the transparent conductor layer, applying the photovoltaic layers, applying the back-electrode layer, applying the carrier, removing the temporary substrate, and, preferably, applying a top coat on the side of the transparent conductor layer.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: February 6, 2001
    Assignee: Akzo Nobel NV
    Inventors: Eleonoor Van Andel, Erik Middelman, Rudolf Emmanuel Isidore Schropp
  • Patent number: 6150605
    Abstract: A photovoltaic cell has a structure including a first electrode layer, a first photovoltaic layer, an electrically conductive layer, a second photovoltaic layer and a second electrode layer that are successively laminated, wherein the first photovoltaic layer is a semiconductor film containing a first colorant, the second photovoltaic layer is a semiconductor film containing a second colorant, the first colorant and the second colorant being different from each other, so that the first photovoltaic layer and the second photovoltaic layer have different photocurrent action spectra.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: November 21, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Liyuan Han
  • Patent number: 6117702
    Abstract: Described is a semiconductor photo detector comprising, between a lower electrode and an upper electrode, an optical absorption layer which generates photo carriers, receiving light and an amplification layer which amplifies the photo carriers so generated. In the semiconductor photo detector, the amplification layer is formed of a well layer which causes an avalanche phenomenon and a barrier layer which has a band gap larger than that of the optical absorption layer. The well layer is formed of a crystal substance, by which at the interface with the barrier layer, the energy value of the conduction band of the photo carriers in the well layer is lower than that in the barrier layer and at the same time, the difference in the energy value of the conduction band between the well layer and the barrier layer is larger than the band gap between the valence band and the conduction band of the well layer.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: September 12, 2000
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Takeshi Nakamura, Shinya Kyozuka, Takayuki Yamada, Yasuaki Miyamoto
  • Patent number: 6077722
    Abstract: High performance photovoltaic modules are produced with improved interconnects by a special process. Advantageously, the photovoltaic modules have a dual layer back (rear) contact and a front contact with at least one layer. The front contact and the inner layer of the back contact can comprise a transparent conductive oxide. The outer layer of the back contact can comprise a metal or metal oxide. The front contact can also have a dielectric layer. In one form, the dual layer back contact comprises a zinc oxide inner layer and an aluminum outer layer and the front contact comprises a tin oxide inner layer and a silicon dioxide dielectric outer layer. One or more amorphous silicon-containing thin film semiconductors can be deposited between the front and back contacts. The contacts can be positioned between a substrate and an optional superstrate.
    Type: Grant
    Filed: July 14, 1998
    Date of Patent: June 20, 2000
    Assignee: BP Solarex
    Inventors: Kai W. Jansen, Nagi Maley
  • Patent number: 6069022
    Abstract: An optical FET includes one or more light-responsive diodes stacked on the gate. Each diode includes a planar (horizontal) junction. The number of diodes is chosen to achieve a desired gate to source potential difference. An electrical connection connects the diode(s) to the source of the FET.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: May 30, 2000
    Assignee: Internationl Business Machines Corporation
    Inventors: James Marc Leas, Jack Allen Mandelman
  • Patent number: 6011215
    Abstract: A large area photovoltaic device includes a plurality of photovoltaic regions electrically interconnected in parallel. The regions are defined by a plurality of conductive channels which establish electrical contact between a top transparent electrode of the device and a monolithic, metal substrate electrode. A second terminal of the device is provided by a bottom, metallic electrode disposed beneath the semiconductor body, and upon an electrically insulating layer which is supported upon the metallic substrate.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: January 4, 2000
    Assignee: United Solar Systems Corporation
    Inventors: Troy Glatfelter, Eric Akkashian, Mark Lycette
  • Patent number: 5981950
    Abstract: A multicolor radiation detector capable of detecting at least two incident radiations with two distinct wave lengths .lambda.i1 and .lambda.s1 where wave length .lambda.s1 is greater than wave length .lambda.i1. The multicolor radiation detector includes two detection components. The first detection component is configured to detect at least the radiation with wave length .lambda.i1 and to be transparent to at least to the radiation of wave length .lambda.s1. The first detection component includes a matrix of detection pixels of n1 rows and m1 columns and a matrix of reading pixels of n1 rows and m1 columns wherein the reading pixels are transparent to the radiation with wave length .lambda.s1 in at least one portion of each pixel. The second detection component is configured to detect at least the radiation with wave length .lambda.s1. The second detection component includes a matrix of detection pixels of n2 rows and m2 columns and a matrix of reading pixels of n2 rows and m2 columns.
    Type: Grant
    Filed: January 26, 1998
    Date of Patent: November 9, 1999
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Michel Wolny, Gerard Destefanis
  • Patent number: 5800630
    Abstract: A monolithic, tandem photovoltaic device is provided having an indium phosphide tunnel junction lattice-matched to adjoining subcells and having high peak current densities and low electrical resistance. A method is provided for relatively low-temperature epitaxial growth of a tunnel junction and a subcell over the tunnel junction at temperatures which leave intact the desirable characteristics of the tunnel junction.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: September 1, 1998
    Assignee: University of Houston
    Inventors: Mauro F. Vilela, Abdelhak Bensaoula, Alexandre Freundlich, Philippe Renaud, Nasr-Eddine Medelci
  • Patent number: 5730808
    Abstract: Attractive multi-junction solar cells and single junction solar cells with excellent conversion efficiency can be produced with a microcrystalline tunnel junction, microcrystalline recombination junction or one or more microcrystalline doped layers by special plasma deposition processes which includes plasma etching with only hydrogen or other specified etchants to enhance microcrystalline growth followed by microcrystalline. nucleation with a doped hydrogen-diluted feedstock.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: March 24, 1998
    Assignee: Amoco/Enron Solar
    Inventors: Liyou Yang, Liangfan Chen