In Atmosphere Containing Water Vapor (i.e., Wet Oxidation) Patents (Class 438/773)
  • Patent number: 5935650
    Abstract: A method of producing a film on the surface of a semiconductor wafer in an RTP system, comprising: a) rapidly processing the wafer at a first temperature T.sub.1 in an atmosphere containing a substantial vapor pressure of a first reactive gas; then b) rapidly processing the wafer at a second temperature T.sub.2 in an atmosphere substantially free of the first reactive gas is described.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: August 10, 1999
    Inventors: Wilfried Lerch, Georg Roters, Peter Muenzinger, Roland Mader
  • Patent number: 5895256
    Abstract: A method for forming a LOCOS structure comprising the steps of providing a substrate, then forming a mask layer above the substrate. Next, the mask layer is patterned to form an opening having a depth not more than the mask layer. Subsequently, the mask layer is patterned to form an active device region exposing the substrate that lies outside the area, wherein the opening is within the active device region. Hence, a mask layer having a thicker peripheral section and a thinner middle section over the active device region is formed. Finally, a dielectric layer is formed over the expose substrate to serve as a device isolation structure. This invention provides a thin mask layer over the active device area to prevent the occurrence of excessive stresses, and hence improve the quality of subsequently formed gate oxide layer.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: April 20, 1999
    Assignee: United Microelectronics Corporation
    Inventor: Sun-Chieh Chien
  • Patent number: 5880041
    Abstract: A method for forming a dielectric layer on a surface of a substrate uses high pressure. A pressure vessel of a high pressure oxidation equipment is heated to a predetermined temperature. The substrate is placed inside the pressure vessel. The pressure vessel is pressurized to a pressure above atmospheric pressure. A flow of an oxidizing gas and a flow of steam are introduced into the pressure vessel, wherein the steam flow is only a fraction of the oxidizing gas flow. The dielectric layer on the surface is formed through an oxidizing reaction of the oxidizing gas and steam with the surface of the substrate, wherein the flow of steam acts in a catalytic-like manner to parabolicly accelerate the oxidizing reaction at the surface.
    Type: Grant
    Filed: May 27, 1994
    Date of Patent: March 9, 1999
    Assignee: Motorola Inc.
    Inventor: T. P. Ong
  • Patent number: 5861347
    Abstract: A method for form an integrated circuit device begins by growing a tunnel oxide (22). The tunnel oxide is exposed to a nitrogen containing ambient whereby nitrogen is incorporated at atomic locations at the interface between the tunnel oxide (22) and a substrate (11). This tunnel oxide and nitrogen exposure is performed for all of a floating gate active area (12), a high voltage active area (14) and a logic gate active area (16). A floating gate electrode (24) and interpoly dielectric regions (26 through 30) are then formed in the floating gate region (12). The tunnel oxide (22) is etched from the active areas (14 and 16) whereby nitrogen contamination (32) may remain. An optional sacrificial oxidation and a low temperature 830.degree. C. wet oxidation process utilizing HCL, H2 and O2 is then used to grow a high voltage gate dielectric (34) which has been shown to improve charge to breakdown characteristics by a factor of 1,000.
    Type: Grant
    Filed: July 3, 1997
    Date of Patent: January 19, 1999
    Assignee: Motorola Inc.
    Inventors: Bikas Maiti, Wayne Paulson, James Heddleson
  • Patent number: 5858844
    Abstract: The present invention comprises an innovative gate oxidation process after the disposition of the gate and prior to the disposition of the source and the drain by exposing the gate to oxygen at a predetermined temperature and for a predetermined time period for the optimized transistor performance. During the innovative gate oxidation process, oxygen penetrates into the interfaces of the gate conductive layer gate oxide and the gate dielectric layer silicon substrate and oxidizes portions of the gate conductive layer at the interfaces due to the oxygen smiling or the bird beak effect, which results in an increased effective thickness of the gate dielectric layer. Optionally, HCl can be introduced at a predetermined flowrate during the innovative gate oxidation process.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 12, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Hao Fang, Farrokh Omid-Zehoor, Todd Lukanc, Chris Schmidt
  • Patent number: 5849643
    Abstract: A method of growing an oxide film in which the upper surface of a semiconductor substrate is cleaned and the semiconductor substrate is dipped into an acidic solution to remove any native oxide from the upper surface. The substrate is then directly transferred from the acidic solution to an oxidation chamber. The oxidation chamber initially contains an inert ambient maintained at a temperature of less than approximately 500.degree. C. The transfer is accomplished without substantially exposing the substrate to oxygen thereby preventing the formation of a native oxide film on the upper surface of the substrate. Thereafter, a fluorine terminated upper surface is formed on the semiconductor substrate. The temperature within the chamber is then ramped from the first temperature to a second or oxidizing temperature if approximately 700.degree. C. to 850.degree. C. The presence of the fluorine terminated upper surface substantially prevents oxidation of the semiconductor substrate during the temperature ramp.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: December 15, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mark C. Gilmer, Mark I. Gardner, Daniel Kadosh
  • Patent number: 5840368
    Abstract: The present invention aims at providing an apparatus for and a method of forming low-temperature oxide films, which are capable of forming an oxide film at a low temperature and preventing the diffusion of impurities from the outside. The apparatus for forming an oxide film at a low temperature is characterized in that it has an oxidation furnace provided with a gas supply port and a gas discharge port, a heater for heating the oxidation furnace to a predetermined temperature, and a gas supply system disposed upstream of the oxidation furnace and provided with a means for adding an arbitrary quantity of water or a means for generating an arbitrary quantity of water.
    Type: Grant
    Filed: July 24, 1995
    Date of Patent: November 24, 1998
    Inventor: Tadahiro Ohmi
  • Patent number: 5817581
    Abstract: Disclosed is a reproducible process for making an SiO.sub.2 layer by thermal oxidation which assures an extremely uniform thickness of the SiO.sub.2 layer of approximately 1%. The process of the invention comprises the steps growing an initial layer of SiO.sub.2 to a defined minimal thickness by dry oxidation and increasing the thickness of the initial layer by simultaneous wet and dry oxidation until the desired final thickness is reached.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: October 6, 1998
    Assignee: International Business Machines Corporation
    Inventors: Thomas Bayer, Johann Greschner, Klaus Meissner
  • Patent number: 5750436
    Abstract: An Si.sub.3 N.sub.4 layer is formed on a surface of a wafer, which is an object to be processed, at a high temperature of, for example, 780.degree. C., using a vertical thermal processing apparatus having a reaction tube of a double-wall structure comprising an inner tube and an outer tube in which a predetermined reduced-pressure status is maintained within the reaction tube while a reaction gas comprising, for example, SiH.sub.2 Cl.sub.2 and NH.sub.3 is made to flow from an inner side to an outer side of the inner tube by the action of a first gas supply pipe and first exhaust pipe provided in the thermal processing apparatus. Next, the temperature in the interior of the reaction tube is raised to, for example, 1000.degree. C., a reaction gas comprising, for example, H.sub.2 O vapor and HCl is made to flow from the outer side to the inner side of the inner tube by the action of a second gas supply pipe and second exhaust pipe, and an SiO.sub.2 layer is formed by the oxidation of the surface of the Si.sub.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 12, 1998
    Assignees: Tokyo Electron Kabushiki Kaisha, Tokyo Electron Tohoku Kabushiki Kaisha, Kabushiki Kaisha Toshiba
    Inventors: Kenichi Yamaga, Yuichi Mikata, Akihito Yamamoto
  • Patent number: 5736446
    Abstract: A method of fabricating a MOS device having a gate-side air-gap structure is provided. A nitride spacer for reserving space of the air gap is formed on the substrate adjacent to the gate structure. An amorphous silicon spacer for forming the sidewall spacer and sealing the air gap is formed adjacent to the nitride spacer. The upper portion of the amorphous silicon spacer is heavily doped during the source/drain implantation. After removing the nitride spacer the doped amorphous silicon spacer is oxidized by a wet oxidation process to form a doped oxide spacer. The growing doped oxide spacer will seal the hole for the nitride spacer resulting from the heavily doped upper portion having a higher oxidation rate than that of other portions. Dopants implanted in the amorphous silicon spacer migrate into the substrate and extended ultra-shallow doped regions are formed that reduce the series resistance of the LDD structure.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: April 7, 1998
    Assignee: Powerchip Semiconductor Corp.
    Inventor: Shye-Lin Wu
  • Patent number: 5731247
    Abstract: A method for manufacturing a semiconductor device can reduce a micro-roughness and does not change a construction and electric characteristics of elements formed in the semiconductor device. In the method for manufacturing the semiconductor device including a pre-oxidation process in which an oxide layer is first formed on a silicon wafer, and the oxide layer is secondly eliminated to eliminate impurities on a surface of the silicon wafer, a formation of the oxide layer in the pre-oxidation process is performed in an oxidization atmosphere including H.sub.2 O and gas including germanium hydride (german --GeH.sub.4 --). Since german (GeH.sub.4) is included in the oxidization atmosphere, it is possible to reduce a softening temperature of the silicon dioxide formed in pre-oxidation, thereby decreasing the micro-roughness on the surface of the silicon wafer.
    Type: Grant
    Filed: July 6, 1995
    Date of Patent: March 24, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiro Ueno, Tsutomu Amai, Shuichi Samata
  • Patent number: 5661055
    Abstract: A memory device, such as a flash EEPROM, has zero birds' beaks and vertically overlapping gates to facilitate high cell density in the EEPROM's core. During fabrication, a layer of field oxide is formed over the core. The active regions are exposed by etching through the layer of field oxide to form vertically walled cavities around the active regions. The tunnel oxide, floating gate, interpoly dielectric, and the control gate are formed within each cavity so that the floating gate overlaps the control gate along the vertical walls. As a result, capacitive coupling between the gates is maintained, yet the horizontal dimensions of the cell decrease. Similarly, the absence of birds' beaks facilitates higher cell density in the core.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 26, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Juen Hsu, Steven W. Longcor, Jih-Chang Lien
  • Patent number: 5633212
    Abstract: An oxidizing gas containing water vapor generated by hydrogen combustion is introduced from an external gas burner via gas supply pipes into the upper space of a process tube surrounded by a heater, and exhausted from the lower part of the process tube. Until the flame of hydrogen burnt in the external gas burner becomes stable, a dilute gas such as N.sub.2 is introduced into the upper space of the process tube via other gas supply pipes so as to suppress the initial oxidation. Suppressing the initial oxidation may also be performed by bypassing an oxidizing gas from the external gas burner to an exhaust system while introducing a non-oxidizing gas such as N.sub.2 into the upper space of the process tube.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: May 27, 1997
    Assignee: Yamaha Corporation
    Inventor: Tomohiro Yuuki