In Atmosphere Containing Water Vapor (i.e., Wet Oxidation) Patents (Class 438/773)
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Patent number: 6436728Abstract: A method of making a high quality optical waveguide substrate is provided, in which the surface of a silicon substrate is oxidized through relatively large thickness and no foreign matter particles are adhered on the surface thereof. The silicon substrate to form a quartz film for the optical waveguide is mounted on a carbon contained ceramics sample base and is inserted into a carbon contained ceramics furnace core tube of which its external circumference is arranged in a heating furnace. When the inside of the furnace core tube is heated to 200 to 600° C. by the heating furnace, an oxidant gas for the silicon substrate surface is introduced, then by further heating up to 1200 to 1350° C., the silicon surface is thus oxidized.Type: GrantFiled: April 18, 2001Date of Patent: August 20, 2002Assignee: Shin-Etsu Chemical Co., LtdInventors: Shinji Makikawa, Hiroshi Aoi, Masaaki Shirota, Seiki Ejima
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Patent number: 6436848Abstract: A nitrogen-rich silicon oxide layer is formed using an apparatus for oxidizing semiconductor substrates having a process zone or chamber fluidically coupled to a torch zone or chamber. Generally, a thin initial silicon oxide layer is formed on the substrate using common wet or dry oxidizing processing conditions. Subsequently, a nitridizing atmosphere is introduced to the semiconductor substrates causing a nitrogen-rich silicon oxide layer to be formed thereon. The nitridizing atmosphere is advantageously generated by an exothermic reaction within the torch zone. Once formed, the nitridizing atmosphere is directed to the process zone through the fluidic coupling. The advantageous exothermic reaction resulting from the introduction of nitrous oxide (N2O) to the torch zone at a temperature sufficiently high to induce such an exothermic reaction, generally between approximately 850 to 950 degrees Celsius. Semiconductor integrated circuits are formed using nitrogen-rich silicon oxide films of the current method.Type: GrantFiled: March 30, 1999Date of Patent: August 20, 2002Assignee: Cypress Semiconductor Corp.Inventor: Krishnaswamy Ramkumar
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Patent number: 6436196Abstract: An apparatus and method of forming an oxynitride insulating layer on a substrate performed by putting the substrate at a first temperature within the main chamber of a furnace, exposing the substrate to a nitrogen containing gas at a second temperature which is higher than the first temperature, and growing the oxynitride layer on the substrate within the main chamber in the presence of post-combusted gases. The higher temperature nitrogen containing gases are combusted in a chamber outside the main chamber. The higher temperature is in the range of 800 to 1200° C., and preferably 950° C. In a second embodiment, distributed N2O gas injectors within the main chamber deliver the nitrogen containing gas. The nitrogen containing gas is pre-heated outside the chamber. The nitrogen containing gas is then delivered to a gas manifold that splits the gas flow and directs the gas to a number of gas injectors, preferably two to four injectors within the main process tube.Type: GrantFiled: June 22, 2001Date of Patent: August 20, 2002Assignee: International Business Machines CorporationInventors: Douglas A. Buchanan, Evgeni P. Gousev, Carol J. Heenan, Wade J. Hodge, Steven M. Shank, Patrick R. Varekamp
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Patent number: 6432801Abstract: The present invention relates to a method for forming a gate electrode in a semiconductor device, which can improve GOI characteristics and allows for an effective suppression of metal silicide spike formation. This method includes the steps of forming a gate insulating film over a semiconductor substrate, forming a first semiconductor layer over the gate insulating film, forming a barrier layer over the first semiconductor layer to prevent formation of metal silicide spikes in the first semiconductor layer, forming a second semiconductor layer over the barrier layer, and forming a metal silicide layer over the second semiconductor layer.Type: GrantFiled: April 21, 2000Date of Patent: August 13, 2002Assignee: Hyundai Electronics Industries, Co., Ltd.Inventor: Byung Hak Lee
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Patent number: 6417114Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.Type: GrantFiled: January 3, 2001Date of Patent: July 9, 2002Assignee: Hitachi, Ltd.Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
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Patent number: 6417097Abstract: A method of forming a contact structure in a semiconductor device includes forming an interlayer insulating layer containing impurities on a semiconductor substrate. The interlayer insulating layer is patterned to form a pad contact hole. The pad contact hole is filled with a conductive pad. Thermal oxidation annealing is then carried out to form an oxide layer on a top surface of the conductive pad and at an interface between the conductive pad and the interlayer insulating layer.Type: GrantFiled: January 5, 2001Date of Patent: July 9, 2002Assignee: Samsung Electronics Co., Ltd.Inventors: Min-Wk Hwang, Jun-Yong Noh
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Patent number: 6410456Abstract: A method of forming an oxide on a substrate. According to the method of the present invention a substrate is placed in a chamber. An oxygen containing gas and a hydrogen containing gas are then fed into the chamber. The oxygen containing gas and the hydrogen containing gas are then caused to react with one another to form water vapor in the chamber. The water vapor then oxidizes the substrate.Type: GrantFiled: November 21, 2000Date of Patent: June 25, 2002Assignee: Applied Materials, Inc.Inventors: Christian M. Gronet, Peter A. Knoot, Gary E. Miner, Guangcai Xing, David R. Lopes, Satheesh Kuppurao
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Publication number: 20020076941Abstract: A semiconductor integrated circuit includes a shielded wire line and a shielding wire line provided for the shielded wire line and divided into a plurality of segments in a longitudinal direction of the shielded wire line.Type: ApplicationFiled: September 27, 2001Publication date: June 20, 2002Applicant: FUJITSU LIMITEDInventors: Kenichi Ushiyama, Shigenori Ichinose
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Patent number: 6407008Abstract: Methods for forming nitrided oxides in semiconductor devices by rapid thermal oxidation, in which a semiconductor substrate having an exposed silicon surface is placed into a thermal process chamber. Then, an ambient gas comprising N2O and an inert gas such as argon or N2 is introduced into the process chamber. Next, the silicon surface is heated to a predefined process temperature, thereby oxidizing at least a portion of the silicon surface. Finally, the semiconductor substrate is cooled. An ultra-thin oxide layer with uniform oxide characteristics, such as more boron penetration resistance, good oxide composition and thickness uniformity, increased charge to breakdown voltage in the oxide layer, can be formed.Type: GrantFiled: May 5, 2000Date of Patent: June 18, 2002Assignee: Integrated Device Technology, Inc.Inventors: Yingbo Jia, Ohm-Guo Pan, Long-Ching Wang, Jeong Yeol Choi, Guo-Qiang (Patrick) Lo, Shih-Ked Lee
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Publication number: 20020052096Abstract: In a cleaning method and a cleaning apparatus of a silicon substrate, after wet cleaning or etching of the substrate having a silicon surface is carried out, and during or after a pure water rinse of the substrate, an oxide film with a thickness of 10 to 30 Å is formed on the silicon surface by rinsing the substrate by pure water added with an oxidizer, and then the substrate is dried. Since drying is carried out after the oxide film is formed on the silicon surface, the occurrence of a water mark can be prevented.Type: ApplicationFiled: April 12, 2001Publication date: May 2, 2002Inventors: Hongyong Zhang, Masayuki Sakakura, Yuugo Goto
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Publication number: 20020048967Abstract: With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, in a gate processing step using a poly-metal, a gate electrode is formed by patterning a gate electrode material which has been deposited over a semiconductor wafer 1A having a gate oxide film formed thereon and has a poly-metal structure and then, the principal surface of the semiconductor wafer 1A heated to a predetermined temperature or vicinity there of is supplied with a hydrogen gas which contains water at a low concentration, the water having been formed from hydrogen and oxygen by a catalytic action, to selectively oxidize the principal surface of the semiconductor wafer 1A, whereby the profile of the side-wall end portions of the gate electrode is improved.Type: ApplicationFiled: December 13, 2001Publication date: April 25, 2002Inventors: Yoshikazu Tanabe, Isamu Asano, Makoto Yoshida, Naoki Yamamoto, Masayoshi Saito, Nobuyoshi Natsuaki
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Publication number: 20020045358Abstract: A method of fabricating a semiconductor device includes depositing a dielectric film and subjecting the dielectric film to a wet oxidation in a rapid thermal process chamber. The technique can be used, for example, in the formation of various elements in an integrated circuit, including gate dielectric films as well as capacitive elements. The tight temperature control provided by the RTP process allows the wet oxidation to be performed quickly so that the oxidizing species does not diffuse significantly through the dielectric film and diffuse into an underlying layer. In the case of capacitive elements, the technique also can help reduce the leakage current of the dielectric film without significantly reducing its capacitance.Type: ApplicationFiled: July 26, 2001Publication date: April 18, 2002Inventors: Ronald A. Weimer, Scott J. DeBoer, Dan Gealy, Husam N. Al-Shareef
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Patent number: 6372663Abstract: A method for forming silicon oxide layers on silicon wafers by a wet oxidation process that utilizes a dual-stage pyrolysis is described. The process can be carried out by flowing a first H2/O2 mixture that has a first H2/O2 gas mixture ratio into a torch and then feeding water vapor generated into the wet oxidation chamber to form a first layer of silicon oxide, and then flowing a second H2/O2 mixture that has a second H2/O2 gas mixture ratio into the torch and feeding water vapor generated into the wet oxidation chamber for forming a second thickness of the silicon oxide layer. The second H2/O2 ratio is smaller than the first H2/O2 ratio by at least ⅓ of the value of the first H2/O2 ratio. For instance, when the first H2/O2 ratio used is large than 1.5, the second H2/O2 ratio used is less than 1.2. In one example, the first H2/O2 gas mixture ratio utilized is 1.8, while the second H2/O2 gas mixture ratio utilized is 1.0. It has been found that by reducing the hydrogen content, i.e.Type: GrantFiled: January 13, 2000Date of Patent: April 16, 2002Assignee: Taiwan Semiconductor Manufacturing Company, LtdInventors: Su-Yu Yeh, Chien-Jiun Wang, Jih-Hwa Wang
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Patent number: 6372662Abstract: Disclosed is a process for forming, over a semiconductor substrate, a multilayer structure having successively a first layer of silicon-containing material, a relatively thin oxide layer, and a second layer of silicon-containing material. The oxide layer has a substantially uniform thickness in a range from about 1 Angstrom to about 20 Angstroms. The oxide layer consists essentially of silicon dioxide that is formed by exposing the first layer to an aqueous oxidizing bath at a relatively low temperature such that diffusion of dopants in the semiconductor substrate is not induced. The oxide layer prevents dopants from outgassing and diffusing out of the first layer and into the second layer. Also disclosed is a structure formed by the disclosed process.Type: GrantFiled: July 19, 1999Date of Patent: April 16, 2002Assignee: Micron Technology, Inc.Inventors: Keith W. Smith, Charles E. Carver, Clarence J. Higdon
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Patent number: 6368984Abstract: A method of forming an insulating film on a surface of a substrate includes the steps of heating the substrate in a processing chamber in an atmosphere containing water vapor maintained at 900° C. or higher to form a first insulating film on a surface of the substrate; and cooling down the substrate in the presence of water vapor to a temperature of 600° C. or less at a temperature decreasing rate of 15° C./sec or more so as to limit a thickness of a second insulating film formed at an interface between the first insulating film and the substrate.Type: GrantFiled: May 19, 1999Date of Patent: April 9, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Tomita, Mamoru Takahashi, Yoshio Ozawa
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Patent number: 6369874Abstract: A windowless system and apparatus are provided that prevent outgases from contaminating the projection optics of an in-vacuum lithography system. The outgassing mitigation apparatus comprises a chimney that is substantially closed at one end, a duct fluidly coupled to the chimney, and a baffle disposed within the chimney. The chimney of the outgassing mitigation apparatus is funnel shaped at the end that is substantially closed. This end of the chimney has an opening that permits a beam or bundle of light to pass through the chimney. A rotating barrier, having at least one aperture for the passage of light, can be positioned near the chimney so that the rotating barrier substantially closes an open end of the chimney except when one of the apertures of the rotating barrier is passing by the chimney. This rotating barrier can be chilled by a refrigerator unit, which is radiantly coupled to a portion of the rotating barrier. A motor is used to rotate the barrier.Type: GrantFiled: April 18, 2000Date of Patent: April 9, 2002Assignee: Silicon Valley Group, Inc.Inventor: Santiago E. del Puerto
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Publication number: 20020028584Abstract: The present invention relates to a film forming method of forming an interlayer insulating film having a low dielectric constant to cover a wiring. In construction, an insulating film for covering a wiring is formed on the substrate by plasmanizing a film forming gas, that consists of any one selected from a group consisting of alkoxy compound having Si—H bonds and siloxane having Si—H bonds and any one oxygen-containing gas selected from a group consisting of O2, N2O, NO2, CO, CO2, and H2O, to react.Type: ApplicationFiled: July 13, 2001Publication date: March 7, 2002Applicant: CANON SALES CO., INC., SEMICONDUCTOR PROCESS LABORATORY CO., LTD.Inventors: Taizo Oku, Junichi Aoki, Youichi Yamamoto, Takashi Koromokawa, Kazuo Maeda
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Patent number: 6348380Abstract: The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. By exposing the etched gate stack to elevated temperatures and a dilute steam ambient, additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. In the preferred embodiment, the interface is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries. At the same time, oxide in an upper storage dielectric layer (oxide-nitride-oxide or ONO) is enhanced in the dilute steam oxidation.Type: GrantFiled: August 25, 2000Date of Patent: February 19, 2002Assignee: Micron Technology, Inc.Inventors: Ronald A. Weimer, Don C. Powell, John T. Moore, Jeff A. McKee
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Patent number: 6346487Abstract: An apparatus and method of forming an oxynitride insulating layer on a substrate performed by putting the substrate at a first temperature within the main chamber of a furnace, exposing the substrate to a nitrogen containing gas at a second temperature which is higher than the first temperature, and growing the oxynitride layer on the substrate within the main chamber in the presence of post-combusted gases. The higher temperature nitrogen containing gases are combusted in a chamber outside the main chamber. The higher temperature is in the range of 800 to 1200° C., and preferably 950° C. In a second embodiment, distributed N2O gas injectors within the main chamber deliver the nitrogen containing gas. The nitrogen containing gas is pre-heated outside the chamber. The nitrogen containing gas is then delivered to a gas manifold that splits the gas flow and directs the gas to a number of gas injectors, preferably two to four injectors within the main process tube.Type: GrantFiled: March 10, 2001Date of Patent: February 12, 2002Assignee: International Business Machines CorporationInventors: Douglas A. Buchanan, Evgeni P. Gousev, Carol J. Heenan, Wade J. Hodge, Steven M. Shank, Patrick R. Varekamp
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Patent number: 6335295Abstract: Water for use in wet oxidation of semiconductor surfaces may be generated by reacting ultra pure hydrogen and ultra pure gaseous oxygen without a flame. Because no flame is used, contamination due to a flame impinging on components of a “torch” is not a problem. Flame-free generation of water is accomplished by reacting hydrogen and oxygen under conditions that do not result in ignition. This may be accomplished by provided a diluted hydrogen stream in which molecular hydrogen is mixed with a diluent such as a noble gas or nitrogen. This use of diluted hydrogen also reduces or eliminates the danger of explosion. This can simplify the apparatus design by eliminating the need for complicated interlocks, flame detectors, etc.Type: GrantFiled: January 15, 1999Date of Patent: January 1, 2002Assignee: LSI Logic CorporationInventor: Rajiv Patel
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Patent number: 6331208Abstract: A crystal silicon substrate is anodized to form a porous layer thereon, and a thin-film crystal is grown by epitaxial growth on the porous layer. Openings extending from the surface of the grown crystal and reaching the porous layer are provided by applying laser beams, and the porous layer is selectively etched through the openings to separate the thin-film crystal from the substrate. The thin-film crystal separated is transferred to another supporting substrate to form a solar cell. Also, porous silicon layers serving as separation layers are formed on a substrate silicon wafer on both sides, and thin-film semiconductor (thin-film single-crystal silicon) layers are formed by epitaxial growth on both porous silicon layers. Then, through openings are made in the thin-film single-crystal silicon layers. Thereafter, the porous silicon layers are removed by wet etching carried out through the openings to separate two thin-film single-crystal silicon layers simultaneously from the wafer.Type: GrantFiled: May 13, 1999Date of Patent: December 18, 2001Assignee: Canon Kabushiki KaishaInventors: Shoji Nishida, Takao Yonehara, Kiyofumi Sakaguchi, Masaaki Iwane
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Patent number: 6323097Abstract: A method and structure is disclosed to measure spacing and misalignment of features in semiconductor integrated circuits. Three equally spaced, parallel first level conductive lines are formed on a first insulating layer with staircase patterns projecting both out of and into the inner edges of the outer lines. A second insulating layer is deposited and step contact vias are opened through the second insulating layer over the steps of the staircase patterns. The inner edge of the step contact via coincides with the inner edge of the step. Contact pad vias are opened through the second insulating layer over the outer lines and the step contact vias and the contact pad vias are filled with conductive material. A second level conductive line is formed over the second insulating layer parallel to said first level conductive lines and above the central first level conductive line.Type: GrantFiled: June 9, 2000Date of Patent: November 27, 2001Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Shien-Yang Wu, Tseng Chin Lo, Konrad Young
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Patent number: 6319860Abstract: In a gas-phase treating process of a semiconductor wafer using hydrogen, there is provided a technique for safely eliminating the hydrogen in an exhaust gas discharged from a gas-phase treating apparatus. The profile at the end portions of the side walls of gate electrodes of a poly-metal structure is improved by forming the gate electrodes over a semiconductor wafer 1A having a gate oxide film and then by supplying the semiconductor wafer 1A with a hydrogen gas containing a low concentration of water, as generated from hydrogen and oxygen by catalytic action, to oxidize the principal face of the semiconductor wafer 1A selectively. After this, the hydrogen in the exhaust gas, as discharged from an oxidizing furnace, is completely converted into water by causing it to react with oxygen by a catalytic method.Type: GrantFiled: April 18, 2000Date of Patent: November 20, 2001Assignee: Hitachi, Ltd.Inventors: Yoshikazu Tanabe, Toshiaki Nagahama, Nobuyoshi Natsuaki, Yasuhiko Nakatsuka
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Patent number: 6316371Abstract: Method for the chemical treatment of a semiconductor substrate at a raised temperature, such as oxidization. To achieve a uniform treatment of comparatively large wafers in the radial direction, as well as to realize a uniform treatment during the simultaneous treatment of a number of semiconductor substrates placed one after each other, it is proposed, starting with an inert atmosphere, to gradually add oxygen and at the end of the treatment to gradually reduce the oxygen portion.Type: GrantFiled: March 30, 1999Date of Patent: November 13, 2001Assignee: ASM International N.V.Inventors: Theodorus Gerardus Maria Oosterlaken, Frank Huussen, Remco Van Der Berg
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Publication number: 20010036751Abstract: A process for forming oxide layer on a wafer, which comprises a wet oxidation step using a pyrogenic steam as an oxidizing agent. The present invention comprises a flowing of an inert gas throughout the process including the wet oxidation step. The process allows an easy control of the oxide layer growth rate and oxide layer thickness, a formation of a more uniform oxide layer, and an improvement in the quality of the oxide layer.Type: ApplicationFiled: June 4, 2001Publication date: November 1, 2001Applicant: Samsung Electronics Co., Ltd.Inventors: Chan-Sik Park, Sang-Woon Kim, Chung-Hwan Kwon, Sae-Hyoung Ryu
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Patent number: 6297172Abstract: A method of forming an oxide film comprising the steps of; (A) generating a water vapor atmosphere in a process chamber in a state where partitioning means is closed, and transferring a substrate into a substrate transfer portion, (B) opening the partitioning means after the transfer of the substrate into the substrate transfer portion is completed, and transferring the substrate into the process chamber having the water vapor atmosphere, (C) thermally oxidizing a semiconductor layer on the surface of the substrate in the process chamber having the water vapor atmosphere, to form an oxide film having a predetermined thickness on the surface of the semiconductor layer, and (D) changing the atmosphere in the process chamber into an inert gas atmosphere, then transferring the substrate out of the process chamber, closing the partitioning means and transferring the substrate out of the substrate transfer portion.Type: GrantFiled: June 6, 2000Date of Patent: October 2, 2001Assignee: Sony CorporationInventor: Akihide Kashiwagi
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Patent number: 6291365Abstract: In a method for manufacturing a semiconductor device where a silicon substrate is loaded in an oxidation furnace whose temperature is a first value, the temperature of the oxidation furnace is raised to a second value, and an oxidation operation is performed upon the silicon substrate to grow an essential silicon oxide layer on the silicon, a thickness ratio of an initial silicon oxide layer grown before the oxidation operation performing step to a less than 40 Å thick gate silicon oxide layer formed by the initial silicon oxide layer and the essential silicon oxide layer is about 20 to 40 percent.Type: GrantFiled: February 10, 2000Date of Patent: September 18, 2001Assignee: NEC CorporationInventor: Fumihiro Koba
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Patent number: 6291366Abstract: A target semiconductor device can be obtained stably by reforming an insulating film and a semiconductor. In a process of manufacturing a semiconductor device, at least one of the semiconductor and the insulating film is reformed after an annealing process for annealing the semiconductor at a temperature ranging from 20 to 400° C. in the atmosphere containing a gas of water (H2O) with a partial pressure from 1 Torr to a saturated vapor pressure for an annealing time ranging from 15 seconds to 20 hours.Type: GrantFiled: August 14, 1995Date of Patent: September 18, 2001Assignee: Sony CorporationInventors: Naoki Sano, Masaki Hara, Mitsunobu Sekiya, Toshiyuki Sameshima
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Publication number: 20010019902Abstract: A wet-oxidation apparatus comprises a reaction tube capable of accommodating a semiconductor wafer; a water vapor generating apparatus for generating water vapor; a gas supply passage for supplying gas into the reaction tube; a discharge passage; an inert gas supply unit for supplying an inert gas; a gas switching unit capable of switching between the water vapor from the water vapor generating unit and the inert gas from the inert gas supply unit, so as to supply either one of the water vapor and the inert gas to the gas supply passage; and a control unit controlling such that: at least while wet-oxidation processing of the semiconductor wafer are conducted predetermined times in the reaction tube, the water vapor generating apparatus continuously generates the water vapor; whenever the wet-oxidation processing is started one time, the water vapor from the water vapor generating apparatus is switched toward the gas supply passage; and whenever the wet-oxidation processing is completed one time, the water vapType: ApplicationFiled: May 7, 2001Publication date: September 6, 2001Applicant: Kokusai Electric co., Ltd.Inventors: Yasuhiro Inokuchi, Fumihide Ikeda
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Publication number: 20010018274Abstract: A semiconductor device is fabricated by a method comprising the steps of: selectively introducing a halogen element or argon into a device region 14 of a silicon substrate 10; and wet oxidizing the silicon substrate 10 in an ambient atmosphere which an H2O partial pressure is less than 1 atm to thereby form a silicon oxide film 22 in the device region 14 of the silicon substrate 10, and a silicon oxide film 24 thinner than the silicon oxide film 22 in a device region 16 of the silicon substrate 10. Whereby the silicon oxide film in a device region 14 with the halogen element or argon introduced can be selectively formed thick. The silicon oxide films are formed by the wet oxidation, whereby the gate insulation films can be more reliable than those formed by the dry oxidation.Type: ApplicationFiled: February 9, 2001Publication date: August 30, 2001Applicant: Fujitsu Limited and Kabushiki Kaisha ToshibaInventors: Taro Sugizaki, Toshiro Nakanishi, Kyoichi Suguro, Atsushi Murakoshi
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Patent number: 6277765Abstract: A low dielectric constant material, suitable for use as an interlayer dielectric in microelectronic structures includes a porous silicon oxide layer. In a further aspect of the present invention, a porous oxide of silicon is formed by the room temperature oxidation of porous silicon. The room temperature oxidation is achieved by exposing a porous silicon layer to a solution of hydrochloric acid, hydrogen peroxide, and water, in the presence of a metal catalyst.Type: GrantFiled: August 17, 1999Date of Patent: August 21, 2001Assignee: Intel CorporationInventors: Peng Cheng, Brian S. Doyle, Chien Chiang, Mark Thiec-Hien Tran
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Patent number: 6271151Abstract: A method and apparatus for controlling the growth of an oxide, such as a gate oxide, in a semiconductor device manufacturing process takes into consideration the ambient atmospheric pressure in order to reduce the variance in gate oxide thicknesses between wafer lots. The pressure in the oxide diffusion tube is maintained at a constant pressure near the ambient atmospheric pressure during the oxide diffusion process. Alternatively, the furnace time is changed from lot to lot as a function of changes in the ambient atmospheric pressure in order to maintain the gate oxide thickness at a constant value between wafer lots.Type: GrantFiled: June 30, 1997Date of Patent: August 7, 2001Assignee: Advanced Micro Devices, Inc.Inventor: Donald L. Wollesen
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Patent number: 6271152Abstract: Field oxide is formed using high pressure. Oxidation of field regions between active regions is accomplished in a two-step process. A first oxide layer is formed in the field region. Then, a second oxide layer is formed on the first oxide layer. The second oxide layer is formed at a pressure of at least approximately 5 atmospheres. In one embodiment, the first oxide layer is formed at atmospheric pressure using a conventional oxidation technique, such as rapid thermal oxidation (RTO), wet oxidation, or dry oxidation. In another embodiment, the first oxide layer is formed, at a pressure of approximately 1 to 5 atmospheres. Wet or dry oxidation is used for the oxidizing ambient. The first oxide layer is formed to a thickness of approximately 500 angstroms or less, and typically greater than 200 angstroms. Temperatures of approximately 600 to 1,100 degrees Celsius are used for the oxidation steps.Type: GrantFiled: May 16, 2000Date of Patent: August 7, 2001Assignee: Micron Technology, Inc.Inventors: Randhir P. S. Thakur, David L. Chapek
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Publication number: 20010009813Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide filmType: ApplicationFiled: January 3, 2001Publication date: July 26, 2001Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
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Publication number: 20010006853Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.Type: ApplicationFiled: January 3, 2001Publication date: July 5, 2001Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
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Patent number: 6255231Abstract: A method for forming an oxide layer on an electronic substrate such as a process of forming an ultra-thin gate oxide layer on a silicon wafer and an apparatus for executing for such method are provided. In the method, a moisture generator is continuously heated after a water vapor generating process is completed in order to prevent any residual moisture from condensing on an inner wall of the moisture generator. The method thus prevents additional water vapor from being communicated to an oxidation furnace and causing a continuous, undesirable growth of oxide on the wafers. The method may further be improved by flowing an inert gas into the oxidation chamber at a location adjacent to the oxidation chamber such that a substantially moisture-free inert gas flow may be flown into the chamber to improve the temperature uniformity in the chamber and to pressurize the chamber for preventing moisture or other contaminating gases from entering the chamber from the outside ambient.Type: GrantFiled: October 2, 1998Date of Patent: July 3, 2001Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: B. F. Chen, F. Y. Lin, W. J. Lin
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Patent number: 6239041Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.Type: GrantFiled: September 7, 1999Date of Patent: May 29, 2001Assignee: Hitachi, Ltd.Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
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Patent number: 6235651Abstract: A two-step progressive thermal oxidation process is provided to improve the thickness uniformity of a thin oxide layer in semiconductor wafer fabrication. A semiconductor wafer, e.g., of silicon, with a surface subject to formation of an oxide layer thereon but which is substantially oxide layer-free, is loaded, e.g., at room temperature, into an oxidation furnace maintained at a low loading temperature, e.g., of 400-600° C., and the wafer temperature is adjusted to a low oxidizing temperature, e.g., of 400-600° C., all while the wafer is under an inert, e.g., nitrogen, atmosphere. The wafer is then subjected to initial oxidation, e.g., in dry oxygen, at the low oxidizing temperature to form a uniform initial thickness oxide, e.g., silicon dioxide, layer, e.g., of up to 10 angstroms, on the surface, after which the furnace temperature is increased to a high oxidizing temperature, e.g., of 700-1200° C., while the wafer is under an inert atmosphere. The wafer is next subjected to final oxidation, e.Type: GrantFiled: September 14, 1999Date of Patent: May 22, 2001Assignee: Infineon Technologies North AmericaInventors: Martin Schrems, Helmut Horst Tews
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Patent number: 6221791Abstract: An apparatus and a method for oxidizing silicon substrates by either a wet oxidation or a dry oxidation process in the same oxidation chamber are provided. In the apparatus, an additional conduit is provided for evacuating any residual water vapor trapped in a conduit section between an external torch and the oxidation chamber such that residual water vapor does not flow into the oxidation chamber and cause problems for a dry oxidation process subsequently conducted. The present invention novel apparatus therefore allows thin silicon oxide films such as those used in gate oxides to be formed with high quality in the same oxidation chamber. The present invention novel apparatus further allows high quality tri-layered silicon oxide films to be formed in a dry-wet-dry oxidation process for achieving satisfactory deposition rates and high quality oxide films on the substrate.Type: GrantFiled: June 2, 1999Date of Patent: April 24, 2001Assignee: Taiwan Semiconductor Manufacturing Company, LTDInventors: Chien-Jiun Wang, Ching-Yu Huang, Yu-Sen Chu, Kuo-Hung Liao
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Patent number: 6207588Abstract: A method for forming a dual oxide layer on a silicon substrate provides that layer having varying thicknesses by using a damage layer formed on the silicon substrate, or a silicon nitride layer deposited on the silicon substrate. The damage layer is formed on the silicon substrate by dry etching a designated part of the silicon substrate, and the dual oxide layer is formed by using the properties of SiO2 by which the oxide layer growth speed on the damage layer is slower than that on the silicon substrate. A pattern of the damage layer is defined by photolithography, and the damage layer having a depth of about 20 to 5,000 Å is formed using CF4, CHF3, or Ar gas at a pressure of 900 m Torr or less, or using Cl2 or HBr. In the preoxidation cleaning step, a solution containing NH4F, HF, and H2O, a standard solution containing NH4OH, H2O2, and H2O, and/or HF are used.Type: GrantFiled: August 18, 1998Date of Patent: March 27, 2001Assignee: Samsung Electronics Co., Ltd.Inventors: Sang Kook Choi, Kyung Hawn Cho, Won Sik An, Chung Hwan Kwon
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Patent number: 6197702Abstract: With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, in a gate processing step using a poly-metal, a gate electrode is formed by patterning a gate electrode material which has been deposited over a semiconductor wafer 1A having a gate oxide film formed thereon and has a poly-metal structure and then, the principal surface of the semiconductor wafer 1A heated to a predetermined temperature or vicinity thereof is supplied with a hydrogen gas which contains water at a low concentration, the water having been formed from hydrogen and oxygen by a catalytic action, to selectively oxidize the principal surface of the semiconductor wafer 1A, whereby the profile of the side-wall end portions of the gate electrode is improved.Type: GrantFiled: May 29, 1998Date of Patent: March 6, 2001Assignee: Hitachi, Ltd.Inventors: Yoshikazu Tanabe, Isamu Asano, Makoto Yoshida, Naoki Yamamoto, Masayoshi Saito, Nobuyoshi Natsuaki
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Patent number: 6162741Abstract: According to the manufacturing method of the semiconductor device of the present invention, an oxide film is formed on a metal film formed on a main surface of a semiconductor substrate by exposing the metal film to the oxidizing gas. The oxide film is then reduced in a reducing atmosphere, and a protection film is formed on the surface of the metal film reduced in the reducing step. In this manner, the damage to the surface of the metal film can be prevented.Type: GrantFiled: December 2, 1997Date of Patent: December 19, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Yasushi Akasaka, Kazuaki Nakajima, Kiyotaka Miyano, Kyoichi Suguro
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Patent number: 6140203Abstract: A semiconductor processing method of forming a capacitor includes, a) providing a mass of electrically insulative oxide of a first density; b) densifying the oxide mass to a higher second density, the densified oxide mass being characterized by a wet etch rate of less than or equal to about 75 Angstroms/minute in a 100:1 by volume H.sub.Type: GrantFiled: April 12, 1999Date of Patent: October 31, 2000Assignee: Micron Technology, Inc.Inventors: Klaus Florian Schuegraf, Bob Carstensen
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Patent number: 6136657Abstract: A method for fabricating a semiconductor device with different gate oxide layers is provided. In this method, oxidation is controlled in accordance with the active area dimension so that the oxide grows more thinly at a wider active width in a peripheral region, and grows more thickly at a narrower active width in a cell array region. In this method, a gate pattern is formed over a semiconductor substrate having different active areas. Gate spacer are formed and an active-dimension-dependant oxidation process is then performed to grow oxide layers of different thicknesses in the cell array region and the peripheral region.Type: GrantFiled: May 20, 1999Date of Patent: October 24, 2000Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Suk Yang, Chang-Hyun Cho, Ki-Nam Kim
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Patent number: 6136728Abstract: A method of fabricating semiconductor devices including the steps of forming a silicon-based dielectric layer containing nitrogen having a concentration that is in a range of a fraction of a percent up to stoichiometric Si.sub.3 N.sub.4 ; and annealing the dielectric layer in a water vapor atmosphere.Type: GrantFiled: January 5, 1996Date of Patent: October 24, 2000Assignee: Yale UniversityInventor: Xiewen Wang
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Patent number: 6121095Abstract: A method for fabricating gate oxide includes a dilute wet oxidation process with additional nitrogen and moisture and an annealing process with a nitrogen base gas, wherein the volume of additional nitrogen is about 6-12 times of the volume of the additional moisture. The method according to the invention improves the electrical quality of the gate oxide by raising the Q.sub.bd and by reducing the leakage current of the gate oxide.Type: GrantFiled: November 13, 1998Date of Patent: September 19, 2000Assignee: United Integrated Circuits Corp.Inventors: Yu-Shan Tai, H. T. Yang, Hsueh-Hao Shih, Kuen-Chu Chen
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Patent number: 6093662Abstract: Process for generating moisture for use in semiconductor manufacturing, the process comprising feeding hydrogen and oxygen into a reactor provided with a platinum-coated catalyst layer on an interior wall, thus enhancing the reactivity between hydrogen and oxygen by catalytic action and instantaneously reacting the reactivity-enhanced hydrogen and oxygen at a temperature below the ignition point to produce moisture without undergoing combustion at a high temperature, wherein the amount of unreacted hydrogen occurring in the generated moisture in starting up or terminating the moisture generating reaction is minimized and wherein undesired reactions such as undesired silicon oxide film coating are avoided. When the generation of moisture is started up by feeding hydrogen and oxygen into the reactor provided with a platinum-coated catalyst layer on the inside wall thereof, oxygen first starts to be fed and, some time after that, the supply of hydrogen is begun.Type: GrantFiled: April 14, 1999Date of Patent: July 25, 2000Assignees: Fujikin Incorporated, Tadahiro OhmiInventors: Tadahiro Ohmi, Yukio Minami, Koji Kawada, Yoshikazu Tanabe, Nobukazu Ikeda, Akihiro Morimoto
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Patent number: 6087191Abstract: A method for repairing defects in a surface layer of a substrate. The method comprises the redeposition, in a solvent environment, of a fill material into the defects of the surface layer. The fill material is provided by the surface layer itself or from a separate source comprising a different material from that of the surface layer.Type: GrantFiled: January 22, 1998Date of Patent: July 11, 2000Assignee: International Business Machines CorporationInventor: Karl E. Boggs
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Patent number: 6066576Abstract: Field oxide is formed using high pressure. Oxidation of field regions between active regions is accomplished in a two-step process. A first oxide layer is formed in the field region. Then, a second oxide layer is formed on the first oxide layer. The second oxide layer is formed at a pressure of at least approximately 5 atmospheres. In one embodiment, the first oxide layer is formed at atmospheric pressure using a conventional oxidation technique, such as rapid thermal oxidation (RTO), wet oxidation, or dry oxidation. In another embodiment, the first oxide layer is formed at near atmospheric pressure, at a pressure of approximately 1 to 5 atmospheres. Wet or dry oxidation is used for the oxidizing ambient. The first oxide layer is formed to a thickness of approximately 500 angstroms or less, and typically greater than 200 angstroms. Temperatures of approximately 600 to 1,100 degrees Celsius are used for the oxidation steps.Type: GrantFiled: June 4, 1997Date of Patent: May 23, 2000Assignee: Micron Technology, Inc.Inventors: Randhir P. S. Thakur, David L. Chapek
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Patent number: 6037273Abstract: A method of forming an oxide on a substrate. According to the method of the present invention a substrate is placed in a chamber. An oxygen containing gas and a hydrogen containing gas are then fed into the chamber. The oxygen containing gas and the hydrogen containing gas are then caused to react with one another to form water vapor in the chamber. The water vapor then oxidizes the substrate.Type: GrantFiled: March 2, 1998Date of Patent: March 14, 2000Assignee: Applied Materials, Inc.Inventors: Christian M. Gronet, Peter A. Knoot, Gary E. Miner, Guangcai Xing, David R. Lopes, Satheesh Kuppurao