In Atmosphere Containing Water Vapor (i.e., Wet Oxidation) Patents (Class 438/773)
  • Patent number: 7851383
    Abstract: Method and system for forming gate structure with controllable oxide. The method includes a step for providing a semiconductor substrate and defining a source region and a drain region within the semiconductor substrate. Furthermore, the method includes a step for defining a gate region positioned between the source region and the drain region. Moreover, the method provides a step for forming a first layer overlaying the gate region. The first layer includes silicon nitride and/or silicon oxynitride material. Also, the method includes a step for forming a second layer by subjecting the semiconductor substrate to at least oxygen at a predetermined temperature range for a period of time. The second layer has a thickness less than 20 Angstroms.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: December 14, 2010
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Xiaopeng Yu, Sean F. Zhang
  • Patent number: 7825035
    Abstract: A semiconductor manufacturing method includes purging a growth chamber including a reaction product, a treatment chamber, and a glove box hermetically surrounding the growth chamber, with an inert gas atmosphere. The method also includes transferring the reaction product from the growth chamber to the treatment chamber, followed by moistening the reaction product in the treatment chamber, and extracting the moistened reaction product into the atmosphere.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: November 2, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shozo Yuge
  • Patent number: 7811874
    Abstract: The object is to provide a method for the fabrication of a semiconductor device having undergone an anneal treatment for the purpose of forming such ohmic contact as enables decrease of ohmic contact resistance and being provided on the (000-1) plane of silicon carbide with an insulating film and provide the semiconductor device. The method for the fabrication of a silicon carbide semiconductor device includes the steps of performing thermal oxidation on the (000-1) plane of a silicon carbide semiconductor in a gas containing at least oxygen and moisture, thereby forming an insulating film in such a manner as to contact the (000-1) plane of the silicon carbide semiconductor, removing part of the insulating film, thereby forming an opening part therein, depositing contact metal on at least part of the opening part, and performing a heat treatment, thereby forming a reaction layer of the contact metal and silicon carbide, wherein the heat treatment is implemented in a mixed gas of an inert gas and hydrogen.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: October 12, 2010
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Shinsuke Harada, Makoto Katou, Kenji Fukuda, Tsutomu Yatsuo
  • Patent number: 7799690
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of oxide film and uniformity in thickness of the oxide film.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: September 21, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
  • Patent number: 7795158
    Abstract: In an oxidation method for a semiconductor process, target substrates are placed at intervals in a vertical direction within a process field of a process container. An oxidizing gas and a deoxidizing gas are supplied to the process field from one side of the process field while gas is exhausted from the other side. One or both of the oxidizing gas and the deoxidizing gas are activated. The oxidizing gas and the deoxidizing gas are caused to react with each other, thereby generating oxygen radicals and hydroxyl group radicals within the process field. An oxidation process is performed on the surfaces of the target substrate by use of the oxygen radicals and the hydroxyl group radicals.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: September 14, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Takehiko Fujita, Jun Ogawa, Shigeru Nakajima, Kazuhide Hasebe
  • Patent number: 7795159
    Abstract: Provided are a charge trap semiconductor memory device including a charge trap layer on a semiconductor substrate, and a method of manufacturing the charge trap semiconductor memory device. The method includes: (a) coating a first precursor material on a surface of a semiconductor substrate to be deposited and oxidizing the first precursor material to form a first layer formed of an insulating material; (b) coating a second precursor material formed of metallicity on the first layer; (c) supplying the first precursor material on the surface coated with the second precursor material to substitute the second precursor material with the first precursor material; and (d) oxidizing the first and second precursor materials obtained in (c) to form a second layer formed of an insulating material and a metal impurity, and (a) through (d) are performed at least one time to form a charge trap layer having a structure in which the metal impurity is isolated in the insulating material.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-soo Seol, Yo-sep Min, Sang-min Shin
  • Patent number: 7674724
    Abstract: An oxidizing method for an object to be processed according to the present invention includes: an arranging step of arranging a plurality of objects to be processed in a processing container whose inside can be vacuumed, the processing container having a predetermined length, a supplying unit of an oxidative gas being provided at one end of the processing container, a plurality of supplying units of a reducing gas being provided at a plurality of positions in a longitudinal direction of the processing container; an atmosphere forming step of supplying the oxidative gas and the reducing gas into the processing container in order to form an atmosphere having active oxygen species and active hydroxyl species in the processing container; and an oxidizing step of oxidizing surfaces of the plurality of objects to be processed in the atmosphere.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 9, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Keisuke Suzuki, Toshiyuki Ikeuchi, Kota Umezawa
  • Patent number: 7670954
    Abstract: Provided is a method of manufacturing a semiconductor device including at least two processes. Under an atmosphere comprising hydrogen and oxygen, a sacrificial oxide film is formed on a silicon substrate that is provided with at least one nitride region. Then, the sacrificial oxide film and the nitride region are removed from the silicon substrate.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: March 2, 2010
    Assignee: Elpida Memory, Inc.
    Inventor: Takuo Ohashi
  • Patent number: 7659206
    Abstract: A method of treating a substrate comprises depositing silicon oxycarbide on the substrate and removing the silicon oxycarbide from the substrate. The silicon oxycarbide on the substrate is decarbonized by exposure to an energized oxygen-containing gas that heats the substrate and converts the layer of silicon oxycarbide into a layer of silicon oxide. The silicon oxide is removed by exposure to a plasma of fluorine-containing process gas. Alternatively, the remaining silicon oxide can be removed by a fluorine-containing acidic bath. In yet another version, a plasma of a fluorine-containing gas and an oxygen-containing gas is energized to remove the silicon oxycarbide from the substrate.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Krishna Vepa, Yashraj Bhatnagar, Ronald Rayandayan, Venkata Balagani
  • Patent number: 7659214
    Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a first wet process gas comprising water vapor into the process chamber, and reacting the substrate with the first wet process gas to grow an oxide film on the substrate. The method further includes flowing a second wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber, and reacting the oxide film and the substrate with the second wet process gas to grow an oxynitride film. In another embodiment, the method further comprises annealing the substrate containing the oxynitride film in an annealing gas. According to one embodiment of the method where the substrate is silicon, a silicon oxynitride film can be formed that exhibits a nitrogen peak concentration of approximately 3 atomic % or greater.
    Type: Grant
    Filed: September 30, 2007
    Date of Patent: February 9, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Kimberly G. Reid, Anthony Dip
  • Patent number: 7632718
    Abstract: A semiconductor power component using flat conductor technology includes a vertical current path through a semiconductor power chip. The semiconductor power chip includes at least one large-area electrode on its top side and a large-area electrode on its rear side. The rear side electrode is surface-mounted on a flat conductor chip island of a flat conductor leadframe and the top side electrode is electrically connected to an internal flat conductor of the flat conductor leadframe via a connecting element. The connecting element includes a bonding strip extending from the top side electrode to the internal flat conductor and further includes, on the top side of the bonding strip, bonding wires extending from the top side electrode to the internal flat conductor.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: December 15, 2009
    Assignee: Infineon Technologies AG
    Inventor: Khalil Hosseini
  • Patent number: 7622338
    Abstract: The present invention provides a method for forming a semiconductor region having a desired shape, and also provides a method for manufacturing a semiconductor device with few variations. Moreover, the present invention provides a method for manufacturing a semiconductor device which can reduce the cost with a small number of materials and with high yield. According to the present invention, after a semiconductor film is partially oxidized to form an oxide layer, the semiconductor film is etched using the oxide layer as a mask to form a semiconductor region having a desired shape, and thereafter a semiconductor device using the semiconductor region is manufactured. Thus, a semiconductor region having a desired shape can be formed in a predetermined position without using a known photolithography step using a resist.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: November 24, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Osamu Nakamura, Junko Sato
  • Publication number: 20090269939
    Abstract: Methods for selective oxidation using pulses of an oxidizing agent are described. An oxidation process is provided in which a pulse of an oxidizing agent is followed by a flow of a purging agent. The pulse of the oxidizing agent and the flow of the purging agent forms a cycle that can be repeated to allow for desired oxidation on parts of a structure, e.g., a transistor structure, while preventing or limiting undesired oxidation on other parts of the structure. In addition, during the oxidation, a nitrogen source such as N2, NH3, N2H4 or combinations thereof, can be provided to enhance the selectivity of the oxidation process. The nitrogen source can act as an oxygen scavenger to enhance oxidation selectively, or undesired oxidation can also be further prevented or limited by introducing other oxygen scavengers, such as hydrazine.
    Type: Application
    Filed: February 27, 2009
    Publication date: October 29, 2009
    Applicant: ASM International, N.V.
    Inventor: Hessel Sprey
  • Patent number: 7598184
    Abstract: A method for the selective removal of a high-k layer such as HfO2 over silicon or silicon dioxide is provided. More specifically, a method for etching high-k selectively over silicon and silicon dioxide and a plasma composition for performing the selective etch process is provided. Using a BCl3 plasma with well defined concentrations of nitrogen makes it possible to etch high-k with at a reasonable etch rate while silicon and silicon dioxide have an etch rate of almost zero. The BCl3 comprising plasmas have preferred additions of 10 up to 13% nitrogen. Adding a well defined concentration of nitrogen to the BCl3/N2 plasma gives the unexpected deposition of a Boron-Nitrogen (BxNy) comprising film onto the silicon and silicon dioxide which is not deposited onto the high-k material. Due to the deposition of the Boron-Nitrogen (BxNy) comprising film, the etch rate of silicon and silicon dioxide is dropped down to zero.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: October 6, 2009
    Assignee: IMEC
    Inventors: Denis Shamiryan, Vasile Paraschiv, Marc Demand
  • Publication number: 20090221120
    Abstract: A method of forming a semiconductor device includes providing a substrate for the semiconductor device. A base oxide layer is formed overlying the substrate by applying a rapid thermal oxidation (RTO) of the substrate in the presence of oxygen. A nitrogen-rich region is formed within and at a surface of the base oxide layer. The nitrogen-rich region overlies an oxide region in the base oxide layer. Afterwards, the semiconductor device is annealed in a dilute oxygen and hydrogen-free ambient of below 1 Torr partial pressure of the oxygen. The annealing heals bond damage in both the oxide region and the nitrogen-rich region in the base oxide layer. After annealing the semiconductor device in the dilute oxygen ambient, in-situ steam generation (ISSG) is used to grow and density the oxide region in the base oxide layer at an interface between the substrate and base oxide layer.
    Type: Application
    Filed: February 28, 2008
    Publication date: September 3, 2009
    Inventors: Tien Ying Luo, Ning Liu, Mohamed S. Moosa
  • Patent number: 7553459
    Abstract: A safe, reduced pressure apparatus for generating water vapor from hydrogen and oxygen and feeding high purity moisture to processes such as semiconductor production. The apparatus eliminates the possibility of the gas igniting by maintaining the internal pressure of the catalytic reactor for generating moisture at a high level while supplying moisture gas from the reactor under reduced pressure. A heat dissipation reactor improvement substantially increases moisture generation without being an enlargement in size by efficient cooling of the reactor alumite-treated fins.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: June 30, 2009
    Assignees: Fujikin Incorporated
    Inventors: Tadahiro Ohmi, Nobukazu Ikeda, Yukio Minami, Kouji Kawada, Katunori Komehana, Teruo Honiden, Touru Hirai, Akihiro Morimoto, Toshirou Nariai, Keiji Hirao, Masaharu Taguchi, Osamu Nakamura
  • Patent number: 7550353
    Abstract: One embodiment of a method for forming a semiconductor device can include forming a gate pattern on a semiconductor substrate and performing a selective re-oxidation process on the gate pattern in gas ambient including hydrogen, oxygen, and nitrogen. When the gate pattern includes a tunnel insulation layer, a metal nitride layer and a metal layer, the selective re-oxidation process heals the etching damage of a gate pattern and simultaneously prevents oxidation of the metal nitride layer and a tungsten electrode.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: June 23, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Hak Lee, Woong-Hee Sohn, Jae-Hwa Park, Gil-Heyun Choi, Byung-Hee Kim, Hee-Sook Park
  • Patent number: 7541297
    Abstract: A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: June 2, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Abhijit Basu Mallick, Jeffrey C. Munro, Linlin Wang, Srinivas D. Nemani, Yi Zheng, Zheng Yuan, Dimitry Lubomirsky, Ellie Y. Yieh
  • Patent number: 7534731
    Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber. The wet process gas and the nitriding gas form a processing ambient that reacts with the substrate such that an oxynitride film grows on the substrate. In yet another embodiment, the method further comprises flowing a diluting gas into the process chamber while flowing the wet process gas to control a growth rate of the oxynitride film. In another embodiment, the method further comprises annealing the substrate and the oxynitride film in an annealing gas. According to embodiments of the method where the substrate is silicon, a silicon oxynitride film forms that exhibits a nitrogen peak concentration of at least approximately 6 atomic % and an interface state density of less than approximately 1.5 ×10 12 per cc.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: May 19, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Kimberly G. Reid, Anthony Dip
  • Publication number: 20090088000
    Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a first wet process gas comprising water vapor into the process chamber, and reacting the substrate with the first wet process gas to grow an oxide film on the substrate. The method further includes flowing a second wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber, and reacting the oxide film and the substrate with the second wet process gas to grow an oxynitride film. In another embodiment, the method further comprises annealing the substrate containing the oxynitride film in an annealing gas. According to one embodiment of the method where the substrate is silicon, a silicon oxynitride film can be formed that exhibits a nitrogen peak concentration of approximately 3 atomic % or greater.
    Type: Application
    Filed: September 30, 2007
    Publication date: April 2, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kimberly G. Reid, Anthony Dip
  • Publication number: 20090081884
    Abstract: A method for selective oxidation of silicon containing materials in a semiconductor device is disclosed and claimed. In one aspect, a rapid thermal processing apparatus is used to selectively oxidize a substrate by in-situ steam generation at high pressure in a hydrogen rich atmosphere. Other materials, such as metals and barrier layers, in the substrate are not oxidized.
    Type: Application
    Filed: September 24, 2007
    Publication date: March 26, 2009
    Inventors: YOSHITAKA YOKOTA, Norman Tam, Balasubramanian Ramachandran, Martin John Ripley
  • Publication number: 20090061647
    Abstract: Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer overlying at least a portion of the substrate, the silicon oxide layer including carbon species as a byproduct of formation. The methods may also include introducing an acidic vapor into the semiconductor processing chamber, the acidic vapor reacting with the silicon oxide layer to remove the carbon species from the silicon oxide layer. The methods may also include removing the acidic vapor from the semiconductor processing chamber. Systems to deposit a silicon oxide layer on a substrate are also described.
    Type: Application
    Filed: August 27, 2007
    Publication date: March 5, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Abhijit Basu Mallick, Srinivas D. Nemani, Timothy W. Weidman
  • Publication number: 20090042379
    Abstract: The present invention provides a method for fabricating semiconductor device, which is capable of adjusting a gate oxide layer thickness, including: providing a semiconductor substrate; growing a first oxide layer on a surface of the semiconductor substrate; patterning the first oxide layer to expose the first oxide layer corresponding to a gate to be formed; removing the exposed first oxide layer; immersing the substrate into deionized water to grow a second oxide layer; forming a polysilicon layer on the surfaces of the first oxide layer and the second oxide layer; and etching the polysilicon layer to form a gate. The method for fabricating semiconductor device according to the present invention, which is capable of adjusting the thickness of gate oxide layer, can control the thickness of gate oxide layer precisely to satisfy the requirement for different threshold voltages.
    Type: Application
    Filed: August 6, 2008
    Publication date: February 12, 2009
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Tai Chiang Chen, Xin Wang
  • Patent number: 7442655
    Abstract: The invention includes selective oxidation methods and transistor fabrication methods. In one implementation, a selective oxidation method includes positioning a substrate within a chamber. The substrate has first and second different oxidizable materials. The substrate is therein exposed to a gas mixture comprising an oxidizer and a reducer under conditions effective to selectively grow an oxide layer on the first material relative to the second material. The oxidizer oxidizes the first and second materials under the conditions. The reducer reduces oxidized second material under the conditions back to the second material. After selectively growing the oxide layer on the first material relative to the second material, partial pressure of the oxidizer and the reducer is reduced within the chamber by flowing an inert gas to the chamber while chamber pressure and chamber temperature are at or above those of the conditions during the exposing. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: October 28, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Don Carl Powell
  • Patent number: 7435690
    Abstract: Method of preparing a silicon dioxide layer by high-temperature oxidation on a substrate of formula Si1-xGex in which x is greater than 0 and less than or equal to 1, the said method comprising the following successive steps: a) at least one additional layer of thickness hy and of overall formula Si1-yGey, in which y is greater than 0 and less than x, is deposited on the said substrate of formula Si1-xGex; and b) the high-temperature oxidation of the said additional layer of overall formula Si1-yGey is carried out, whereby the said additional layer is completely or partly converted into a layer of silicon oxide SiO2. Method of preparing an optical or electronic component, comprising at least one step for preparing an SiO2 layer using the method described above.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: October 14, 2008
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Hubert Moriceau, Pierre Mur
  • Patent number: 7429514
    Abstract: A sidewall oxidation process for use during the formation of a transistor such as a flash memory cell allows for improved control of a gate oxide profile. The method comprises doping transistor source and drain regions to different doping levels, then performing a transistor sidewall oxidation using a particular process to modify the gate oxide thickness. The oxide forms at a faster rate along the source sidewall than along the drain sidewall. By using ranges within the oxidation environment described, a source side gate oxide having a variable and selectable thickness may be formed, while forming a drain-side oxide which has a single thickness where a thinner layer is desirable. This leads to improved optimization of key competing requirements of a flash memory cell, such as program and erase performance, while maintaining sufficient long-term data retention. The process may allow improved cell scalability, shortened design time, and decreased manufacturing costs.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: September 30, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Paul J. Rudeck, Don C. Powell
  • Publication number: 20080233017
    Abstract: A semiconductor oxidation apparatus is provided with a sealable oxidation chamber defined by walls, a base provided within the oxidation chamber and configured to support a semiconductor sample, a supply part configured to supply water vapor into the oxidation chamber to oxidize a specific portion of the semiconductor sample, a monitoring window provided in one of the walls of the oxidation chamber and disposed at a position capable of confronting the semiconductor sample supported on the base, a monitoring part provided outside the oxidation chamber and capable of confronting the semiconductor sample supported on the base via the monitoring window, and an adjusting part configured to adjust a distance between the base and the monitoring part.
    Type: Application
    Filed: February 13, 2006
    Publication date: September 25, 2008
    Inventors: Shunichi Sato, Naoto Jikutani, Akihiro Itoh, Shinya Umemoto, Yoshiaki Zenno, Takatoshi Yamamoto
  • Publication number: 20080203542
    Abstract: Oxidation methods and resulting structures including providing an oxide layer on a substrate and then re-oxidizing the oxide layer by vertical ion bombardment of the oxide layer in an atmosphere containing at least one oxidant. The oxide layer may be provided over diffusion regions, such as source and drain regions, in a substrate. The oxide layer may overlie the substrate and is proximate a gate structure on the substrate. The at least one oxidant may be oxygen, water, ozone, or hydrogen peroxide, or a mixture thereof. These oxidation methods provide a low-temperature oxidation process, less oxidation of the sidewalls of conductive layers in the gate structure, and less current leakage to the substrate from the gate structure.
    Type: Application
    Filed: May 13, 2008
    Publication date: August 28, 2008
    Applicant: Micron Technology, Inc.
    Inventors: Li Li, Pai-Hung Pan
  • Patent number: 7410912
    Abstract: Metal oxide nanowires are being investigated to make nanodevices and nanosensors. High operation temperatures or vacuum is required in the manufacturing of metal oxide nanowires by existing vapor phase evaporation methods. This invention provides a method of manufacturing metal oxide nanowires by first providing a metal to form a non-linear substantially planar structure defining a surface. The metal is then heated and maintained at a temperature from 300 to 800° C., and then exposed to oxygen and water vapor containing air stream for a sufficient period of time to form the metal oxide nanowires. The oxygen containing air stream flows in a direction substantially parallel to the plane of the structure. Relatively low temperatures may be used and no vacuum is required in this method, thereby reducing the overall manufacturing costs. Further, this method is able to manufacture different densities of the metal oxide nanowires simultaneously.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: August 12, 2008
    Assignee: The Hong Kong Polytechnic University
    Inventors: Chunhua Xu, San-Qiang Shi, Yang Liu, Chung Ho Woo
  • Publication number: 20080139001
    Abstract: A method for processing a polysilazane film includes performing temperature increase of changing a process field of a reaction container, which accommodates a target substrate with a polysilazane coating film formed thereon, from a pre-heating temperature to a predetermined temperature, while setting the process field to be a first atmosphere containing oxygen and having a first pressure of 6.7 to 26.7 kPa. Then, the method includes performing a first heat process for obtaining an insulating film containing silicon and oxygen by baking the coating film at a first process temperature not lower than the predetermined temperature, while setting the process field to be a second atmosphere containing an oxidizing gas and having a second pressure higher than the first pressure.
    Type: Application
    Filed: November 27, 2007
    Publication date: June 12, 2008
    Inventors: Masahisa Watanabe, Tetsuya Shibata
  • Publication number: 20080131710
    Abstract: Provided are a charge trap semiconductor memory device including a charge trap layer on a semiconductor substrate, and a method of manufacturing the charge trap semiconductor memory device. The method includes: (a) coating a first precursor material on a surface of a semiconductor substrate to be deposited and oxidizing the first precursor material to form a first layer formed of an insulating material; (b) coating a second precursor material formed of metallicity on the first layer; (c) supplying the first precursor material on the surface coated with the second precursor material to substitute the second precursor material with the first precursor material; and (d) oxidizing the first and second precursor materials obtained in (c) to form a second layer formed of an insulating material and a metal impurity, and (a) through (d) are performed at least one time to form a charge trap layer having a structure in which the metal impurity is isolated in the insulating material.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 5, 2008
    Inventors: Kwang-soo Seol, Yo-sep Min, Sang-min Shin
  • Publication number: 20080124943
    Abstract: An object of this invention is to make it possible to suppress early-stage oxidation of a substrate surface prior to oxidation processing, and to remove a natural oxidation film. For this reason, a method is provided comprising the steps of loading a substrate into a processing chamber, supplying a hydrogen-containing gas and an oxygen-containing gas into the processing chamber, and subjecting a surface of the substrate to oxidation processing, and unloading the substrate subjected to oxidation processing from the processing chamber. In the oxidation processing step, the hydrogen-containing gas is introduced in advance into the processing chamber, with the pressure inside the processing chamber set at a pressure that is less than atmospheric pressure, and the oxygen-containing gas is then introduced in the state in which the introduction of the hydrogen-containing gas is continued.
    Type: Application
    Filed: March 8, 2006
    Publication date: May 29, 2008
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Kazuhiro Yuasa, Yasuhiro Megawa
  • Patent number: 7371697
    Abstract: Oxidation methods and resulting structures including providing an oxide layer on a substrate and then re-oxidizing the oxide layer by vertical ion bombardment of the oxide layer in an atmosphere containing at least one oxidant. The oxide layer may be provided over diffusion regions, such as source and drain regions, in a substrate. The oxide layer may overlie the substrate and is proximate a gate structure on the substrate. The at least one oxidant may be oxygen, water, ozone, or hydrogen peroxide, or a mixture thereof. These oxidation methods provide a low-temperature oxidation process, less oxidation of the sidewalls of conductive layers in the gate structure, and less current leakage to the substrate from the gate structure.
    Type: Grant
    Filed: October 9, 2006
    Date of Patent: May 13, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Li Li, Pai-Hung Pan
  • Patent number: 7338869
    Abstract: A semiconductor device and a method of manufacturing the device using a (000-1)-faced silicon carbide substrate are provided. A SiC semiconductor device having a high voltage resistancehigh blocking voltage and high channel mobility is manufactured by optimizing the heat-treatment method used following the gate oxidation. The method of manufacturing a semiconductor device includes the steps of forming a gate insulation layer on a semiconductor region formed of silicon carbide having a (000-1) face orientation, forming a gate electrode on the gate insulation layer, forming an electrode on the semiconductor region, cleaning the semiconductor region surface. The gate insulation layer is formed in an atmosphere containing 1% or more H2O (water) vapor at a temperature of from 800° C. to 1150° C. to reduce the interface trap density of the interface between the gate insulation layer and the semiconductor region.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: March 4, 2008
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Kenji Fukuda, Junji Senzaki
  • Patent number: 7326655
    Abstract: A method for forming an oxide layer on a substrate. The method includes exposing a process gas containing H2, an oxygen-containing gas, and a halogen-containing oxidation accelerant gas to the substrate, where the process chamber is maintained at a subatmospheric pressure, and forming an oxide layer through thermal oxidization of the substrate by the process gas. According to one embodiment of the invention, the substrate can be maintained at a temperature between about 150° C. and about 900° C. A microstructure containing an oxide layer is described, where the oxide layer can be a gate dielectric oxide layer or an interface oxide layer integrated with a high-k layer.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: February 5, 2008
    Assignee: Tokyo Electron Limited
    Inventor: Raymond Joe
  • Patent number: 7312139
    Abstract: A method of fabricating a nitrogen-containing gate dielectric layer is described. First, a gate dielectric layer is formed on a substrate by performing a dilute wet oxidation process. Then, a nitridation step is performed for doping nitrogen into the gate dielectric layer. After that, a re-oxidation step is performed for repairing the nitrogen-doped gate dielectric layer. The above steps are carried out inside the same reaction chamber. Moreover, two or more wafers can be treated inside the reaction chamber at the same time.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: December 25, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Ren Wang, Ying-Wei Yen, Michael Chan
  • Patent number: 7304003
    Abstract: An oxidizing method for an object to be processed according to the present invention includes: an arranging step of arranging a plurality of objects to be processed in a processing container whose inside can be vacuumed, the processing container having a predetermined length, a main supplying unit of an oxidative gas and a supplying unit of a reducing gas being provided at one end of the processing container, a sub supplying unit of the oxidative gas being provided on a way in a longitudinal direction of the processing container; an atmosphere forming step of supplying the oxidative gas and the reducing gas into the processing container in order to form an atmosphere having active oxygen species and active hydroxyl species in the processing container; and an oxidizing step of oxidizing surfaces of the plurality of objects to be processed in the atmosphere.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: December 4, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Keisuke Suzuki, Toshiyuki Ikeuchi, Kimiya Aoki
  • Patent number: 7300833
    Abstract: When an oxidation treatment for regenerating a gate insulating film 6 is performed after forming gate electrodes 7A of a polymetal structure in which a WNx film and a W film are stacked on a polysilicon film, a wafer 1 is heated and cooled under conditions for reducing a W oxide 27 on the sidewall of each gate electrode 7A. As a result, the amount of the W oxide 27 to be deposited on the surface of the wafer 1 is reduced.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: November 27, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Naoki Yamamoto, Hiroyuki Uchiyama, Norio Suzuki, Eisuke Nishitani, Shin'ichiro Kimura, Kazuyuki Hozawa
  • Patent number: 7273819
    Abstract: Substrates in a reaction chamber are sequentially exposed to at least three gas atmospheres: a first atmosphere of a first purge gas, a second atmosphere of a process gas and a third atmosphere of a second purge gas. The gases are introduced into the reaction chamber from one end of the chamber and exit from the opposite end. Successive gases entering the chamber are selected so that a stable interface with the immediately preceding gas can be maintained. For example, when the gases are fed into the chamber at the chamber's top end and are exhausted at the bottom end, the gases are chosen with successively lower molecular weights. In effect, each gas atmosphere stays on top of and pushes the previous gas atmosphere out of the chamber from the top down. Advantageously, the gases can be more effectively and completely removed from the chamber.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: September 25, 2007
    Assignee: ASM International N.V.
    Inventors: Theodorus G. M. Oosterlaken, Frank Huussen, Menso Hendriks
  • Patent number: 7268205
    Abstract: Devices formed of or including biocompatible polyhydroxyalkanoates are provided with controlled degradation rates, preferably less than one year under physiological conditions. Preferred devices include sutures, suture fasteners, meniscus repair devices, rivets, tacks, staples, screws (including interference screws), bone plates and bone plating systems, surgical mesh, repair patches, slings, cardiovascular patches, orthopedic pins (including bone filling augmentation material), adhesion barriers, stents, guided tissue repair/regeneration devices, articular cartilage repair devices, nerve guides, tendon repair devices, atrial septal defect repair devices, pericardial patches, bulking and filling agents, vein valves, bone marrow scaffolds, meniscus regeneration devices, ligament and tendon grafts, ocular cell implants, spinal fusion cages, skin substitutes, dural substitutes, bone graft substitutes, bone dowels, wound dressings, and hemostats.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: September 11, 2007
    Assignee: Metabolix, Inc.
    Inventors: Simon F. Williams, David P. Martin, Frank A. Skraly
  • Patent number: 7256143
    Abstract: Provided are a semiconductor device having a self-aligned contact plug and a method of fabricating the semiconductor device. The semiconductor device includes conductive patterns, a first interlayer insulating layer, a first spacer, a second interlayer insulating layer, and a contact plug. In each conductive pattern, a conductive layer and a capping layer are sequentially deposited on an insulating layer over a semiconductor substrate. The first interlayer insulating layer fills spaces between the conductive patterns and has a height such that when the first interlayer insulating layer is placed on the insulating layer, the first interlayer insulating layer is lower than a top surface of the capping layer but higher than a top surface of the conductive layer. The first spacer surrounds the outer surface of the capping layer on the first interlayer insulating layer.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: August 14, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myeong-Cheol Kim, Chang-Jin Kang, Kyeong-Koo Chi, Seung-Young Son
  • Patent number: 7250376
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: July 31, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
  • Patent number: 7235497
    Abstract: The invention includes selective oxidation methods and transistor fabrication methods. In one implementation, a selective oxidation method includes positioning a substrate within a chamber. The substrate has first and second different oxidizable materials. The substrate is therein exposed to a gas mixture comprising an oxidizer and a reducer under conditions effective to selectively grow an oxide layer on the first material relative to the second material. The oxidizer oxidizes the first and second materials under the conditions. The reducer reduces oxidized second material under the conditions back to the second material. After selectively growing the oxide layer on the first material relative to the second material, partial pressure of the oxidizer and the reducer is reduced within the chamber by flowing an inert gas to the chamber while chamber pressure and chamber temperature are at or above those of the conditions during the exposing. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: June 26, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Don Carl Powell
  • Patent number: 7235498
    Abstract: This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (N2O) and ozone (O3). The presence of O3 in the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which N2O is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of O3 interferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of N2O alone virtually self-limiting. The presence of O3 in the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with N2O in the presence of a strong, fluorine-containing oxidizing agent such as NF3 or SF6.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: June 26, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Singh Sandhu, Randhir P S Thakur
  • Patent number: 7211523
    Abstract: A method for forming a field oxide is disclosed. In one embodiment, the method comprises providing a semiconductor structure having a substrate, a pad oxide, and a patterned barrier layer, performing a dry oxidation process to form a first field oxide on the substrate in a region not covered with the barrier layer by introducing pure dry oxygen, and performing a wet oxidation process to form a second field oxide adjacent the first field oxide by introducing hydrogen and oxygen. The method of the present invention can improve the quality and electrical property of the semiconductor device, increase the yield, and reduce the cost.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: May 1, 2007
    Assignee: Mosel Vitelic, Inc.
    Inventors: Yi Fu Chung, Shih-Chi Lai, Jen Chieh Chang
  • Patent number: 7199022
    Abstract: In order to achieve an isolation trench formation process according to the present invention in which the structure of a silicon nitride film liner can be easily controlled and to allow both of reduction of the device feature length and reduction in stress occurring in an isolation trench, the silicon nitride film liner is first deposited on the inner wall of the trench formed on a silicon substrate. The upper surface of a first embedded insulator film for filling the inside of the trench is recessed downward so as to expose an upper end portion of the silicon nitride film liner. Next, the exposed portion of the silicon nitride film liner is converted into non-silicon-nitride type insulator film, such as a silicon oxide film. A second embedded insulator film is then deposited on the upper portion of the first embedded insulator film, and the deposited surface is then planarized.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: April 3, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kan Yasui, Toshiyuki Mine, Yasushi Goto, Natsuki Yokoyama
  • Patent number: 7186632
    Abstract: In a method for manufacturing a semiconductor device having a laminated gate electrode, a phosphorus-doped polysilicon is formed on a gate oxide film. A high-melting metal or a compound of a high-melting metal and silicon is formed on the polysilicon. Phosphorus is doped into the polysilicon so that a concentration of the phosphorus in the polysilicon at an interface between the polysilicon and the gate oxide film is 2×1020(1/cm3) or less. Then, thermal oxidation is carried out in a wet-hydrogen atmosphere containing water vapor.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: March 6, 2007
    Assignee: Elpida Memory, Inc.
    Inventors: Kazuo Ogawa, Kiyonori Ohyu, Kensuke Okonogi, Toshihiro Imamura, Keiichi Watanabe, Hiroyuki Ohta
  • Patent number: 7183143
    Abstract: A method for forming a nitrided tunnel oxide layer is described. A silicon oxide layer as a tunnel oxide layer is formed on a semiconductor substrate, and a plasma nitridation process is performed to implant nitrogen atoms into the silicon oxide layer. A thermal drive-in process is then performed to diffuse the implanted nitrogen atoms across the silicon oxide layer.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: February 27, 2007
    Assignee: Macronix International Co., Ltd.
    Inventor: Tzu-Yu Wang
  • Patent number: 7179883
    Abstract: Devices formed of or including biocompatible polyhydroxyalkanoates are provided with controlled degradation rates, preferably less than one year under physiological conditions. Preferred devices include sutures, suture fasteners, meniscus repair devices, rivets, tacks, staples, screws (including interference screws), bone plates and bone plating systems, surgical mesh, repair patches, slings, cardiovascular patches, orthopedic pins (including bone filling augmentation material), adhesion barriers, stents, guided tissue repair/regeneration devices, articular cartilage repair devices, nerve guides, tendon repair devices, atrial septal defect repair devices, pericardial patches, bulking and filling agents, vein valves, bone marrow scaffolds, meniscus regeneration devices, ligament and tendon grafts, ocular cell implants, spinal fusion cages, skin substitutes, dural substitutes, bone graft substitutes, bone dowels, wound dressings, and hemostats.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: February 20, 2007
    Assignee: Metabolix, Inc.
    Inventors: Simon F. Williams, David P. Martin, Frank A. Skraly
  • Patent number: RE40113
    Abstract: A method for fabricating gate oxide includes a dilute wet oxidation process with additional nitrogen and moisture and an annealing process with a nitrogen base gas, wherein the volume of additional nitrogen is about 6-12 6-20 times of the volume of the additional moisture. The method according to the invention improves the electrical quality of the gate oxide by raising the Qbd and by reducing the leakage current of the gate oxide.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: February 26, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Shan Tai, H. T. Yang, Hsueh-Hao Shih, Kuen-Chu Chen