Depositing Organic Material (e.g., Polymer, Etc.) Patents (Class 438/780)
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Patent number: 9034740Abstract: The deposition rate of a porous insulation film is increased, and the film strength of the porous insulation film is improved. Two or more organic siloxane raw materials each having a cyclic SiO structure as a main skeleton thereof, and having mutually different structures, are vaporized, and transported with a carrier gas to a reactor (chamber), and an oxidant gas including an oxygen atom is added thereto. Thus, a porous insulation film is formed by a plasma CVD (Chemical Vapor Deposition) method or a plasma polymerization method in the reactor (chamber). In the step, the ratio of the flow rate of the added oxidant gas to the flow rate of the carrier gas is more than 0 and 0.08 or less.Type: GrantFiled: May 6, 2013Date of Patent: May 19, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Hironori Yamamoto, Fuminori Ito, Yoshihiro Hayashi
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Patent number: 9034736Abstract: The present invention provides a method of patterning an electronic or photonic material on a substrate comprising: forming a film of said electronic or photonic material on said substrate; and using a fluoropolymer to protect regions of said electronic or photonic material during a patterning process.Type: GrantFiled: July 9, 2010Date of Patent: May 19, 2015Assignee: Cambridge Enterprise LimitedInventors: Henning Sirringhaus, Jui-Fen Chang, Michael Gwinner
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Patent number: 9029171Abstract: The present disclosure relates to a structure and method to create a self-repairing dielectric material for semiconductor device applications. A porous dielectric material is deposited on a substrate, and exposed with treating agent particles such that the treating agent particles diffuse into the dielectric material. A dense non-porous cap is formed above the dielectric material which encapsulates the treating agent particles within the dielectric material. The dielectric material is then subjected to a process which creates damage to the dielectric material. A chemical reaction is initiated between the treating agent particles and the damage, repairing the damage. A gradient concentration resulting from the consumption of treating agent particles by the chemical reaction promotes continuous diffusion the treating agent particles towards the damaged region of the dielectric material, continuously repairing the damage.Type: GrantFiled: June 25, 2012Date of Patent: May 12, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Min Huang, Chung-Ju Lee, Tien-I Bao
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Patent number: 9029270Abstract: Provided is a photopolymer composition for a semiconductor element surface protective film or an interlayer insulating film, in which a solution of the photopolymer composition comprises 100 parts by mass of (A) a phenolic resin having a biphenyldiyl structure in a main chain of the resin; 1 to 30 parts by mass of (B) a photo acid-generating agent; and 1 to 60 parts by mass of (C) a compound that can be reacted with ingredient (A) by means of an acid generated from the photo acid-generating agent or heat.Type: GrantFiled: September 12, 2011Date of Patent: May 12, 2015Assignee: Asahi Kasei E-Materials CorporationInventors: Takahiro Sasaki, Jun Li
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Patent number: 9029271Abstract: A method of patterning a block copolymer layer includes: providing a guide pattern on a surface of a substrate, the guide pattern including sidewalls each elongated in a longitudinal direction and spaced apart from each other, a trench defined by a bottom surface and facing surfaces of the sidewalls, and having a uniform width over an entire length thereof in the longitudinal direction, and a latitudinal wall perpendicular to the longitudinal direction of the trench; providing a block copolymer layer on the surface of the substrate; and annealing the block copolymer to cause self-assembly of the block copolymer and to direct the same in the trench. The block copolymer has a microphase-separation into anisotropic discrete domains aligned with a period ?o in the trench by the annealing.Type: GrantFiled: December 24, 2013Date of Patent: May 12, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Youn Jung Park, Haeng Deog Koh, Mi-Jeong Kim, Seong-Jun Jeong
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Patent number: 9029228Abstract: The invention generally related to a method for preparing a layer of graphene directly on the surface of a substrate, such as a semiconductor substrate. The layer of graphene may be formed in direct contact with the surface of the substrate, or an intervening layer of a material may be formed between the substrate surface and the graphene layer.Type: GrantFiled: May 9, 2013Date of Patent: May 12, 2015Assignees: SunEdision Semiconductor Limited (UEN201334164H), Kansas State University Research FoundationInventors: Michael R. Seacrist, Vikas Berry, Phong Tuan Nguyen
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Patent number: 9028915Abstract: A method for forming a photoresist layer on a semiconductor device is disclosed. An exemplary includes providing a wafer. The method further includes spinning the wafer during a first cycle at a first speed, while a pre-wet material is dispensed over the wafer and spinning the wafer during the first cycle at a second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer during a second cycle at the first speed, while the pre-wet material continues to be dispensed over the wafer and spinning the wafer during the second cycle at the second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer at a third speed, while a photoresist material is dispensed over the wafer including the pre-wet material.Type: GrantFiled: September 4, 2012Date of Patent: May 12, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Wei Chang, Chih-Chien Wang, Wang-Pen Mo, Hung-Chang Hsieh
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Publication number: 20150125593Abstract: A method of patterning an elastomeric polymer material includes: (a) dissolving a precursor of the elastomeric polymer material in a solvent to give an elastomeric polymer precursor solution; and (b) forming a pattern from the elastomeric polymer precursor solution on a base by using a printer, wherein a temperature of the base is maintained to be about 10° C.-30° C. higher than a boiling point of the solvent.Type: ApplicationFiled: November 6, 2014Publication date: May 7, 2015Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung-kyun IM, Jong-jin PARK
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Publication number: 20150118847Abstract: In an imprint method of an embodiment, in the imprinting of an imprint shot including an outermost peripheral region of a substrate where resist is not desired to be entered at the time of imprinting, light curing the resist is applied to a light irradiation region with a predetermined width including a boundary between the outermost peripheral region and a pattern formation region more inside than the outermost peripheral region, whereby the resist which is to enter inside the outermost peripheral region is cured. Then, light curing the resist filled in a template pattern is applied onto a template.Type: ApplicationFiled: January 9, 2015Publication date: April 30, 2015Inventor: Shinji Mikami
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Publication number: 20150115415Abstract: Methods, apparatuses and devices relate to inkjet printing a covering layer on at least a first side of a substrate in a peripheral region thereof are discussed.Type: ApplicationFiled: October 30, 2013Publication date: April 30, 2015Inventors: Martin Mischitz, Karl Heinz Gasser, John Cooper, Kae-Horng Wang
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Patent number: 9018107Abstract: A deposition for producing a porous organosilica glass film comprising: introducing into a vacuum chamber gaseous reagents including one precursor of an organosilane or an organosiloxane, and a porogen distinct from the precursor, wherein the porogen is aromatic in nature; applying energy to the gaseous reagents in the chamber to induce reaction of the gaseous reagents to deposit a film, containing the porogen; and removing substantially all of the organic material by UV radiation to provide the porous film with pores and a dielectric constant less than 2.6.Type: GrantFiled: May 6, 2014Date of Patent: April 28, 2015Assignee: Air Products and Chemicals, Inc.Inventors: Mary Kathryn Haas, Raymond Nicholas Vrtis, Laura M. Matz
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Publication number: 20150111393Abstract: In the manufacturing method of a semiconductor device according to the present embodiment, a resist is supplied on a base material. A template including a first template region having a device pattern and a second template region being adjacent to the device pattern and having supporting column patterns is pressed against the resist on the base material. The resist is cured, thereby transferring the device pattern to the resist on a first material region of the base material corresponding to the first template region and at the same time transferring the supporting column patterns to the resist on a second material region of the base material corresponding to the second template region to form supporting columns. The supporting columns are contacted with the first template region when the device pattern is transferred to a resist supplied to the second material region.Type: ApplicationFiled: February 4, 2014Publication date: April 23, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Taishi ISHIKURA, Atsunobu ISOBAYASHI, Akihiro KAJITA
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Patent number: 9006720Abstract: Laser pyrolysis reactor designs and corresponding reactant inlet nozzles are described to provide desirable particle quenching that is particularly suitable for the synthesis of elemental silicon particles. In particular, the nozzles can have a design to encourage nucleation and quenching with inert gas based on a significant flow of inert gas surrounding the reactant precursor flow and with a large inert entrainment flow effectively surrounding the reactant precursor and quench gas flows. Improved silicon nanoparticle inks are described that has silicon nanoparticles without any surface modification with organic compounds. The silicon ink properties can be engineered for particular printing applications, such as inkjet printing, gravure printing or screen printing. Appropriate processing methods are described to provide flexibility for ink designs without surface modifying the silicon nanoparticles.Type: GrantFiled: April 8, 2013Date of Patent: April 14, 2015Assignee: NanoGram CorporationInventors: Shivkumar Chiruvolu, Igor Altman, Bernard M. Frey, Weidong Li, Guojun Liu, Robert B. Lynch, Gina Elizabeth Pengra-Leung, Uma Srinivasan
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Patent number: 9006019Abstract: A method for manufacturing a light-emitting device includes a step of forming an etching resistant protection layer on a substrate provided with an organic planarizing layer, a step of forming a plurality of electrodes on the etching resistant protection layer, a step of forming an organic compound layer on the substrate provided with the plurality of electrodes, a step of forming a resist layer on the organic compound layer formed on parts of electrodes among the plurality of electrodes using a photolithographic method, and a step of removing the organic compound layer in a region not covered with the resist layer by dry etching, wherein an entire surface of the organic planarizing layer on the substrate on which steps up to the step of forming the plurality of electrodes have been performed is covered with at least one of the etching resistant protection layer and the electrode.Type: GrantFiled: September 14, 2012Date of Patent: April 14, 2015Assignee: Canon Kabushiki KaishaInventors: Manabu Otsuka, Tomoyuki Hiroki
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Patent number: 9006051Abstract: An object is to improve water resistance and reliability of a semiconductor device by reducing the degree of peeling of a film. In a semiconductor device, a first inorganic insulating layer, a semiconductor element layer, a second inorganic insulating layer, an organic insulating layer, and a third inorganic insulating layer are sequentially stacked over a substrate. The second inorganic insulating layer is in contact with the first inorganic insulating layer in an opening portion provided in the semiconductor element layer. The third inorganic insulating layer is in contact with the second inorganic insulating layer in an opening portion provided in the organic insulating layer. In a region where the second inorganic insulating layer and the third inorganic insulating layer are in contact with each other, the second inorganic insulating layer has a plurality of irregularities or openings.Type: GrantFiled: April 14, 2009Date of Patent: April 14, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiaki Oikawa, Masayuki Kajiwara, Masataka Nakada, Masami Jintyou, Shunpei Yamazaki
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Patent number: 8999862Abstract: Methods of fabricating nano-scale structures are provided. A method includes forming a first hard mask pattern corresponding to first openings in a dense region, forming first guide elements on the first hard mask pattern aligned with the first openings, and forming second hard mask patterns in a sparse region to provide isolated patterns. A blocking layer is formed in the sparse region to cover the second hard mask patterns. A first domain and second domains are formed in the dense region using a phase separation of a block co-polymer layer. Related nano-scale structures are also provided.Type: GrantFiled: April 7, 2014Date of Patent: April 7, 2015Assignee: SK Hynix Inc.Inventors: Keun Do Ban, Cheol Kyu Bok, Myoung Soo Kim, Jung Hyung Lee, Hyun Kyung Shim, Chang Il Oh
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Patent number: 8999857Abstract: A method for forming a nano-textured surface on a substrate is disclosed. An illustrative embodiment of the present invention comprises dispensing of a nanoparticle ink of nanoparticles and solvent onto the surface of a substrate, distributing the ink to form substantially uniform, liquid nascent layer of the ink, and enabling the solvent to evaporate from the nanoparticle ink thereby inducing the nanoparticles to assemble into an texture layer. Methods in accordance with the present invention enable rapid formation of large-area substrates having a nano-textured surface. Embodiments of the present invention are well suited for texturing substrates using high-speed, large scale, roll-to-roll coating equipment, such as that used in office product, film coating, and flexible packaging applications. Further, embodiments of the present invention are well suited for use with rigid or flexible substrates.Type: GrantFiled: April 1, 2011Date of Patent: April 7, 2015Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Sangmoo Jeong, Liangbing Hu, Yi Cui
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Patent number: 8987019Abstract: A method of manufacturing an opto-electric device is disclosed, comprising the steps of providing a substrate (10), overlying a first main side of the substrate with an electrically interconnected open shunting structure (20), embedding the electrically interconnected open shunting structure in a transparent layer (30), removing the substrate from the embedded electrically interconnected open shunting structure, depositing a functional layer structure (40) over a free surface (31) formed after removal of the substrate.Type: GrantFiled: August 6, 2010Date of Patent: March 24, 2015Assignee: Koninklijke Philips N.V.Inventors: Antonius Maria Bernardus van Mol, Joanne Sarah Wilson, Chia-Chen Fan, Herbert Lifka, Edward Willem Albert Young, Hieronymus A.J.M. Andriessen
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Patent number: 8987024Abstract: System for wafer-level phosphor deposition. In an aspect, a semiconductor wafer is provided that includes a plurality of LED dies wherein at least one die includes an electrical contact, a photo-resist post covering the electrical contact, and a phosphor deposition layer covering the semiconductor wafer and surrounding the photo-resist post. In another aspect, a semiconductor wafer is provided that comprises a plurality of LED dies wherein at least one die comprises an electrical contact, a phosphor deposition layer covering the semiconductor wafer, and a cavity in the phosphor deposition layer exposing the at least one electrical contact.Type: GrantFiled: June 6, 2013Date of Patent: March 24, 2015Assignee: Bridgelux, IncInventor: Tao Xu
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Publication number: 20150079805Abstract: A semiconductor device and method of making the semiconductor device is described. A semiconductor die is provided. A polymer layer is formed over the semiconductor die. A via is formed in the polymer layer. The polymer layer is crosslinked in a first process. The polymer layer is thermally cured in a second process. The polymer layer can comprise polybenzoxazoles (PBO), polyimide, benzocyclobutene (BCB), or siloxane-based polymers. A surface of the polymer layer can be crosslinked by a UV bake to control a slope of the via during subsequent curing. The second process can further comprise thermally curing the polymer layer using conduction, convection, infrared, or microwave heating. The polymer layer can be thermally cured by increasing a temperature of the polymer at a rate greater than or equal to 10 degrees Celsius per minute, and can be completely cured in less than or equal to 60 minutes.Type: ApplicationFiled: September 17, 2013Publication date: March 19, 2015Applicant: DECA TECHNOLOGIES INC.Inventors: William Boyd Rogers, Willibrordus Gerardus Maria van den Hoek
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Patent number: 8980663Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are disclosed.Type: GrantFiled: July 18, 2013Date of Patent: March 17, 2015Assignee: Samsung Display Co., Ltd.Inventors: Won-Kyu Lee, Kyu-Sik Cho, Tae-Hoon Yang, Byoung-Kwon Choo, Sang-Ho Moon, Bo-Kyung Choi, Yong-Hwan Park, Joon-Hoo Choi, Min-Chul Shin, Yun-Gyu Lee
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Patent number: 8975195Abstract: A method of manufacturing an optical lithography mask includes providing a patterned layout design comprising a plurality of polygons, correcting the patterned layout design using optical proximity correction (OPC) by adjusting widths and lengths of one or more of the plurality of polygons, to generate a corrected patterned layout design, converting the corrected patterned layout design into a mask writer-compatible format, to generate a mask writer-compatible layout design comprising the plurality of polygons, and biasing each polygon in the plurality of polygons with a bias that accounts for large-scale density values of the patterned layout design, to generate a biased, mask writer-compatible layout design.Type: GrantFiled: February 1, 2013Date of Patent: March 10, 2015Assignee: GLOBALFOUNDRIES, Inc.Inventors: Todd Lukanc, Christopher Heinz Clifford, Tamer Coskun
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Patent number: 8975180Abstract: A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case, capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, can be used to form the masking layer. The capping layer can be formed of an conductive material, a semiconductor material, or an insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.Type: GrantFiled: April 21, 2014Date of Patent: March 10, 2015Assignee: Intermolecular, Inc.Inventors: Thomas R. Boussie, David E. Lazovsky, Sandra G. Malhotra
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Patent number: 8975164Abstract: The present invention provides a method of manufacturing a semiconductor device. The method at least comprises the following steps. First, the semiconductor device, which comprises a gate, a gate dielectric layer, an active layer, a source and a drain, is manufactured. However, the semiconductor device has a plurality of defects, and the active layer is a metal oxide thin film. After annealing the semiconductor device, it will be transferred into a chamber. A final step of injecting a supercritical fluid carried with a co-solvent into the chamber is then performed to modify the abovementioned defects.Type: GrantFiled: May 30, 2013Date of Patent: March 10, 2015Assignee: National Chiao Tung UniversityInventors: Po-Tsun Liu, Wei-Ya Wang, Li-Feng Teng
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Publication number: 20150064931Abstract: Disclosed is a film formation method, including vaporizing a plurality of raw material monomers in respective corresponding vaporizers, supplying the plurality of raw material monomers into a film formation apparatus, causing vapor deposition polymerization of the plurality of raw material monomers in the film formation apparatus to form an organic film on a substrate, and removing an impurity contained in at least one raw material monomer among the plurality of raw material monomers before the vapor deposition polymerization.Type: ApplicationFiled: August 20, 2014Publication date: March 5, 2015Inventors: Yasunori KUMAGAI, Kohei TARUTANI, Takashi KAMEOKA, Tomoko YANAGITA, Ryohei MATSUI
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Patent number: 8969219Abstract: The present invention relates to a method for preparation of an ultraviolet (UV)-curable inorganic-organic hybrid resin containing about or less than 4% volatiles and less than 30% organic residues. The UV-curable inorganic-organic hybrid resin obtained according to this method can be UV-cured within a markedly very short time and enables, upon curing, the formation of a transparent shrink-and crack-free glass-like product having high optical quality, high thermal stability and good bonding properties. In view of these properties, this hybrid resin can be used in various applications such as electro-optic, microelectronic, stereolithography and biophotonic applications.Type: GrantFiled: December 3, 2009Date of Patent: March 3, 2015Assignee: Soreq Nuclear Research CenterInventor: Raz Gvishi
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Patent number: 8969143Abstract: A light-emitting device package including a lead frame formed of a metal and on which a light-emitting device chip is mounted; and a mold frame coupled to the lead frame by injection molding. The lead frame includes: a mounting portion on which the light-emitting device chip is mounted; and first and second connection portions that are disposed on two sides of the mounting portion in a first direction and connected to the light-emitting device chip by wire bonding, wherein the first connection portion is stepped with respect to the mounting portion, and a stepped amount is less than a material thickness of the lead frame.Type: GrantFiled: August 7, 2013Date of Patent: March 3, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Daniel Kim, Jae-sung You, Jong-kil Park
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Publication number: 20150056555Abstract: A system and method for depositing a photoresist and utilizing the photoresist are provided. In an embodiment a deposition chamber is utilized along with a first precursor material comprising carbon-carbon double bonds and a second precursor material comprising repeating units to deposit the photoresist onto a substrate. The first precursor material is turned into a plasma in a remote plasma chamber prior to being introduced into the deposition chamber. The resulting photoresist comprises a carbon backbone with carbon-carbon double bonds.Type: ApplicationFiled: August 22, 2013Publication date: February 26, 2015Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Keng-Chu Lin, Joung-Wei Liou, Cheng-Han Wu, Ya Hui Chang
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Publication number: 20150054142Abstract: Hydroxyl moieties are formed on a surface over a semiconductor substrate. The surfaces are silylized to replace the hydroxyl groups with silyl ether groups, the silyl ether groups being of the form: —OSiR1R2R3, where R1, R2, and R3 are each hydrocarbyl groups comprising at least one carbon atom. Silylation protects the wafers from forming defects through hydrolysis while the wafers are being transported or stored under ambient conditions.Type: ApplicationFiled: August 23, 2013Publication date: February 26, 2015Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsaio-Chen Wu, Fang Lin
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Patent number: 8962491Abstract: The method includes forming an array of first separation walls on an underlying layer. A block co-polymer (BCP) layer is formed to fill inside regions of the first separation walls and gaps between the first separation walls. The BCP layer is phase-separated to include first domains that provide second separation walls covering inner sidewalls and outer sidewalls of the first separation walls and second domains that are separated from each other by the first domains.Type: GrantFiled: December 23, 2013Date of Patent: February 24, 2015Assignee: SK Hynix Inc.Inventors: Keun Do Ban, Jung Gun Heo, Cheol Kyu Bok, Myoung Soo Kim
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Patent number: 8962487Abstract: The present invention relates to a process for fabricating microchannels on a substrate and to a substrate comprising these microchannels, the invention being especially applicable to the fabrication of microstructured substrates for microelectronic, microfluidic and/or micromechanical systems. The process includes a step (a) of producing at least one or at least two patterns 2 on the surface of a bottom layer 1 and a step (b) of depositing, on top of the bottom layer and the pattern or patterns, a layer 3 of polymer material obtained by polymerizing an organic or organometallic monomer that contains siloxane functional groups, for example tetramethyldisiloxane, in a plasma-enhanced, optionally remote plasma-enhanced, chemical vapor deposition reactor (PECVD or optionally RPECVD) reactor.Type: GrantFiled: February 24, 2010Date of Patent: February 24, 2015Assignee: Universite des Sciences et Technologies de LilleInventors: Abdennour Abbas, Didier Guillochon, Bertrand Bocquet, Philippe Supiot
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Patent number: 8962494Abstract: The present invention provides method of manufacturing dual gate oxide devices. The method comprises coating photoresist on the substrate which is deposited by an oxide thin film; removing some of the photoresist by exposure and development to divide the oxide thin film into a first area to be etched and a second area coated by the remained photoresist; coating RELACS material on the remained photoresist and heating to form a protective film based on the crosslinking reaction between the RELACS material and the high molecular compounds in the photoresist; performing UV radiation to strengthen and cure the protective film; removing the oxide thin film in the first area by etching and removing the remained photoresist; and depositing again an oxide firm to form an oxide layer of different thickness in the first area and the second area so as to form a dual gate oxide structure.Type: GrantFiled: September 30, 2013Date of Patent: February 24, 2015Assignee: Shanghai Huali Microelectronics CorporationInventors: Jun Huang, Zhibiao Mao, Ermin Chong
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Patent number: 8956981Abstract: A stabilizing solution for treating photoresist patterns and methods of preventing profile abnormalities, toppling and resist footing are disclosed. The stabilizing solution comprises a non-volatile component, such as non-volatile particles or polymers, which is applied after the photoresist material has been developed. By treating the photoresist with the solution containing a non-volatile component after developing but before drying, the non-volatile component fills the space between adjacent resist patterns and remains on the substrate during drying. The non-volatile component provides structural and mechanical support for the resist to prevent deformation or collapse by liquid surface tension forces.Type: GrantFiled: October 2, 2013Date of Patent: February 17, 2015Assignee: Micron Technology, Inc.Inventors: Jon Daley, Yoshiki Hishiro
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Patent number: 8956694Abstract: A pretreatment process, carried out prior to a developing process, spouts pure water, namely, a diffusion-assisting liquid for assisting the spread of a developer over the surface of a wafer, through a cleaning liquid spouting nozzle onto a central part of the wafer to form a puddle of pure water. The developer is spouted onto the central part of the wafer for prewetting while the wafer is rotated at a high rotating speed to spread the developer over the surface of the wafer. The developer dissolves the resist film partly and produces a solution. The rotation of the wafer is reversed, for example, within 7 s in which the solution is being produced to reduce the water-repellency of the wafer by spreading the solution over the entire surface of the wafer. Then, the developer is spouted onto the rotating wafer to spread the developer on the surface of the wafer.Type: GrantFiled: October 14, 2010Date of Patent: February 17, 2015Assignee: Tokyo Electron LimitedInventors: Hirofumi Takeguchi, Tomohiro Iseki, Yuichi Yoshida, Kousuke Yoshihara
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Patent number: 8951609Abstract: A nanotube-photoresist composite is fabricated by preparing a nanotube suspension using a nanotube structure-containing raw material, dispersing the nanotube suspension in a photoresist using ultra-sonication to produce a nanotube suspension-photoresist mix, spin-coating the nanotube suspension-photoresist mix on a substrate to form a nanotube suspension-photoresist composite layer, and removing one or more solvents in the nanotube suspension-photoresist composite layer by baking.Type: GrantFiled: April 25, 2011Date of Patent: February 10, 2015Assignee: STMicroelectronics Asia Pacific Pte LtdInventors: Shanzhong Wang, Mui Hoon Nai, Zhonglin Miao
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Patent number: 8951828Abstract: A method for making electronic devices based on derivatized ladder polymer poly(benzo-isimidazobenzophenanthroline) (BBL) including photovoltaic modules and simple thin film transistors in planar and mechanically flexible and stretchable constructs.Type: GrantFiled: November 2, 2012Date of Patent: February 10, 2015Assignee: The United States of America as Represented by the Secretary of the NavyInventors: William W. Lai, Alfred J. Baca
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Publication number: 20150037540Abstract: An aspect of one embodiment, there is provided a template employed in imprinting including a substrate having a main surface, a pattern including a concave portion and a convex portion on the main surface, and a liquid-repellent layer selectively provided on the convex portion, the liquid-repellent layer having liquid-repellency to resist having fluidity in the imprinting.Type: ApplicationFiled: February 18, 2014Publication date: February 5, 2015Inventors: Kei KOBAYASHI, Seiji MORITA
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Patent number: 8945972Abstract: The invention relates to a layered system for producing a solar cell on a metal substrate and to a method of producing the layered system.Type: GrantFiled: February 10, 2011Date of Patent: February 3, 2015Assignee: Tata Steel Nederland Technology BVInventors: Joost Willem Hendrik Van Krevel, Albertus Johannes Maria Wigchert, Ganesan Palaniswamy
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Patent number: 8946711Abstract: An organic light-emitting display device including: a substrate; a plurality of pixels each including a first electrode, a second electrode, and an organic emission layer interposed between the first electrode and the second electrode; and a black matrix-containing neutral density (ND) film formed in a direction in which light is emitted from the plurality of pixels.Type: GrantFiled: February 7, 2012Date of Patent: February 3, 2015Assignee: Samsung Display Co., Ltd.Inventor: Jang-Seok Ma
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Patent number: 8945961Abstract: In an organic light-emitting display device and a method of manufacturing the organic light-emitting display device, the method includes forming thin film transistors (TFTs) on a substrate; and forming organic light emitting diodes (OLEDs), each of the OLEDs including a first electrode having a portion exposed by a pixel defining layer (PDL) on the TFTs, an organic layer on the exposed portion of the first electrode and including an emission layer (EML) configured to emit light having a respective one of a plurality of colors, and a second electrode on the organic layer. The EML is formed in each of a sub-pixel region with one color and other sub-pixel regions with other colors that are formed by forming openings in the PDL. A solution supply unit for sub-pixel region that communicates with the sub-pixel region with one color is formed in the sub-pixel region with one color.Type: GrantFiled: August 14, 2012Date of Patent: February 3, 2015Assignee: Samsung Display Co., Ltd.Inventor: Sung-Hwan Cho
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Patent number: 8946094Abstract: A method of fabricating a graphene electronic device includes (a) forming a first electrode and a second electrode spaced apart from each other, on a substrate; (b) forming supporting patterns on the first electrode and the second electrode; (c) coating the supporting patterns with graphene-oxide-containing solution to form composite patterns; and (d) separating the supporting patterns from the composite patterns. The step of forming supporting patterns may expose end portions of the first and second electrodes and the substrate between the end portions and be accomplished by providing a mask on the first and second electrodes; and electrospinning a polymer solution on the first and second electrodes with the mask. The supporting patterns may be composed of polymer fibers.Type: GrantFiled: April 22, 2013Date of Patent: February 3, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: Yong Ju Yun, Kibong Song
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Patent number: 8945305Abstract: Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are disclosed. Such methods include treating a surface of a semiconductor structure periodically throughout the ALD process to regenerate a blocking material or to coat a blocking material that enables selective deposition of the material on a surface of a substrate. The surface treatment may reactivate a surface of the substrate toward the blocking material, may restore the blocking material after degradation occurs during the ALD process, and/or may coat the blocking material to prevent further degradation during the ALD process. For example, the surface treatment may be applied after performing one or more ALD cycles. Accordingly, the presently disclosed methods enable in situ restoration of blocking materials in ALD process that are generally incompatible with the blocking material and also enables selective deposition in recessed structures.Type: GrantFiled: August 31, 2010Date of Patent: February 3, 2015Assignee: Micron Technology, Inc.Inventor: Eugene P. Marsh
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Patent number: 8946093Abstract: In an imprint method of an embodiment, in the imprinting of an imprint shot including an outermost peripheral region of a substrate where resist is not desired to be entered at the time of imprinting, light curing the resist is applied to a light irradiation region with a predetermined width including a boundary between the outermost peripheral region and a pattern formation region more inside than the outermost peripheral region, whereby the resist which is to enter inside the outermost peripheral region is cured. Then, light curing the resist filled in a template pattern is applied onto a template.Type: GrantFiled: March 15, 2012Date of Patent: February 3, 2015Assignee: Kabushiki Kaisha ToshibaInventor: Shinji Mikami
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Publication number: 20150031217Abstract: The present invention relates to a method for producing encapsulated nanoparticles by dispersing said nanoparticles and an encapsulating medium in a common solvent to form a first solution system and treating said first solution system with a stimulus suitable to induce simultaneous aggregation of the nanoparticles and the encapsulating medium.Type: ApplicationFiled: October 13, 2014Publication date: January 29, 2015Inventors: Imad Naasani, James Gillies, Emma Hogarth, Xiaojuan Wang, Ombretta Masala
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Publication number: 20150031185Abstract: The method includes forming an array of first separation walls on an underlying layer. A block co-polymer (BCP) layer is formed to fill inside regions of the first separation walls and gaps between the first separation walls. The BCP layer is phase-separated to include first domains that provide second separation walls covering inner sidewalls and outer sidewalls of the first separation walls and second domains that are separated from each other by the first domains.Type: ApplicationFiled: December 23, 2013Publication date: January 29, 2015Applicant: SK HYNIX INC.Inventors: Keun Do BAN, Jung Gun HEO, Cheol Kyu BOK, Myoung Soo KIM
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Publication number: 20150029638Abstract: Polyimides derived from a primary aromatic diamine and aromatic dianhydride mono-mer moieties, wherein one or more of said moieties contain at least one substituent on the aromatic ring selected from propyl and butyl, especially from isopropyl, isobutyl, tert.butyl, show good solubility and are well suitable as dielectric material in electronic devices such as capacitors and organic field effect transistors.Type: ApplicationFiled: March 27, 2013Publication date: January 29, 2015Applicant: BASF SEInventors: Hans Juerg Kirner, Stephanie Leuenberger, Emmanuel Martin
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Patent number: 8940365Abstract: A device to form a coating film which can quickly coat a substrate of a follow-up lot after coating a preceding lot. The device is configured such that nozzles for a preceding lot and a following lot are integrated into a common movement mechanism and moved between an upper side of a liquid processing unit and a standby area. A coating method includes sucking air into the nozzle for the preceding lot to form an upper gas layer, sucking a solvent for the preceding lot in the standby area to form a thinner layer, and sucking air into the nozzle for the preceding lot to form a lower gas layer within the nozzle, and thus forming a state that a solvent layer is interposed between the upper gas layer and the lower gas layer.Type: GrantFiled: December 23, 2011Date of Patent: January 27, 2015Assignee: Tokyo Electron LimitedInventors: Akira Miyata, Yoshitaka Hara, Kouji Fujimura
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Patent number: 8937023Abstract: A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.Type: GrantFiled: February 1, 2012Date of Patent: January 20, 2015Assignee: Renesas Electronics CorporationInventors: Fuminori Ito, Yoshihiro Hayashi
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Patent number: 8937016Abstract: A method of producing a patterned inorganic thin film element includes providing a substrate having a patterned thin layer of polymeric inhibitor on the surface. The substrate and the patterned thin layer of polymeric inhibitor are exposed to a highly reactive oxygen process. An inorganic thin film layer is deposited on the substrate in areas without inhibitor using an atomic layer deposition process.Type: GrantFiled: June 21, 2013Date of Patent: January 20, 2015Assignee: Eastman Kodak CompanyInventors: Carolyn R. Ellinger, Shelby F. Nelson, Kurt D. Sieber
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Patent number: 8936832Abstract: A method for wet treatment of plate-like articles includes, a chuck for holding a single plate-like article having an upwardly facing surface for receiving liquid running off a plate-like article when being treated with liquid, wherein the chuck is outwardly bordered by a circumferential annular lip. The chuck has an outer diameter greater than the greatest diameter of the plate-like article to be treated, and a rotatable part with an upwardly facing ring-shaped surface for receiving liquid running off the circumferential lip of the chuck. The rotatable part is rotatable with respect to the chuck, the ring-shaped surface is coaxially arranged with respect to the circumferential annular lip, the inner diameter of the ring-shaped surface is smaller than the outer diameter of the chuck, and the distance d between the lip and the upwardly facing ring-shaped surface is in a range from 0.1 mm to 5 mm.Type: GrantFiled: December 21, 2011Date of Patent: January 20, 2015Assignee: Lam Research AGInventors: Michael Brugger, Alexander Schwarzfurtner