Abstract: A main object of the present invention is to provide a TFT substrate having excellent switching characteristics. The object is attained by providing a thin film transistor substrate comprising: a substrate, and a thin film transistor having an oxide semiconductor layer that is formed on the substrate and is formed from an oxide semiconductor, and a semiconductor layer-adjoining insulating layer formed to be in contact with the oxide semiconductor layer, wherein at least one semiconductor layer-adjoining insulating layer included in the thin film transistor is a photosensitive polyimide insulating layer formed by using a photosensitive polyimide resin composition.

Abstract: Single source precursors are subjected to carbon dioxide to form particles of material. The carbon dioxide may be in a supercritical state. Single source precursors also may be subjected to supercritical fluids other than supercritical carbon dioxide to form particles of material. The methods may be used to form nanoparticles. In some embodiments, the methods are used to form chalcopyrite materials. Devices such as, for example, semiconductor devices may be fabricated that include such particles. Methods of forming semiconductor devices include subjecting single source precursors to carbon dioxide to form particles of semiconductor material, and establishing electrical contact between the particles and an electrode.

Abstract: Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed from the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film.

Abstract: A dual damascene process for forming conductive interconnects on an integrated circuit die. The process includes providing a layer (16) of porous, ultra low-k (ULK) dielectric material in which a via opening (30) is subsequently formed. A thermally degradable polymeric (“porogen”) material (42) is applied to the side wall sidewalls of the opening (30) such that the porogen material penetrates deeply into the porous ULK dielectric material (thereby sealing the pores and increasing the density thereof). Once a conductive material (36) has been provided with the opening (30) and polished back by means of chemical mechanical polishing (CMP), the complete structure is subjected to a curing step to cause the porogen material (44) with the ULK dielectric layer (16) to decompose and evaporate, thereby restoring the porosity (and low-k value) of the dielectric layer (16). Attached are a marked-up copy of the originally filed specification and a clean substitute specification in accordance with 37 C.F.R. §§1.

Abstract: According to one embodiment, an ultraviolet-curing resin material for pattern transfer contains at least one of 2-methyl-2-adamantyl acrylate, 2-ethyl-2-adamantyl acrylate, and 1,3-adamantanedimethanol diacrylate, isobornyl acrylate, polyfunctional acrylate, and a polymerization initiator, or contains at least one of the acrylates described above, a polymerization initiator, and fluorine-based alcohol.

Abstract: There is provided a resist underlayer film having heat resistance that is used for a lithography process in the production of semiconductor devices, and a high refractive index film having transparency that is used for an electronic device. A polymer comprising a unit structure of Formula (1): wherein each of R1, R2, R3, and R5 may be a hydrogen atom, R4 may be phenyl group or naphthyl group. A resist underlayer film forming composition comprising the polymer, and a resist underlayer film formed from the composition. A high refractive index film forming composition comprising the polymer, and a high refractive index film formed from the composition.

Abstract: An evaporation donor substrate which enables only a desired evaporation material to be evaporated at the time of deposition by an evaporation method, and capable of reduction in manufacturing cost by increase in use efficiency of the evaporation material and deposition with high uniformity. An evaporation donor substrate capable of controlling laser light so that a desired position of an evaporation donor substrate is irradiated with the laser light in accordance with the wavelength of the emitted laser light at the time of evaporation. Specifically, an evaporation donor substrate in which a region which reflects laser light and a region which absorbs laser light at the time of irradiation with laser light having a wavelength of greater than or equal to 400 nm and less than or equal to 600 nm at the time of evaporation are formed.

Abstract: A cross-point cell nanoarray comprises a mechanical support substrate, first and second orders of uniformly spaced parallel electrodes separated by an electrically active organic film and orthogonally arranged to form an array of cross-point cells, individually addressable by biasing the respective opposite electrodes, by selecting them among those of the respective orders, over a planar area of the substrate. The active organic resin layer includes a block copolymer of a major component resin and of at least one different minor component resin, configured to promote formation of large-scale ordered nanostructures through phase segregation, due to block incompatibility and self-assembly properties of the blocks. Polymeric bocks of the ordered nanostructures configured to sequester conductive nanoparticles and/or conductive nanoparticle clusters originally dispersed in the component organic resins, subtracting them from the surrounding matrix copolymer.

Abstract: A process for making a dielectric material where a precursor polymer selected from poly(phenylene vinylene)polyacetylene, poly(p-phenylene), poly(thienylene vinylene), poly(1,4-naphthylene vinylene), and poly(p-pyridine vinylene) is energized said by exposure by radiation or increase in temperature to a level sufficient to eliminate said leaving groups contained within the precursor polymer, thereby transforming the dielectric material into a conductive polymer. The leaving group in the precursor polymer can be a chloride, a bromide, an iodide, a fluoride, an ester, an xanthate, a nitrile, an amine, a nitro group, a carbonate, a dithiocarbamate, a sulfonium group, an oxonium group, an iodonium group, a pyridinium group, an ammonium group, a borate group, a borane group, a sulphinyl group, or a sulfonyl group.

Abstract: In a method for producing a semiconductor device, two or more kinds of organic siloxane compound materials each having a cyclic SiO structure as a main skeleton and having different structures are mixed and thereafter vaporized. Alternatively, those two or more kinds of organic siloxane compound materials are mixed and vaporized simultaneously to produce a vaporized gas. Then, the vaporized gas is transported to a reaction furnace together with a carrier gas. Then, in the reaction furnace, a porous insulating layer is formed by the plasma CVD method or the plasma polymerization method using the vaporized gas.

Abstract: The present invention relates to electrically active devices (e.g., capacitors, transistors, diodes, floating gate memory cells, etc.) having dielectric, conductor, and/or semiconductor layers with smooth and/or dome-shaped profiles and methods of forming such devices by depositing or printing (e.g., inkjet printing) an ink composition that includes a semiconductor, metal, or dielectric precursor. The smooth and/or dome-shaped cross-sectional profile allows for smooth topological transitions without sharp steps, preventing feature discontinuities during deposition and allowing for more complete step coverage of subsequently deposited structures. The inventive profile allows for both the uniform growth of oxide layers by thermal oxidation, and substantially uniform etching rates of the structures. Such oxide layers may have a uniform thickness and provide substantially complete coverage of the underlying electrically active feature.

Abstract: A method for fabricating an interconnection structure includes the following steps. Firstly, a substrate having a first conductive layer thereon is provided. Next, an ultra low-k material layer is formed on the substrate. Next, a portion of the ultra low-k material layer is removed, so as to form an opening to expose the first conductive layer. Next, a dry-cleaning process is performed by using gas, so as to clean a surface of the first conductive layer exposed by the opening. The dry-cleaning process is performed at a temperature in a range from the room temperature to 100° C.

Abstract: The present invention provides polyimide polymer materials for passivating semiconductor wafers and methods for fabricating thereof. The present invention further provides a device that includes a semiconductor wafer and a passivating layer disposed on the surface of the wafer, wherein the passivating layer comprises such polyimide polymers.

Abstract: In a coating step, a substrate is rotated at a high speed, and in that state a resist solution is discharged from a first nozzle to a central portion of the substrate to apply the resist solution over the substrate. Subsequently, in a flattening step, the rotation of the substrate is decelerated and the substrate is rotated at a low speed to flatten the resist solution on the substrate. In this event, the discharge of the resist solution by the first nozzle in the coating step is performed until a middle of the flattening step, and when the discharge of the resist solution is finished in the flattening step, the first nozzle is moved to move a discharge position of the resist solution from the central portion of the substrate. According to the present invention, the resist solution can be applied uniformly within the substrate.

Abstract: In an imprint method according to embodiments, light that hardens a resist is irradiated to a light irradiation region near an alignment mark in order to prevent the resist from being filled in the alignment mark of a template, when the alignment process between the template and a substrate is performed. After the alignment process is completed, the resist is filled in the template pattern and the alignment mark, and then, light that hardens the resist is irradiated onto the template.

Abstract: A surface treating method for treating a surface of a substrate inside a process chamber includes the steps of generating an atmosphere containing no moisture in the process chamber, heating the substrate inside the atmosphere containing no moisture in the process chamber; and causing a reaction between the substrate and an adhesion accelerating agent by feeding the adhesion accelerating agent gas into the process chamber.

Abstract: A device having three evaporation sources and a unit for moving the respective evaporation sources in one chamber is used, whereby it becomes possible to increase efficiency of use of an evaporation material. Consequently, manufacturing cost can be reduced, and a uniform thickness can be obtained over an entire surface of a substrate even in the case in which a large area substrate is used.

Abstract: A film deposition method includes the steps of: coating a solution containing a polysilane compound on a substrate to form a coating film and then carrying out a first thermal treatment in an inert atmosphere, thereby forming the coating film into a silicon film; forming a coating film containing a polysilane compound on the silicon film and then carrying out a second thermal treatment in an inert atmosphere or a reducing atmosphere, thereby forming the coating film into a silicon oxide precursor film; and carrying out a third thermal treatment in an oxidizing atmosphere, thereby forming the silicon oxide precursor film into a silicon oxide film and simultaneously densifying the silicon film.

Abstract: Methods for selectively placing carbon nanotubes on a substrate surface by using functionalized carbon nanotubes having an organic compound that is covalently bonded to such carbon nanotubes. The organic compound comprises at least two functional groups, the first of which is capable of forming covalent bonds with carbon nanotubes, and the second of which is capable of selectively bonding metal oxides. Such functionalized carbon nanotubes are contacted with a substrate surface that has at least one portion containing a metal oxide. The second functional group of the organic compound selectively bonds to the metal oxide, so as to selectively place the functionalized carbon nanotubes on the at least one portion of the substrate surface that comprises the metal oxide.

Abstract: The invention relates to a method for functionalizing a conductive or semiconductor material (M) by covalent grafting of receptor molecules (R) to its surface, said method comprising the following steps: (i) applying, across the terminals of a source electrode and a drain electrode located on either side of the material (M), sufficient potential difference to thermally activate the material (M) with respect to the grafting reaction of the molecules (R); and (ii) placing the material (M) thus activated in contact with a liquid or gaseous medium containing receptor molecules (R), thereby obtaining a material (M) functionalized by covalently grafted receptor molecules (R).

Abstract: Disclosed are a transistor including a gate insulation layer and an organic passivation layer of a polymer thin film, and a fabrication method thereof. The transistor comprises a substrate, a gate electrode formed on the substrate, a gate insulation layer including a polymethacrylic acid thin film, formed on the gate electrode and the substrate, a channel layer formed on the gate insulation layer, source electrode and drain electrode formed on the channel layer so as to expose at least a part of the channel layer, and an organic passivation layer including a polymethacrylic acid thin film, formed on the source electrode, drain electrode and the partially exposed channel layer.

Abstract: A method for manufacturing a semiconductor device includes steps of: (a) forming a thin film containing a phenyl group and silicon on a substrate while obtaining a plasma by activating an organic silane gas containing a phenyl group and silicon and nitrogen as not original component but unavoidable impurity and exposing the substrate to the plasma, temperature of the substrate being set at 200° C. or lower; and (b) obtaining a low-permittivity film by supplying energy to the substrate to allow moisture to be released from the thin film. With this method for manufacturing the semiconductor device, it is possible to obtain a silicon-oxide based low-permittivity film containing an organic substance which is not significantly damaged by the release of the organic substance when subjected to a plasma treatment such as an etching treatment, an ashing treatment, and/or the like.

Abstract: A method of producing a copolymer solution for semiconductor lithography having a copolymer and a solvent for coating film formation, which copolymer contains at least one repeating unit selected from the group consisting of: a repeating unit (A) having a hydroxyl group; a repeating unit (B) having a structure in which a hydroxyl group is protected by a group which suppresses dissolution into an alkaline developer and which dissociates in the action of an acid; a repeating unit (C) having a lactone structure; and a repeating unit (D) having a cyclic ether structure, the difference in the copolymer concentration among a plurality of containers which were filled with copolymer solution from the same manufacturing lot is not more than a certain range, or the method includes a certain production step.

Abstract: A system and method for forming a mechanically strengthened low-k dielectric film on a substrate includes using either spin-on-dielectric (SOD) techniques, or chemical vapor deposition (CVD) techniques to form a low-k dielectric film on the substrate. An upper surface of the low-k dielectric film is then treated in order to increase the film's mechanical strength, or reduce its dielectric constant.

Abstract: A polymeric composition comprising a first polymer chosen from a poly(arylene ether) polymer including polymer repeat units of the following structure: —(O—Ar1—O—Ar2—O—)m—(—O—Ar3—O—Ar4—O)n- where Ar1, Ar2, Ar3, and Ar4 are identical or different aryl radicals, m is 0 to 1, n is 1 m; a polysulfone, a polyimide, a poly(etherketone), a polyurea, a polyurethane, and combinations thereof and a second polymer comprising a per(phenylethynyl) arene polymer derivative. Cured films containing the polymer can exhibit at least one of the following properties: Tg from 160° C. to 180° C., a dielectric constant below 2.7 with frequency independence, and a maximum moisture absorption of less than 0.17 wt %. Accordingly, the polymer is especially useful, for example, in interlayer dielectrics and in die-attach adhesives.

Abstract: A transfer flow is produced in accordance with a process recipe of a process to be carried out. In the transfer flow, a type of modules listed in accordance with a substrate transfer order is associated with a necessary staying time from when the substrate is transferred into a module by a substrate transfer unit to when the substrate is ready to be transferred back to the substrate transfer unit after the corresponding process is finished. A cycle limiting time is determined to be the longest necessary transfer cycle time among those obtained by dividing the necessary staying time by the number of the modules mounted in the coater/developer. The number of the modules to be used is determined to be a value obtained by dividing the necessary staying time by the cycle limiting time or a nearest integer to which the value is raised.

Abstract: An organic planarizing layer (OPL) is formed atop a semiconductor substrate which includes a plurality of gate lines thereon. Each gate line includes at least a high k gate dielectric and a metal gate. A patterned photoresist having at least one pattern formed therein is then positioned atop the OPL. The at least one pattern in the photoresist is perpendicular to each of the gate lines. The pattern is then transferred by etching into the OPL and portions of each of the underlying gate lines to provide a plurality of gate stacks each including at least a high k gate dielectric portion and a metal gate portion. The patterned photoresist and the remaining OPL layer are then removed utilizing a sequence of steps including first contacting with a first acid, second contacting with an aqueous cerium-containing solution, and third contacting with a second acid.

Abstract: An organic EL light-emitting material and an organic EL light-emitting element using the same are provided. Between an anode and a cathode, there are provided a hole transport layer, a light-emitting layer constituted of an organic EL light-emitting material including at least one kind of metal pyrazole complex constituted of a metal ion that is a monovalent cation of a d10 group element and a pyrazole ligand that has a predetermined substituent at the whole or a part of 3, 4 and 5 sites, and an electron transport layer, in this order from the anode side.

Abstract: The use of at least one diazonium salt bearing an initiator function, for forming an undercoat obtained by grafting a graft derived from the diazonium salt and bearing an initiator function at the surface of a conductive or semiconductive material on the undercoat, and for forming on the undercoat a polymeric layer obtained by polymerization, in particular free radical polymerization, in situ of at least one monomer, initiated from the initiator function.

Abstract: The actinic ray-sensitive or radiation-sensitive resin composition according to the present invention includes a resin (A) which contains at least one type of repeating unit which is represented by the general formula (PG1), at least one type of repeating unit which is selected from the repeating units which are represented by the general formula (PG2) and the general formula (PG3), and at least one type of repeating unit which includes a lactone structure, a compound (B) which is a compound which is represented by the general formula (B1) and where the molecular weight of an anion moiety is 200 or less, and a solvent (C).

Abstract: A method of fabricating an organic light emitting diode display device includes: sequentially forming a thin film transistor (TFT) array, a first electrode, a bank pattern, a spacer, and a first relevant layer on an acceptor substrate; sequentially forming a metal pattern and an organic light emission material layer on a doner substrate; aligning and attaching the acceptor substrate and the doner substrate, and forming the light emission layer by transferring the organic light emission material onto the acceptor substrate by applying power to the metal pattern; and sequentially forming the second relevant layer and the second electrode on the light emission layer-formed acceptor substrate.

Abstract: A liquid treatment apparatus treating a surface of a substrate held generally horizontally on a stage in a housing by supplying a treating liquid to said surface from a supply nozzle. The liquid treatment apparatus includes a cup body provided so as to surround the substrate held in the substrate holding part laterally, the cup body being mounted detachably to a base inside the housing from an upward direction thereof; a cup body holding part holding the cup body detachably; and an elevating mechanism moving the cup body holding part up and down between a first position at which the cup body is mounted upon the base body and a second position located above the first position.

Abstract: A method of layout of pattern includes the following processes. A graphic data of a first wiring in a first area of a semiconductor wafer is extracted. The first area is a semiconductor chip forming area. The first area is surrounded by a scribed area of the semiconductor wafer. The first area includes a second area. The second area is bounded with the scribed area. The second area has a second distance from a boundary between the semiconductor chip forming area and the scribed area to an boundary between the first area and the second area. A first dummy pattern in the first area is laid out. The first dummy pattern has at least a first distance from the first wiring. A second dummy pattern in the second area is laid out. The second dummy pattern has at least the first distance from the first wiring. The second dummy pattern has at least a third distance from the first dummy pattern.

Abstract: A semiconductor light-emitting element includes a first semiconductor layer having a first conduction type, a second semiconductor layer having a second conduction type, an active layer provided between the first and second semiconductor layers, a polarity inversion layer provided on the second semiconductor layer, and a third semiconductor layer having the second conduction type provided on the polarity inversion layer. Crystal orientations of the first through third semiconductor layers are inverted, with the polarity inversion layer serving as a boundary. The first and third semiconductor layers have uppermost surfaces made from polar faces having common constitutional elements. Hexagonal conical protrusions arising from a crystal structure are formed at outermost surfaces of the first and third semiconductor layers. The first through third semiconductor layers are made from a wurtzite-structure group III nitride semiconductor, and are layered along a C-axis direction of the crystal structure.

Abstract: This invention comprises methods of forming patterned photoresist layers over semiconductor substrates. In one implementation, a semiconductor substrate is provided. An antireflective coating is formed over the semiconductor substrate. The antireflective coating has an outer surface. The outer surface is treated with a basic fluid. A positive photoresist is applied onto the outer surface which has been treated with the basic treating fluid. The positive photoresist is patterned and developed effective to form a patterned photoresist layer having increased footing at a base region of said layer than would otherwise occur in the absence of said treating the outer surface. Other aspects and implementations are contemplated.

Abstract: Some embodiments include methods of forming patterns utilizing copolymer. A copolymer composition is formed across a substrate. The composition includes subunits A and B, and will be self-assembled to form core structures spaced center-to-center by a distance of L0. The core structures are contained within a repeating pattern of polygonal unit cells. Distances from the core structures to various locations of the unit cells are calculated to determine desired distributions of subunit lengths.

Abstract: The invention provides a material for forming a passivation film for a semiconductor substrate. The material includes a polymer compound having an anionic group or a cationic group.

Abstract: Methods of forming ruthenium or ruthenium dioxide are provided. The methods may include using ruthenium tetraoxide (RuO4) as a ruthenium precursor. In some embodiments for forming ruthenium, methods include forming a seed layer, and forming a ruthenium layer on the seed layer, using RuO4. In other embodiments, methods include performing atomic layer deposition cycles, which include using RuO4 and another ruthenium-containing co-precursor. In yet other embodiments, methods include adsorbing a reducing agent over a substrate, and supplying RuO4 to be reduced to ruthenium by the adsorbed reducing agent. In other embodiments for forming ruthenium dioxide, methods may include providing an initial seed layer formed of, for example, an organic compound, and supplying RuO4 over the seed layer.

Abstract: A method for forming a conductive post include: a) forming a liquid repellent portion having a thickness of 100 nm or less by disposing a liquid repellent material in a conductive post forming region on a conductive layer; b) forming an insulation layer having an opening in a region overlapping with the conductive post forming region by disposing a liquid including an insulation layer forming material on the conductive layer having the liquid repellent portion formed thereon and polymerizing the insulation layer forming material; c) disposing metal particulates in the opening; and d) heating the metal particulates at a fusing temperature of the metal particulates or higher so as to fusion bond the metal particulates to each other in order to form the conductive post, and to fusion bond the metal particulates and the conductive layer in order to couple the conductive post with the conductive layer.

Abstract: Methods are provided for designing a photolithographic mask and for fabricating a semiconductor IC using such a mask. In accordance with one embodiment a method for fabricating a semiconductor IC includes determining a design target for a region within the IC. An initial mask geometry is determined for the region having a mask opening and a mask bias relative to the design target. A sub-resolution edge ring having a predetermined, fixed spacing to an edge of the mask opening is inserted into the mask geometry and a lithographic mask is generated. A material layer is applied overlying a semiconductor substrate upon which the IC is to be fabricated and a layer of photoresist is applied overlying the material layer. The layer of photoresist is exposed through the lithographic mask and is developed. A process step is then performed on the material layer using the layer of photoresist as a mask.

Abstract: The present invention relates to compositions, which are useful for the generation of patterned or structured SiO2-layers or of SiO2-lines during the manufacturing process of semiconductor devices, and which are suitable for the application in inkjet operations. The present invention also relates to a modified process of manufacturing semiconductor devices taking advantage of these new compositions.

Abstract: The present invention includes: a first step of discharging a coating solution from a nozzle to a center portion of the substrate to apply the coating solution on a surface of the substrate while rotating the substrate; a second step of decelerating, after the first step, the rotation of the substrate and continuously rotating the substrate; and a third step of accelerating, after the second step, the rotation of the substrate to dry the coating solution on the substrate, wherein: the substrate is rotated at a fixed speed of a first speed immediately before the first step; and in the first step, the rotation of the substrate which is at the first speed before start of the first step is gradually accelerated after the start of the first step so as to make the speed continuously change, and the acceleration of the rotation of the substrate is gradually decreased so as to make the speed of the rotation of the substrate converge in a second speed higher than the first speed at end of the first step.

Abstract: A method of forming a trench isolation, comprising the steps of: applying a silicone resin composition comprising a silicone resin which is represented by the following rational formula (1) and is solid at 120° C.: (H2SiO)n(HSiO1.5)m(SiO2)k??(1) (wherein n, m and k are each a number, with the proviso that when n+m+k=1, n is 0 to 0.8, m is 0 to 1.0, and k is 0 to 0.2) and an organic solvent to a substrate having trenches in such a manner that the trenches of the substrate are filled with the silicone resin composition so as to form a coating film; and carrying out the step of bringing the coating film into contact with at least one selected from the group consisting of water, an alcohol and hydrogen peroxide and the step of subjecting the coating film to at least one treatment selected from the group consisting of a heat treatment and an optical treatment.

Abstract: In a method for the manufacture of an active matrix OLED display, at least two thin-film transistors and one storage capacitor are provided to drive each pixel, with a reduced number of photolithographic patterning steps.

Abstract: A method of producing a single-crystal thin film of an organic semiconductor compound, which contains the steps of: applying an organic solvent which has a dielectric constant of 4.5 or greater and in which an organic semiconductor compound is soluble, on a substrate, to form a liquid film of the organic solvent on the substrate; supplying the organic semiconductor compound into the liquid film of the organic solvent, to dissolve therein; and crystallizing the organic semiconductor compound in the organic solvent.

Abstract: There is provided a coating method which can efficiently apply a coating liquid, such as a liquid resist, to the entire surface of a wafer even when the coating liquid is supplied in a smaller amount than a conventional one, and can therefore reduce the consumption of the coating liquid. The coating method includes: a first step of rotating the substrate at a first rotating speed while supplying the coating liquid onto approximately the center of the rotating substrate; a second step of rotating the substrate at a second rotating speed which is lower than the first rotating speed; a third step of rotating the substrate at a third rotating speed which is higher than the second rotating speed; and a fourth step of rotating the substrate at a fourth rotating speed which is higher than the second rotating speed and lower than the third rotating speed.

Abstract: The invention provides a composition for sealing a semiconductor, the composition being able to form a thin resin layer, suppress the diffusion of a metal component to a porous interlayer dielectric layer, and exhibit superior adherence with respect to an interconnection material. The composition for sealing a semiconductor contains a resin having two or more cationic functional groups and a weight-average molecular weight of from 2,000 to 100,000; contains sodium and potassium each in an amount based on element content of not more than 10 ppb by weight; and has a volume average particle diameter, measured by a dynamic light scattering method, of not more than 10 nm.

Abstract: In an organic field effect transistor with an electrical conductor-insulator-semiconductor structure, the semiconductor layer is made of an organic compound, and the insulator layer is made of a polymer obtained through polymerization or copolymerization of 2-cyanoethyl acrylate and/or 2-cyanoethyl methacrylate.

Abstract: Disclosed herein are precursors and methods for their use in the manufacture of semiconductor, photovoltaic, TFT-LCD, or flat panel type devices.

Abstract: Methods and structures relating to the formation of mixed SAMs for preventing undesirable growth or nucleation on exposed surfaces inside a reactor are described. A mixed SAM can be formed on surfaces for which nucleation is not desired by introducing a first SAM precursor having molecules of a first length and a second SAM precursor having molecules of a second length shorter than the first. Examples of exposed surfaces for which a mixed SAM can be provided over include reactor surfaces and select surfaces of integrated circuit structures, such as insulator and dielectric layers.