Depositing Organic Material (e.g., Polymer, Etc.) Patents (Class 438/780)
  • Patent number: 8623741
    Abstract: In one exemplary embodiment, a method includes: providing a structure having a first layer overlying a substrate, where the first layer includes a dielectric material having a plurality of pores; applying a filling material to an exposed surface of the first layer; heating the structure to a first temperature to enable the filling material to homogeneously fill the plurality of pores; after filling the plurality of pores, performing at least one process on the structure; and after performing the at least one process, removing the filling material from the plurality of pores by heating the structure to a second temperature to decompose the filling material.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: January 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Sampath Purushothaman, Geraud Jean-Michel Dubois, Teddie P. Magbitang, Willi Volksen, Theo J. Frot
  • Publication number: 20140004714
    Abstract: Disclosed is a method for improving polyimide (PI) non-adherence to a substrate and a PI solution. The method includes the following steps: (1) providing a substrate and a PI solution, the PI solution comprising PI molecules and a solvent, the PI molecules having hydrophobic moieties; and (2) coating the PI solution on the substrate to form a PI film. The PI solution includes PI molecules and a solvent. The PI molecules have hydrophobic moieties. The solvent includes N-methyl-2-pyrrolidone, ?-butyrolactone, butyl carbonate, or a mixture thereof. The PI molecules of the PI solution contain hydrophobic moieties and in coating the PI solution to a substrate, the hydrophobic moieties link with organic compounds on the substrate thereby enhancing affinity of the PI solution with surface of the substrate, improving the issue of PI non-adherence, and the heightening quality of printing the substrate.
    Type: Application
    Filed: August 30, 2013
    Publication date: January 2, 2014
    Applicant: Shenzhen China Star Optoelectronics Technology Co., LTD.
    Inventors: MEINA ZHU, JIANJUN ZHAO, HSIANGYIN SHIH
  • Patent number: 8609552
    Abstract: Embodiments of the invention describe methods for forming fluorocarbon (CF) films for semiconductor devices. According to one embodiment, the method includes providing a substrate, depositing a CF film on the substrate, generating, in the absence of a plasma, a treatment gas containing a gaseous specie having a molecular dipole, and treating the CF film with the treatment gas containing the gaseous specie having the molecular dipole to reduce the number of dangling bonds in the CF film. According to some embodiments, the method further includes depositing a second CF film on the treated CF film. According to some embodiments, the CF films may be deposited using a microwave plasma source containing a radial line slot antenna (RLSA).
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: December 17, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Yoshiyuki Kikuchi
  • Patent number: 8603922
    Abstract: A method is described for manufacturing a semiconductor device that comprises the steps of providing on a substrate a layer of a conducting material in a pattern comprising isolated elements having a first set of edges. The method further includes providing, on the substrate, a series of wall structures for forming one or more cavities there between. The wall structures have a second set of edges cooperating with the first set of edges. The second set of edges is positioned outside the first set of edges by a pre-defined distance. The method furthermore includes depositing a liquid material in the cavities. A display and an electronic apparatus incorporating the above described features is also disclosed.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: December 10, 2013
    Assignee: Creator Technology B.V.
    Inventors: Christoph Wilhelm Sele, Nicolaas Aldegonda Jan Maria van Aerle, Eduard Jacobus Antonius Lassauw
  • Publication number: 20130320520
    Abstract: A method including forming a dielectric material including a surface porosity on a circuit substrate including a plurality of devices; chemically modifying a portion of the surface of the dielectric material with a first reactant; reacting the chemically modified portion of the surface with a molecule that, once reacted, will be thermally stable; and forming a film including the molecule. An apparatus including a circuit substrate including a plurality of devices; a plurality of interconnect lines disposed in a plurality of layers coupled to the plurality of devices; and a plurality of dielectric layers disposed between the plurality of interconnect lines, wherein at least one of the dielectric layers comprises a porous material surface relative to the plurality of devices and the surface comprises a pore obstructing material.
    Type: Application
    Filed: December 22, 2011
    Publication date: December 5, 2013
    Inventors: David J. Michalak, James M. Blakwell, Jeffery D. Bielefeld, James S. Clarke
  • Patent number: 8598465
    Abstract: A wafer-scale assembly circuit including a plurality of metal interconnect layers, where each metal layer includes patterned metal portions and where at least some of the patterned metal portions are RF signal lines. The circuit further includes at least one benzocyclobutene layer provided between two metal interconnect layers that includes at least one trench via formed around a perimeter of the benzocyclobutene layer at a circuit sealing ring, where the trench via provides a hermetic seal at the sealing ring. The benzocyclobutene layer also includes a plurality of stabilizing post vias formed through the benzocyclobutene layer adjacent to the trench via proximate to the sealing ring and extending around the perimeter of the benzocyclobutene layer, where the stabilizing vias operate to prevent the benzocyclobutene layer from shrinking in size.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: December 3, 2013
    Assignee: Northrop Grumman Systems Corporation
    Inventors: David M. Eaves, Xiang Zeng, Kelly J. Hennig, Patty Pei-Ling Chang-Chien
  • Patent number: 8598044
    Abstract: An intermediate film 222 in a three-layered resist film 225 is formed by the chemical vapor deposition process at a temperature not higher than 300° C., using Si(OR1)(OR2)(OR3)(OR4), where each of R1, R2, R3 and R4 independently represents a carbon-containing group or a hydrogen atom, excluding the case where all of R1 to R4 are hydrogen atoms.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: December 3, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tatsuya Usami, Sadayuki Ohnishi, Masayuki Hiroi, Akira Matsumoto
  • Patent number: 8592619
    Abstract: The invention relates to compounds comprising a cycloalkyne or heterocycloalkyne group and a redox group. Said compounds are of general formula (I) wherein Z is a cycloalkyne or heterocycloalkyne with at least 8 links, optionally substituted by a halogen atom or a linear or branched C1 to C5 alkyl, A is an organic structure having oxidation-reduction properties, and B is an organic link between the cycloalkyne or heterocycloalkyne cycle and the organic structure A. The invention is especially applicable to the field of molecular electronics.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: November 26, 2013
    Assignee: Commissariat a L'Energie Atomique et aux Enerigies Alternatives
    Inventors: Guillaume Delapierre, Regis Barattin, Aude Bernardin, Isabelle Texier-Nogues
  • Patent number: 8592990
    Abstract: A semiconductor device includes: a first porous layer that is formed over a substrate and includes a SiO2 skeleton; a second porous layer that is formed immediately above the first porous layer and includes a SiO2 skeleton; a via wiring that is provided in the first porous layer; and a trench wiring that is buried in the second porous layer. The first porous layer has a pore density x1 of 40% or below and the second porous layer has a pore density x2 of (x1+5) % or above.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: November 26, 2013
    Assignees: Renesas Electronics Corporation, ULVAC, Inc.
    Inventors: Shinichi Chikaki, Takahiro Nakayama
  • Patent number: 8592956
    Abstract: There is disclosed a resist underlayer film composition, wherein the composition contains a polymer obtained by condensation of, at least, one or more compounds represented by the following general formula (1-1) and/or general formula (1-2), and one or more kinds of compounds and/or equivalent bodies thereof represented by the following general formula (2). There can be provided an underlayer film composition, especially for a trilayer resist process, that can form an underlayer film having reduced reflectance, (namely, an underlayer film having optimum n-value and k-value), excellent filling-up properties, high pattern-antibending properties, and not causing line fall or wiggling after etching especially in a high aspect line that is thinner than 60 nm, and a patterning process using the same.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: November 26, 2013
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsutomu Ogihara, Daisuke Kori, Yusuke Biyajima, Takeru Watanabe, Toshihiko Fujii, Takeshi Kinsho
  • Publication number: 20130306970
    Abstract: The invention relates to a positive photosensitive resin composition without color off after etching. The invention also provides a method for manufacturing a thin-film transistor array substrate, a thin-film transistor array substrate and a liquid crystal display device.
    Type: Application
    Filed: May 9, 2013
    Publication date: November 21, 2013
    Applicant: CHI MEI CORPORATION
    Inventors: KAI-MIN CHEN, CHUN-AN SHIH
  • Patent number: 8580340
    Abstract: After a solvent is discharged onto a substrate in a period from a time point t0 to a time point t1, rotation of the substrate is started at a time point t2. A resist liquid is discharged onto a center portion of a target surface of the substrate at a time point t3. A rotation speed of the substrate starts to decrease at a time point t4, and attains a first speed after a certain period of time. The discharge of the resist liquid is stopped at a time point t5. The rotation of the substrate is accelerated in a period from a time point t6 to a time point t7, and the rotation speed of the substrate attains a second speed at the time point t7. The rotation of the substrate is decelerated in a period from the time point t7 to a time point t8, and the rotation speed of the substrate attains a third speed at the time point t8.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: November 12, 2013
    Assignee: Sokudo Co., Ltd.
    Inventors: Masanori Imamura, Akihiro Hisai, Hidetoshi Sagawa
  • Patent number: 8574674
    Abstract: A substrate is first rotated at a first rotation speed, and a resist solution is applied. Rotation of the substrate is decelerated to a second rotation speed lower than the first rotation speed so that the substrate is rotated at the low speed to smooth the resist solution on the substrate. Rotation of the substrate is then accelerated to a third rotation speed higher than the second rotation speed, and a solvent for the coating solution and/or a dry gas are/is supplied to the resist solution on the substrate. The solvent gas is supplied to a portion of the resist solution on the substrate thicker than a set thickness, and the dry gas is supplied to a portion of the coating solution on the substrate thinner than the set thickness. This thins the thicker portion of the resist solution and thickens the thinner portion to uniform the resist solution.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: November 5, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Takashi Tanaka
  • Patent number: 8575039
    Abstract: A surface treating method for treating a surface of a substrate inside a process chamber includes the steps of generating an atmosphere containing no moisture in the process chamber, heating the substrate inside the atmosphere containing no moisture in the process chamber; and causing a reaction between the substrate and an adhesion accelerating agent by feeding the adhesion accelerating agent gas into the process chamber.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: November 5, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Tatsuya Yamaguchi, Hiroyuki Hashimoto
  • Patent number: 8574952
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes the steps of: (1) coating a solution containing an organic semiconductor material on a water-repellent surface of a water-repellent stamp substrate; (2) drying the thus coated organic semiconductor material-containing solution on the water-repellent surface to crystallize the organic semiconductor material in contact with the water-repellent surface, thereby forming a semiconductor layer; (3) thermally treating the semiconductor layer formed on the stamp substrate; and (4) pressing the stamp substrate at a side, in which the thermally treated organic semiconductor layer is formed, against a surface of a substrate to be transferred so that the organic semiconductor layer is transferred to the surface of the substrate to be transferred.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: November 5, 2013
    Assignee: Sony Corporation
    Inventor: Akihiro Nomoto
  • Publication number: 20130280920
    Abstract: A self-replicating monolayer system employing polymerization of monomers or nanoparticle ensembles on a defined template provides synthesis of two-dimensional single molecule polymers. Systems of self-replicating monolayers are used as templates for growth of inorganic colloids. A preferred embodiment employs SAM-based replication, wherein an initial monolayer is patterned and used as a template for self-assembly of a second monolayer by molecular recognition. The second monolayer is polymerized in place and the monolayers are separated to form a replicate. Both may then function as templates for monolayer assemblies. A generic self-replicating monomer unit comprises a polymerizable moiety attached by methylene repeats to a recognition element and an ending unit that will not interfere with the chosen recognition chemistry. The recognition element is self-complementary, unless two replicating monomers with compatible cross-linking chemistry are employed.
    Type: Application
    Filed: June 17, 2013
    Publication date: October 24, 2013
    Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Joseph M. Jacobson, David W. Mosley
  • Publication number: 20130281583
    Abstract: The present invention relates to a method for improving polyimide (PI) non-adherence to a substrate and a PI solution. The method includes the following steps: (1) providing a substrate and a PI solution, the PI solution comprising PI molecules and a solvent, the PI molecules having hydrophobic moieties; and (2) coating the PI solution on the substrate to form a PI film. The PI solution includes PI molecules and a solvent. The PI molecules have hydrophobic moieties. The solvent include N-methyl-2-pyrrolidone, ?-butyrolactone, butyl carbonate, or a mixture thereof. The PI molecules of the PI solution contain hydrophobic moieties and in coating the PI solution to a substrate, the hydrophobic moieties link with organic compounds on the substrate thereby enhancing affinity of the PI solution with surface of the substrate, improving the issue of PI non-adherence, and the heightening quality of printing the substrate.
    Type: Application
    Filed: May 4, 2012
    Publication date: October 24, 2013
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO. LTD.
    Inventors: Meina Zhu, Jianjun Zhao, Hsiangyin Shih
  • Patent number: 8563443
    Abstract: A method of forming a dielectric film having at least Si—N, Si—C, or Si—B bonds on a semiconductor substrate by atomic layer deposition (ALD), includes: supplying a precursor in a pulse to adsorb the precursor on a surface of a substrate; supplying a reactant gas in a pulse over the surface without overlapping the supply of the precursor; reacting the precursor and the reactant gas on the surface; and repeating the above steps to form a dielectric film having at least Si—N, Si—C, or Si—B bonds on the substrate. The precursor has at least one Si—C or Si—N bond, at least one hydrocarbon, and at least two halogens attached to silicon in its molecule.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: October 22, 2013
    Assignee: ASM Japan K.K.
    Inventor: Atsuki Fukazawa
  • Patent number: 8551563
    Abstract: A coating method includes holding a substrate in a horizontal state on a substrate holding member; supplying a coating liquid onto a front side central portion of the substrate held on the substrate holding member; rotating the substrate holding member about a vertical axis to spread the coating liquid supplied on the front side central portion of the substrate toward a front side peripheral portion of the substrate by a centrifugal force; and damping a wobble of the substrate being rotated, by a wobble damping mechanism including a gas delivery port and a suction port both disposed to face a back side of the substrate, while delivering a gas from the delivery port and sucking the gas into the suction port.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: October 8, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Takahiro Kitano, Koichi Obata, Hiroichi Inada, Nobuhiro Ogata
  • Publication number: 20130249049
    Abstract: Embodiments of the invention provide dielectric films and low-k dielectric films and methods for making dielectric and low-k dielectric films. Dielectric films are made from carbosilane-containing precursors. In embodiments of the invention, dielectric film precursors comprise attached porogen molecules. In further embodiments, dielectric films have nanometer-dimensioned pores.
    Type: Application
    Filed: May 14, 2013
    Publication date: September 26, 2013
    Inventors: DAVID J. MICHALAK, JAMES M. BLACKWELL, JAMES S. CLARKE
  • Patent number: 8536069
    Abstract: The present disclosure provides a multilayered cap (i.e., migration barrier) that conforms to the substrate (i.e., interconnect structure) below. The multilayered cap, which can be located atop at least one interconnect level of an interconnect structure, includes, from bottom to top, a first layer comprising silicon nitride and a second layer comprising at least one of boron nitride and carbon boron nitride.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: September 17, 2013
    Assignees: International Business Machines Corporation, Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Stephan A. Cohen, Alfred Grill, Thomas J. Haigh, Jr., Son V. Nguyen, Li-Qun Xia
  • Patent number: 8536067
    Abstract: A memory element is formed by providing an organic compound between a pair of upper and lower electrodes. However, when the electrode is formed over a layer containing an organic compound, a temperature is limited because the layer containing the organic compound can be influenced depending on a temperature for forming the electrode. A forming method for the electrode is limited due to this limitation of a temperature. Therefore, there are problems that an expected electrode cannot be formed, and miniaturization of an element is inhibited. A semiconductor device includes a memory element and a switching element which are provided over a substrate having an insulating surface. The memory element includes first and second electrodes, and a layer containing an organic compound, which are provided on the same plane. A current flows from the first electrode to the second electrode. The first electrode is electrically connected to the switching element.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: September 17, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Takehisa Sato
  • Patent number: 8536068
    Abstract: Methods for forming photoresists sensitive to radiation on substrate are provided. Atomic layer deposition methods of forming films (e.g., silicon-containing films) photoresists are described. The process can be repeated multiple times to deposit a plurality of silicon photoresist layers. Process of depositing photoresist and forming patterns in photoresist are also disclosed which utilize carbon containing underlayers such as amorphous carbon layers.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: September 17, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Timothy W. Weidman, Timothy Michaelson, Paul Deaton
  • Patent number: 8535972
    Abstract: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: September 17, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Zachary M. Fresco, Chi-I Lang, Jinhong Tong, Anh Duong, Nitin Kumar, Anna Tsimelzon, Tony Chiang
  • Patent number: 8530269
    Abstract: A method of forming a polymer device including the steps (i) of depositing on a substrate a solution containing a polymer or oligomer and a crosslinking moiety, to form a layer, and, (ii) curing the layer formed in step (i) under conditions to form an insoluble crosslinked polymer, wherein the crosslinking moiety is present in step (i) in an amount in the range of from 0.05 mol % to 5 mol % based on the total number of moles or repeat units of the polymer or oligomer and the crosslinking moiety in the solution.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: September 10, 2013
    Assignee: Cambridge Enterprise Ltd
    Inventors: Lay-Lay Chua, Peter Kian-Hoon Ho, Richard H. Friend
  • Patent number: 8530357
    Abstract: A method of manufacturing a semiconductor device, which includes forming a resist layer on a substrate, performing an exposure and development process on the resist layer to form a resist pattern, performing a slimming process to slim the resist pattern, forming a mask material layer on side walls of the slimmed resist pattern, and removing the slimmed resist pattern. The slimming process further includes coating an extensive agent on the substrate, expanding the expansive agent, and removing the expanded expansive agent.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: September 10, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Fumiko Iwao
  • Patent number: 8530360
    Abstract: A device including a first body (101) with terminals (102) on a surface (101a), each terminal having a metallic connector (110), which is shaped as a column substantially perpendicular to the surface. Preferably, the connectors have an aspect ratio of height to diameter of 2 to 1 or greater, and a fine pitch center-to-center. The connector end (110a) remote from the terminal is covered by a film (130) of a sintered paste including a metallic matrix embedded in a first polymeric compound. Further a second body (103) having metallic pads (140) facing the respective terminals (102). Each connector film (130) is in contact with the respective pad (140), whereby the first body (101) is spaced from the second body (103) with the connector columns (110) as standoff. A second polymeric compound (150) is filling the space of the standoff.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: September 10, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: Abram M. Castro
  • Patent number: 8519381
    Abstract: An organic semiconductor device includes, between a pair of electrodes of a first metal electrode and a second electrode, at least, a light-emitting layer, a hole injection layer which removes holes from the first metal electrode, a hole transporting layer formed on the light-emitting layer on a side of the first metal electrode for transporting the holes removed by the hole injection layer to the light-emitting layer, and an electron transporting layer formed on the light-emitting layer on a side of the second electrode for removing electrons from the second electrode and transporting the electrons to the light-emitting layer, wherein the organic semiconductor device further includes a crystallinity controlling member which is a series of discontinuous clusters along the contact surface of the hole injection layer that is in contact with the first metal electrode, for controlling an orientation of crystalline molecules.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: August 27, 2013
    Assignee: Pioneer Corporation
    Inventor: Takahito Oyamada
  • Patent number: 8518835
    Abstract: Some embodiments include methods of forming patterns utilizing copolymer. A copolymer composition is formed across a substrate. The composition includes subunits A and B, and will be self-assembled to form core structures spaced center-to-center by a distance of L0. The core structures are contained within a repeating pattern of polygonal unit cells. Distances from the core structures to various locations of the unit cells are calculated to determine desired distributions of subunit lengths.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: August 27, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Scott E. Sills
  • Patent number: 8518836
    Abstract: One or more techniques or systems for forming a pattern during semiconductor fabrication are provided herein. In some embodiments, a photo resist (PR) region is patterned and a spacer region is formed above or surrounding at least a portion of the patterned PR region. Additionally, at least some of the spacer region and the patterned PR region are removed to form one or more spacers. Additionally, a block co-polymer (BCP) is filled between the spacers. In some embodiments, the BCP comprises a first polymer and a second polymer. In some embodiments, the second polymer is removed, thus forming a pattern comprising the first polymer and the spacers. In this manner, a method for forming a pattern during semiconductor fabrication is provided, such that a width of the spacer or the first polymer is controlled.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: August 27, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Cheng-Hsiung Tsai, Chung-Ju Lee, Yu-Sheng Chang, Tsung-Jung Tsai
  • Patent number: 8507897
    Abstract: An organic EL element includes a functional layer disposed between an anode and a cathode on a substrate and including laminated different organic thin films including a light-emitting layer, and a partition wall which defines the functional layer. Each of the organic thin films is formed by applying a liquid containing a functional layer-forming material on a film-forming region defined by the partition wall and then drying the liquid. The partition wall has at least one step portion provided in the side wall thereof in the thickness direction, and liquid repellency is imparted to the uppermost surface of the partition wall and the upper surface of the step portion. The surface of the side wall excluding the step portion has lyophilicity in comparison with the upper surface of the step portion.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: August 13, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Hirokazu Yanagihara
  • Patent number: 8501274
    Abstract: A substrate is rotated at a first rotation number (first step). The rotation of the substrate is decelerated to 1500 rpm that is a second rotation number and the substrate is rotated at the second rotation number for 0.5 seconds (second step). The rotation of the substrate is further decelerated to a third rotation number and the substrate is rotated at the third rotation number (third step). The rotation of the substrate is accelerated to a fourth rotation number and the substrate is rotated at the fourth rotation number (fourth step). A resist solution is continuously supplied to a center portion of the substrate from a middle of the first step to a middle of the third step.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: August 6, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Katsunori Ichino, Koji Takayanagi, Tomohiro Noda
  • Patent number: 8502401
    Abstract: A polymeric composition comprising a first polymer chosen from a poly(arylene ether) polymer including polymer repeat units of the following structure: —(O—Ar1—O—Ar2—O—)m—(—O—Ar3—O—Ar4—O)n- where Ar1, Ar2, Ar3, and Ar4 are identical or different aryl radicals, m is 0 to 1, n is 1 m; a polysulfone, a polyimide, a poly(etherketone), a polyurea, a polyurethane, and combinations thereof and a second polymer comprising a per(phenylethynyl) arene polymer derivative. Cured films containing the polymer can exhibit at least one of the following properties: Tg from 160° C. to 180° C., a dielectric constant below 2.7 with frequency independence, and a maximum moisture absorption of less than 0.17 wt %. Accordingly, the polymer is especially useful, for example, in interlayer dielectrics and in die-attach adhesives.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: August 6, 2013
    Assignee: Delsper LP
    Inventors: William Franklin Burgoyne, Jr., Mark David Conner, Andrew Francis Nordquist, William Steven Collins
  • Patent number: 8496991
    Abstract: The present invention supplies a solvent to a front surface of a substrate while rotating the substrate. The substrate is acceleratingly rotated to a first number of rotations, and a resist solution is supplied to a central portion of the substrate during the accelerating rotation and the rotation at a first number of rotations. The substrate is deceleratingly rotated to a second number of rotations, and after the number of rotations of the substrate reaches the second number of rotations, the resist solution is discharged to the substrate. The substrate is then acceleratingly rotated to a third number of rotations higher than the second number of rotations so that the substrate is rotated at the third number of rotations. According to the present invention, consumption of the resist solution can be suppressed and a high in-plane uniformity can be obtained for the film thickness of the resist film.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: July 30, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Kousuke Yoshihara, Tomohiro Iseki
  • Patent number: 8492880
    Abstract: The present disclosure provides a multilayered cap (i.e., migration barrier) that conforms to the substrate (i.e., interconnect structure) below. The multilayered cap, which can be located atop at least one interconnect level of an interconnect structure, includes, from bottom to top, a first layer comprising silicon nitride and a second layer comprising at least one of boron nitride and carbon boron nitride.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: July 23, 2013
    Assignees: International Business Machines Corporation, Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Stephan A. Cohen, Alfred Grill, Thomas J. Haigh, Jr., Son V. Nguyen, Li-Qun Xia
  • Patent number: 8492293
    Abstract: Methods for selectively placing carbon nanotubes on a substrate surface by using functionalized carbon nanotubes having an organic compound that is covalently bonded to such carbon nanotubes. The organic compound comprises at least two functional groups, the first of which is capable of forming covalent bonds with carbon nanotubes, and the second of which is capable of selectively bonding metal oxides. Such functionalized carbon nanotubes are contacted with a substrate surface that has at least one portion containing a metal oxide. The second functional group of the organic compound selectively bonds to the metal oxide, so as to selectively place the functionalized carbon nanotubes on the at least one portion of the substrate surface that comprises the metal oxide.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Hongsik Park, George S. Tulevski
  • Patent number: 8492192
    Abstract: A composition for forming a semiconducting device includes an organic semiconducting material, an agent capable of inhibiting and/or preventing dewetting, and an additional substance, wherein the additional substance is provided in an amount capable of preventing initial crystallization of the composition and reducing the melting point or glass transition temperature of the composition below the melting point or glass transition temperature of the organic semiconducting material. The additional substance may be naphthalene, phenylnaphthalene, anthrance, or diphenylanthrance.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: July 23, 2013
    Assignee: Creator Technology B.V.
    Inventors: Sepas Setayesh, Dagobert M. De Leeuw, Natalie Stutzmann-Stingelin
  • Patent number: 8486841
    Abstract: A corrosion resistant component of a plasma chamber includes a liquid crystalline polymer. In a preferred embodiment, the liquid crystalline polymer (LCP) is provided on an aluminum component having an anodized or non-anodized surface. The liquid crystalline polymer can also be provided on an alumina component. The liquid crystalline polymer can be deposited by a method such as plasma spraying. The liquid crystalline polymer may also be provided as a preformed sheet or other shape adapted to cover the exposed surfaces of the reaction chamber. Additionally, the reactor components may be made entirely from liquid crystalline polymer by machining the component from a solid block of liquid crystalline polymer or molding the component from the polymer. The liquid crystalline polymer may contain reinforcing fillers such as glass or mineral fillers.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: July 16, 2013
    Assignee: Lam Research Corporation
    Inventors: Robert J. O'Donnell, Christopher C. Chang, John E. Daugherty
  • Patent number: 8486737
    Abstract: A thin film deposition apparatus and a method of manufacturing an organic light-emitting display device by using the same, and more particularly, to a thin film deposition apparatus that can remove a deposition material deposited on a patterning slit sheet without performing an additional cleaning process, and a method of manufacturing an organic light-emitting display device by using the thin film deposition apparatus.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: July 16, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun-Mi Lee, Yong-Sup Choi, Hyun-Sook Park, Jong-Heon Kim, Jae-Kwang Ryu, Young-Mook Choi
  • Patent number: 8481435
    Abstract: The present invention relates to a process for preparing a functionalized Si/Ge-surface, wherein an unfunctionalised Si/Ge-surface is contacted in the presence of ultraviolet radiation with a C2-C50 alkene and/or a C2-C50 alkyne, the alkene and/or alkyne being optionally substituted and/or being optionally interrupted by one or more heteroatoms. The present invention further relates to articles or substrates comprising the functionalized Si/Ge-surface and the use of the functionalised Si/Ge-surface to prevent or to reduce adsorption of a biomolecule to an article or a substrate.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: July 9, 2013
    Assignee: Wageningen University
    Inventors: Catharina Gerarda Petronella Henrica Schroën, Michel Rosso, Johannes Teunis Zuilhof
  • Patent number: 8476741
    Abstract: According to one embodiment, a semiconductor device includes: a substrate; an organic insulating film provided on the substrate; an inorganic insulating film formed thinner than the organic insulating film on the organic insulating film; a hollow sealing structure that is formed on the inorganic insulating film, and seals a MEMS element in an inside while ensuring a space between the hollow sealing structure itself and the MEMS element; a through hole formed so as to penetrate the organic insulating film and the inorganic insulating film; and a conductive member that is filled into the through hole, and electrically connects the MEMS element and an electrode formed by being filled into the through hole.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: July 2, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Susumu Obata, Takahiro Sogou, Yusaku Asano, Takeshi Miyagi
  • Patent number: 8476743
    Abstract: A carbon-rich carbon boron nitride dielectric film having a dielectric constant of equal to, or less than 3.6 is provided that can be used as a component in various electronic devices. The carbon-rich carbon boron nitride dielectric film has a formula of CxByNz wherein x is 35 atomic percent or greater, y is from 6 atomic percent to 32 atomic percent and z is from 8 atomic percent to 33 atomic percent.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Son Van Nguyen, Alfred Grill, Thomas J. Haigh, Jr., Sanjay Mehta
  • Patent number: 8470720
    Abstract: A wall surface of a film forming container is heated to or above a vaporization temperature of a material monomer, which is used to form an organic film, by using an external heater formed along the wall surface of the film forming container, substrates are heated to a thermal polymerization reaction temperature by using an internal heater that is disposed apart from the external heater and near a substrate-supporting container in which the substrates are received, and the organic film is formed through thermal polymerization occurring on the substrates by supplying the material monomer into the film forming container.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: June 25, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Ken Nakao, Muneo Harada
  • Patent number: 8466072
    Abstract: A process for preparing an organic film on a selected zone at the surface of a photosensitive semiconductor substrate, including (i) bringing a liquid solution which includes at least one organic adhesion primer into contact with at least the selected zone; (ii) polarizing the surface of the substrate to an electric potential more cathodic than the reduction potential of the organic adhesion primer; and (iii) exposing the selected zone to light radiation, the energy of which is at least equal to that of the band gap of the photosensitive semiconductor substrate.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: June 18, 2013
    Assignee: Commissariat a l'Energie Atomique et Aux Energies Alternatives
    Inventors: Julienne Charlier, Serge Palacin
  • Patent number: 8460983
    Abstract: Doped semiconductor ink formulations, methods of making doped semiconductor ink formulations, methods of coating or printing thin films, methods of forming electronic devices and/or structures from the thin films, and methods for modifying and controlling the threshold voltage of a thin film transistor using the films are disclosed. A desired dopant may be added to an ink formulation comprising a Group IVA compound and a solvent, and then the ink may be printed on a substrate to form thin films and conductive structures/devices, such as thin film transistors. By adding a customized amount of the dopant to the ink prior to printing, the threshold voltage of a thin film transistor made from the doped semiconductor ink may be independently controlled upon activation of the dopant.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: June 11, 2013
    Assignee: Kovio, Inc.
    Inventors: Wenzhuo Guo, Fabio Zürcher, Arvind Kamath, Joerg Rockenberger
  • Patent number: 8461058
    Abstract: An organic layer deposition apparatus including an electrostatic chuck combined with a substrate so as to fixedly support the substrate. The organic layer deposition apparatus including a receiving surface that has a set curvature for receiving the substrate; a deposition source for discharging a deposition material toward the substrate; a deposition source nozzle unit disposed at a side of the deposition source and including a plurality of deposition source nozzles arranged in a first direction; and a patterning slit sheet disposed to face the deposition source nozzle unit, and having a plurality of patterning slits arranged in a second direction perpendicular to the first direction, wherein a cross section of the patterning slit sheet on a plane formed by lines extending in the second direction and a third direction is bent by a set degree, wherein the third direction is perpendicular to the first and second directions.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: June 11, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Valeriy Prushinskiy, Len Kaplan, Se-Ho Cheong, Won-Sik Hyun, Heung-Yeol Na, Kyong-Tae Park, Byoung-Seong Jeong, Yong-Sup Choi
  • Patent number: 8461044
    Abstract: A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case, capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, can be used to form the masking layer. The capping layer can be formed of an conductive material, a semiconductor material, or an insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: June 11, 2013
    Assignee: Intermolecular, Inc.
    Inventors: David E. Lazovsky, Sandra G. Malhotra, Thomas R. Boussie
  • Patent number: 8455366
    Abstract: An organic planarizing layer (OPL) is formed atop a semiconductor substrate which includes a plurality of gate lines thereon. Each gate line includes at least a high k gate dielectric and a metal gate. A patterned photoresist having at least one pattern formed therein is then positioned atop the OPL. The at least one pattern in the photoresist is perpendicular to each of the gate lines. The pattern is then transferred by etching into the OPL and portions of each of the underlying gate lines to provide a plurality of gate stacks each including at least a high k gate dielectric portion and a metal gate portion. The patterned photoresist and the remaining OPL layer are then removed utilizing a sequence of steps including first contacting with a first acid, second contacting with an aqueous cerium-containing solution, and third contacting with a second acid.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: June 4, 2013
    Assignee: International Business Machines Corporation
    Inventors: Nicholas C. M. Fuller, Pratik P. Joshi, Mahmoud Khojasteh, Rajiv M. Ranade, George G. Totir
  • Patent number: 8455373
    Abstract: The present invention provides ink-jet printing ink for organic semiconductors, and, more particularly, provides ink-jet printing ink for organic semiconductors, which can be used to form a uniform crystalline thin film. The ink-jet printing ink of the present invention includes a mixed solvent composed of a first solvent and a second solvent having a higher boiling point and lower surface tension than the first solvent, thus forming a uniform crystalline thin film in a volatilization process. Further, the present invention provides a circular organic thin film transistor having a high field-effect mobility of about 0.12 cm2V1S?1.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: June 4, 2013
    Assignee: Postech Academy-Industry Foundation
    Inventors: Kil Won Cho, Hwa Sung Lee, Ji Hwang Lee, Wi Hyoung Lee, Jung Ah Lim, Yeong Don Park
  • Patent number: 8450219
    Abstract: An Al2O3 thin film layer is fabricated. Atmospheric pressure chemical vapor deposition (APCVD) is processed in a normal atmospheric pressure and a low temperature. On a surface of a p-type or n-type silicon crystal wafer having a purity between 5N (99.999%) and 9N (99.9999999%), the Al2O3 thin film layer is deposited and fabricated. The deposition and fabrication are done to obtain chemical passivation and field effect passivation. In this way, the present invention can be applied in solar cells and other photoelectric devices with reduced leakage of surface currents and improved photoelectric conversion.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: May 28, 2013
    Assignee: Atomic Energy Council—Institute of Nuclear Research
    Inventor: Tsun-Neng Yang