Abstract: The present invention is directed to a method of forming process layers comprised of silicon oxynitride. In one embodiment, the method comprises positioning a wafer in a process chamber, introducing silane and nitrous oxide into the chamber at a flow rate ratio ranging from approximately 2.6-3.8 silane to nitrous oxide, and generating a plasma in the chamber using a high frequency to low frequency power setting ratio ranging from approximately 1.2-1.8.

Abstract: The present invention relates to semiconductor device and a fabricating methods thereof which enable to improve device characteristics such as threshold voltage and the like by preventing p type impurities doping a gate from penetrating into a channel region of a substrate through a SiO2 layer. The present invention also relates to preventing transconductance due to reciprocal reaction of traps from decreasing by re-oxidation, wherein a first and a second oxynitride layer are formed at a first interface between a SiO2 layer and a gate of p-doped polysilicon and a second interface between the SiO2 layer and a silicon substrate, respectively.

Abstract: An improved and new process for fabricating a planarized structure of copper or other conductive material embedded in low dielectric constant HSQ insulator has been developed. The planarizing method comprises the key step of forming a protective layer on the surface of a cured HSQ layer by treatment of the cured HSQ layer in either an NH3 plasma or a N2 plasma. The NH3 plasma or a N2 plasma treatment may be applied to the cured HSQ prior to or subsequent to etching holes in the cured HSQ. Following deposition of copper or other conductive material into holes etched in the HSQ layer, CMP is used to remove the copper or other conductive material from the surface of the cured and treated HSQ. The NH3 plasma or a N2 plasma treatment reduces the CMP removal rate of HSQ by a factor of 3 when using a CMP slurry designed to polish copper.

Abstract: Method for forming a gate oxide film in a semiconductor device, in which a gate oxide film is formed by a first and second processes of oxidizing and nitriding, wherein the first process uses gases having different nitrogen contents from the second process for improving device performances, including the steps of (1) providing a semiconductor substrate, (2) conducting a thermal process in a compound gas environment of oxygen and nitrogen having a nitrogen content below 5%, to form a first oxynitride film on the semiconductor substrate, and (3) conducting a thermal process in a compound gas environment of oxygen and nitrogen having a nitrogen content equal to or over 5%, to form a second oxynitride film.

Abstract: A method of passivating an integrated circuit (IC) is provided. An insulating layer is formed onto the IC. An adhesion layer is formed onto a surface of the insulating layer by treating the surface of the insulating layer with a gas and gas plasma. A first passivation layer is formed upon the adhesion layer, the first passivation layer and the gas and gas plasma including at least one common chemical element.

Abstract: A fabrication process of a flash memory device includes microwave excitation of high-density plasma in a mixed gas of Kr and an oxidizing gas or a nitriding gas. The resultant atomic state oxygen O* or hydrogen nitride radicals NH* are used for nitridation or oxidation of a polysilicon electrode surface. It is also disclosed the method of forming an oxide film and a nitride film on a polysilicon film according to such a plasma processing.

Abstract: A silicon containing wafer is heated in a rapid thermal processing (RTP) system in a nitrogen containing gas to a temperature an time where a thin oxide film on the wafer surface at least partially decomposes and a thin nitride or oxynitride film grows.

Abstract: An exemplary embodiment of the present invention discloses a method for forming a storage capacitor for a memory device, by the steps of: forming a bottom electrode of the storage capacitor over a BoroPhosphoSilicate Glass (BPSG) layer; forming a storage capacitor dielectric layer over the bottom electrode, the storage capacitor dielectric layer consisting of a nitride layer that is 50 Å or less in thickness; exposing the nitride dielectric layer to heat during a first stage rapid thermal oxidation step at a first temperature range that is equal to or greater than a reflow temperature required to reflow the BPSG layer; exposing the nitride dielectric layer to wet oxidation during a second stage rapid thermal oxidation step, the second stage rapid thermal oxidation step is performed at a second temperature ranging from 810° C. to 1040° C.

Abstract: The construction of a film on a wafer, which is placed in a processing chamber, may be carried out through the following steps. A layer of material is deposited on the wafer. Next, the layer of material is annealed. Once the annealing is completed, the material may be oxidized. Alternatively, the material may be exposed to a silicon gas once the annealing is completed. The deposition, annealing, and either oxidation or silicon gas exposure may all be carried out in the same chamber, without need for removing the wafer from the chamber until all three steps are completed. A semiconductor wafer processing chamber for carrying out such an in-situ construction may include a processing chamber, a showerhead, a wafer support and a rf signal means. The showerhead supplies gases into the processing chamber, while the wafer support supports a wafer in the processing chamber.

Abstract: Water for use in wet oxidation of semiconductor surfaces may be generated by reacting ultra pure hydrogen and ultra pure gaseous oxygen without a flame. Because no flame is used, contamination due to a flame impinging on components of a “torch” is not a problem. Flame-free generation of water is accomplished by reacting hydrogen and oxygen under conditions that do not result in ignition. This may be accomplished by provided a diluted hydrogen stream in which molecular hydrogen is mixed with a diluent such as a noble gas or nitrogen. This use of diluted hydrogen also reduces or eliminates the danger of explosion. This can simplify the apparatus design by eliminating the need for complicated interlocks, flame detectors, etc.

Abstract: A process is described for using a silicon layer as an implant and out-diffusion layer, for forming defect-free source/drain regions in a semiconductor substrate, and also for subsequent formation of silicon nitride spacers. A nitrogen-containing dopant barrier layer is first formed over a single crystal semiconductor substrate by nitridating either a previously formed gate oxide layer, or a silicon layer formed over the gate oxide layer, to form a barrier layer comprising either a silicon, oxygen, and nitrogen compound or a compound of silicon and nitrogen. The nitridating may be carried out using a nitrogen plasma followed by an anneal. A polysilicon gate electrode is then formed over this barrier layer, and the exposed portions of the barrier layer remaining are removed. An amorphous silicon layer of predetermined thickness is then formed over the substrate and polysilicon gate electrode.

Abstract: This invention is an oxynitride film forming method including: a reaction chamber heating step of heating a reaction chamber to a predetermined temperature, the reaction chamber containing an object to be processed; a gas heating step of heating a process gas to a temperature not lower than a reaction temperature at which an oxynitride film can be formed, the process gas consisting of dinitrogen oxide gas; and a film forming step of forming an oxynitride film on the object to be processed by supplying the heated process gas into the heated processing chamber. The temperature to which the reaction chamber is heated in the reaction chamber heating step is set at a temperature below a temperature at which the process gas undergoes a reaction.

Abstract: In one embodiment, the present invention relates to a method of forming a silicon oxynitride antireflection coating over a metal layer, involving the steps of providing a semiconductor substrate comprising the metal layer over at least part of the semiconductor substrate; depositing a silicon oxynitride layer over the metal layer having a thickness from about 100 Å to about 1500 Å; and forming an oxide layer having a thickness from about 5 Å to about 50 Å over the silicon oxynitride layer to provide the silicon oxynitride antireflection coating.

Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.

Abstract: The present invention is directed to a method of forming process layers comprised of silicon oxynitride. In one embodiment, the method comprises positioning a wafer in a process chamber, introducing silane and nitrous oxide into the chamber at a flow rate ratio ranging from approximately 2.6-3.8 silane to nitrous oxide, and generating a plasma in the chamber using a high frequency to low frequency power setting ratio ranging from approximately 1.2-1.8.

Abstract: In one aspect, the invention includes a semiconductor processing method comprising exposing silicon, nitrogen and oxygen in gaseous form to a high density plasma during deposition of a silicon, nitrogen and oxygen containing solid layer over a substrate.

Abstract: The present invention is an improved semiconductor device and an improved method of manufacturing a semiconductor device. The present invention deposits a layer of oxynitride where gate oxidation would normally take place. Alternatively, the method according to the present invention uses a plurality of layers of dielectric material where gate oxidation would normally take place including a layer of oxynitride having a nitrogen content. The layer of oxynitride is deposited under a predetermined pressure using a stream of gas, wherein insensitivity to defects on a surface of the substrate results from the oxynitride layer.

Abstract: Disclosed is a method of forming a capacitor for a semiconductor memory device according to the present invention. The method includes the steps of: forming a lower electrode on a semiconductor substrate; performing a surface-treatment process to prevent a natural oxide layer from generating on the surface of the lower electrode; forming a TaON layer on the upper part of the surface-treated lower electrode by a reaction of Ta chemical vapor, O2 gas and NH3 gas; crystallizing the TaON layer; and forming an upper electrode on the upper part of the TaON layer, wherein the TaON layer is formed in a low pressure chemical vapor deposition (LPCVD) chamber equipped with a shower head injecting Ta chemical vapor, O2 gas and NH3 gas on an upper part thereof and at a temperature of 300 to 600° C. with pressure of 0.

Abstract: An integrated circuit includes at least one porous silicon oxycarbide (SiOC) insulator, which provides good mechanical strength and a low dielectric constant (e.g., &egr;R<2) for minimizing parasitic capacitance. The insulator provides IC isolation, such as between circuit elements, between interconnection lines, between circuit elements and interconnection lines, or as a passivation layer overlying both circuit elements and interconnection lines. The low dielectric constant silicon oxycarbide isolation insulator of the present invention reduces the parasitic capacitance between circuit nodes. As a result, the silicon oxycarbide isolation insulator advantageously provides reduced noise and signal crosstalk between circuit nodes, reduced power consumption, faster circuit operation, and minimizes the risk of potential timing faults.

Abstract: A multi-component layer is deposited on a semiconductor substrate in a semiconductor process. The multi-component layer may be a dielectric layer formed from a gaseous titanium organometallic precursor, reactive silane-based gas and a gaseous oxidant. The multi-component layer may be deposited in a cold wall or hot wall chemical vapor deposition (CVD) reactor, and in the presence or absence of plasma. The multi-component layer may also be deposited using other processes, such as radiant energy or rapid thermal CVD.

Abstract: A microelectronic device such as a Metal-Oxide-Semiconductor (MOS) transistor is formed on a semiconductor substrate. A tungsten damascene interconnect for the device is formed using an etch stop layer of silicon nitride, silicon oxynitride or silicon oxime having a high silicon content of approximately 40% to 50% by weight. The etch stop layer has high etch selectivity relative to overlying insulator materials such as silicon dioxide, tetraethylorthosilicate (TEOS) glass and borophosphosilicate glass (BPSG). The etch stop layer also has a high index of refraction and is anti-reflective, thereby improving critical dimension control during photolithographic imaging.

Abstract: An oxynitride film on the surface of a silicon or silicon germanium substrate is described where film is substantially an oxide film at the film oxide interface, and the nitrogen content of the film increases with the distance away from the substrate. The film is made by a process of rapidly processing a clean silicon wafer in an atmosphere of a nitrogen containing gas containing a very small percentage of oxygen containing gas.

Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.

Abstract: The present invention comprises a method for preventing particle formation in a substrate overlying a DARC coating. The method comprising providing a semiconductor construct. A DARC coating is deposited on the construct with a plasma that comprises a silcon-based compound and N2O. The DARC coating is exposed to an atmosphere that effectively prevents a formation of defects in the substrate layer. The exposed DARC coating is overlayed with the substrate.

Abstract: A process for planarization of a silicon wafer is described together with apparatus for implementing it. The process planarizes by directing a high-energy, pulsed laser beam in a direction parallel to the wafer surface while the wafer is rotating. The height of the beam relative to the wafer is carefully controlled thereby enabling the removal of all material above the lower edge of the beam to be removed from the wafer through laser ablation. The method works equally well for removal of metal (as in planarization of damascene wiring) or dielectric (as in planarization of conventional wiring). Once all excess material has been removed (typically requiring about 60 seconds) additional operation of the process does no harm so neither end point detection nor precise control of process time are required.

Abstract: Reflection of incident optical radiation from a highly reflective metal layer (12), such as aluminum, copper or titanium, into a photoresist layer (16) is reduced by interposing a layer of silicon oxynitride (14) between the metal and photoresist layers. The silicon oxynitride layer (14) is pre-treated with an oxidizing plasma to deplete surface nitrogen and condition the silicon oxynitride layer (14) to be more compatible with deep ultraviolet photoresists. The silicon oxynitride layer (14) further serves as an etch stop in the formation of interconnect openings (40), such as vias, contacts and trenches. The interconnect opening (40) is filled with a second metallization layer to achieve multi-layer electrical interconnection.

Abstract: A semiconductor interconnect barrier material of boron silicon nitride is provided for use with copper interconnects. The material is manufactured by a process of combining silane and ammonia in a boron rich atmosphere during a chemical vapor deposition process.

Abstract: A thin film transistor including a gate, a source, and a drain is formed on a substrate. An insulating film containing H2O is formed on the thin film transistor. For example, spin-on glass (SOG) containing H2O may be used. H2O contained in the insulating film is diffused through the thin film transistor by performing thermal processing on the insulating film. Trapping centers in the polysilicon may therefore be reduced.

Abstract: A method and system for providing a semiconductor device is disclosed. The method and system include depositing an antireflective coating (ARC) layer having antireflective properties. The method and system also include depositing a capping layer on the ARC layer. The capping layer reduces a susceptibility of the ARC layer to removal while allowing the ARC layer to substantially retain the antireflective properties.

Abstract: A method of making a resist pattern is provided, which decreases or eliminates the fluctuation of deformation of original openings of a resist layer which is induced by the change of their density (i.e., the count of the original openings within a unit area) or by their location in the reflowing process. The method comprises the steps of (a) forming a resist layer on a target layer; (b) patterning the resist layer to form original openings and at least one slit in the resist layer; the slit surrounding the original openings and having a specific width; and (c) reflowing the resist layer patterned in the step (b) under heat to cause deformation in the original openings and the at least one slit, thereby contracting the original openings and eliminating the at least one slit; the original openings thus contracted serving as resultant openings for forming desired contact/via holes in the target layer; the resist layer having the resultant openings constituting a resist pattern.

Abstract: A method for improving oxide quality and reliability by using low pressure during oxidation and nitridation is described. The wafer is loaded into a chamber wherein a pressure of between about 80 and 300 torr is maintained during the forming of the dielectric layer. The silicon substrate of the wafer is oxidized, then nitrided. The substrate is annealed to complete formation of the dielectric layer.

Abstract: A method for fabricating and patterning semiconductor devices with a resolution down to 0.12 &mgr;m on a substrate structure. The method begins by providing a substrate structure comprising various layers of oxide and/or nitride formed over either monocrystalline silicon or polycrystalline silicon. A silicon oxynitride layer is formed on the substrate structure. Key characteristics of the oxynitride layer include: a refractive index of between about 1.85 and 2.35 at a wavelength of 248 nm, an extinction coefficient of between 0.45 and 0.75 at a wavelength of 248 nm, and a thickness of between about 130 Angstroms and 850 Angstroms. A photoresist layer is formed over the silicon oxynitride layer and exposed at a wavelength of between about 245 nm and 250 nm; whereby during exposure at a wavelength of between 245 nm 250 nm, the silicon oxynitride layer provides a phase-cancel effect.

Abstract: A method of a self-alignment process to enhance the yield of borderless contact is described. The method provides a two-step, selective etching process, using the difference in the etching selectivities of the inter-metal dielectric layer and the barrier layer. The barrier layer is used as an etching stop layer, and a portion of the inter-metal dielectric layer is removed to form a contact window. The barrier layer and the inter-metal dielectric layer on the bottom of the contact window are removed, and then a borderless contact according to the invention is complete.

Abstract: A method for forming a gate insulating film for a semiconductor device comprising forming an insulating film of silicon nitride or silicon oxynitride in the active regions of the semiconductor substrate; forming an amorphous TaON insulating film on the insulating film; and crystallizing the amorphous TaON insulating film. Using TaON as the primary gate insulating film provides a high dielectric constant (&egr;=20˜25), and thus produces a gate insulating film having properties superior to those possible with silicon dioxide gate films and thus more suitable for use in highly integrated semiconductor devices.

Abstract: A method for forming a semiconductor dielectric layer comprising the steps of providing a substrate having a plurality of semiconductor devices already formed thereon, and then forming a first dielectric layer over the substrate. Next, a silicon oxy-nitride layer is formed over the first dielectric layer, and finally a second dielectric layer is formed over the silicon oxy-nitride layer.

Abstract: A structure to enable damascene copper semiconductor fabrication is disclosed. There is a silicon nitride film for providing a diffusion barrier for Cu as well as an etch stop for the duel damascene process. Directly above the silicon nitride film is a silicon oxynitride film. The silicon oxynitride film is graded, to form a gradual change in composition of nitrogen and oxygen within the film. Directly above the silicon oxynitride film is silicon oxide. The silicon oxide serves as an insulator for metal lines. Preferably, the film stack of silicon nitride, silicon oxynitride and silicon oxide is all formed in sequence, within the same plasma-processing chamber, by modifying the composition of film-forming gases for forming each film.

Abstract: A method for forming an oxynitride gate dielectric in a semiconductor device and gate dielectric structure formed by the method are disclosed. In the method, an oxynitride layer is first formed on a silicon surface and then re-oxidized with a gas mixture containing oxygen and at least one halogenated species such that an oxynitride layer with a controlled nitrogen profile and a layer of substantially silicon dioxide formed underneath the oxynitride film is obtained. The oxynitride film layer can be formed by either contacting a surface of silicon with at least one gas that contains nitrogen and/or oxygen at a temperature of not less than 500° C. or by a chemical vapor deposition technique. The re-oxidation process may be carried out by a thermal process in an oxidizing halogenated atmosphere containing oxygen and a halogenated species such as HCl, CH2Cl2, C2H3Cl3, C2H2Cl2, CH3Cl and CHCl3.

Abstract: The present invention provides an anti-reflective Si-Rich Silicon oxynitride (SiON) etch barrier layer and two compatible oxide etch processes. The Si-Rich Silicon oxynitride (SiON) etch barrier layer can be used as a hard mask in a dual damascene structure and as a hard mask for over a polysilicon gate. The invention has the following key elements: 1) Si rich Silicon oxynitride (SiON) ARC layer, 2) Special Silicon oxide Etch process that has a high selectivity of Si-Rich SiON to silicon oxide or SiN; 3) Special Si Rich SiON spacer process for a self aligned contact (SAC). A dual damascene structure is formed by depositing a first dielectric layer. A novel anti-reflective Si-Rich Silicon oxynitride (SiON) etch barrier layer is deposited on top of the first dielectric layer. A first opening is etched in the first insulating layer. A second dielectric layer is deposited on the anti-reflective Si-Rich Silicon oxynitride (SiON) etch barrier layer.

Abstract: A process for growing an ultra-thin dielelctric layer for use as a MOSFET gate or a tunnel oxide for EEPROM's is described. A silicon oxynitride layer, with peaks in nitrogen concentration at the wafer-oxynitride interface and at the oxynitride surface and with low nitrogen concentration in the oxynitride bulk, is formed by a series of anneals in nitric oxide and nitrous oxide gas. This process provides precise thickness control, improved interface structure, low density electron traps, and impedes dopant impurity diffusion from/to the dielelctric and substrate. The process is easily integrated into existing manufacturing processes, and adds little increased costs.

Abstract: A new method of forming a plasma-enhanced silicon-rich oxynitride layer having improved uniformity across the wafer in terms of layer thickness, refractivity, and reflectivity by using argon as the inert carrier gas is described. A semiconductor substrate is provided which may include semiconductor device structures. An Argon-based silicon-rich oxynitride etch stop layer is deposited overlying the semiconductor substrate. An oxide layer is deposited overlying the Argon-based silicon-rich oxynitride etch stop layer. An opening is etched through the oxide layer stopping at the Argon-based silicon-rich oxynitride etch stop layer. Thereafter, the Argon-based silicon-rich oxynitride etch stop layer within the opening is removed. The opening is filled with a conducting layer. This Argon-based silicon-rich oxynitride layer has improved uniformity across the wafer in terms of layer thickness, refractivity, and reflectivity as compared with a helium-based silicon-rich oxynitride layer.

Abstract: The present invention relates to a method of forming a level silicon oxide layer on a semiconductor wafer. The semiconductor wafer comprises a substrate having a first region containing no silicon nitride on its surface and a second region which is higher than the first region and contains a silicon nitride layer on its surface. The method comprises performing a cleaning process on the semiconductor wafer with an alkaline solution to uniform the deposition rate over the surface of the first region; and performing a deposition process employing ozone as a reactive gas with a flow capacity of 80-200 g/L to form a silicon oxide layer above the first and second regions wherein the deposition rate of the silicon oxide layer on the first region is higher than that on the second region and the silicon oxide layer above the first region is leveled with that above the second region after a predetermined period of time.

Abstract: A process of plasma-enhanced chemical vapor deposition of silicon oxynitride from a gas mixture of nitrous oxide and a silicon-containing gas employs a dual-power source of plasma generation and sustenance, to produce optimum properties of the deposited layer, for the purposes of passivation of the semiconductor surface, minimization of trapped energetic electrons, and protection of the integrated circuit device from moisture and other potentially deleterious effects.

Abstract: A method of forming a metal interconnect within a fluorinated silica glass dielectric layer while preventing outgassing from the fluorinated silica glass dielectric layer comprising the following steps. A semiconductor structure having a semiconductor device structure formed therein is provided. A metal line is formed over the semiconductor structure. The metal line being electrically connected with the semiconductor device structure. An insulating layer is formed over the semiconductor structure, covering the metal line. A fluorinated silica glass dielectric layer is formed over the insulating layer. The fluorinated silica glass dielectric layer is planarized to form a planarized fluorinated silica glass dielectric layer. The planarized fluorinated silica glass dielectric layer and the insulating layer are patterned to form a via opening to the metal line, and exposing portions of the patterned fluorinated silica glass dielectric layer within the via opening.

Abstract: A method of stabilizing an anti-reflection coating (ARC) layer is disclosed. The method provides a substrate with a dielectric layer, a conductive layer, and the ARC layer formed thereon. The ARC layer is treated in an ultraviolet (UV) curing step prior to forming a photoresist layer over the ARC layer, so that the specificity of the ARC layer is stabilized to allow an accurate pattern is replicated in the photoresist layer. A photomask with the desired pattern is provided, while a photolithographic process is then performed to transfer the pattern onto the wafer.

Abstract: Photolithographic processing is enhanced by employing a composite comprising two bottom anti-reflective coatings, wherein the extinction coefficient (k) of the upper anti-reflective coating is less than that of the underlying anti-reflective coating. The use of a composite bottom anti-reflective coating comprising partially transparent upper anti-reflective coating substantially reduces reflective notching in the photoresist layer, particularly when employing i-line or deep UV irradiation to obtain sub 0.35 &mgr;m features.

Abstract: The present invention provides a “built-in” wave dampening, antireflective thin-film layer in a copper dual damascene film stack that reduces the standing wave intensity in the deep-UV photoresist. This is accomplished by depositing optically customized silicon/oxide/nitride films during dual damascene processing. In particular, one or more silicon nitride layers are replaced with a light absorbing silicon oxynitride film to provide built-in dampening layers. The silicon oxynitride stack can be densified by heat treatments to minimize electrical leakage concerns, if any. The invention eliminates the need for adding extra thin-film stacks during deep-UV photoprocessing.

Abstract: A method of forming a selected dielectric that includes the steps of contacting a suitable substrate having a silicon containing layer with a gas mixture containing atomic nitrogen, nitric oxide and their reactive constituents at a pressure and temperature sufficient for effective dielectric layer formation for the selected dielectric layer.

Abstract: A method of processing a high K gate dielectric includes growing a high quality silicon dioxide layer at the silicon interface followed by deposition of a metal layer, which is then diffused into the silicon dioxide. Preferred metals include zirconium and hafnium. A gate stack may be fabricated by adding a metal containing layer to an existing thermally grown SiO2 or a combination of SiO2, SiO3 and SiO4 (oxide-nitride or oxynitride) stacks.

Abstract: A method of depositing a dielectric film on a substrate in a process chamber of an inductively coupled plasma-enhanced chemical vapor deposition reactor. Gap filling between electrically conductive lines on a semiconductor substrate and depositing a cap layer are achieved. Films having significantly improved physical characteristics including reduced film stress are produced by heating the substrate holder on which the substrate is positioned in the process chamber.

Abstract: A method for forming a tantalum oxynitride film which is used as a high-permittivity dielectric film of a semiconductor device. In the method of the present invention, a tantalum-containing film is first formed on a semiconductor substrate, and then the tantalum-containing film is converted into a tantalum oxynitride film using a heat treatment or a plasma treatment in a reactive gas. According to the method of the present invention, the tantalum oxynitride film can be easily formed using process conditions established in prior art processes.