Abstract: A gate insulating film made of silicon oxynitride is disposed on the partial surface area of a semiconductor substrate. A gate electrode is disposed on the gate insulating film. Source and drain regions are disposed on both sides of the gate electrode. An existence ratio of subject nitrogen atoms to a total number of nitrogen atoms in the gate insulating film is 20% or smaller, wherein three bonds of each subject nitrogen atom are all coupled to silicon atoms and remaining three bonds of each of three silicon atoms connected to the subject nitrogen atom are all coupled to other nitrogen atoms.

Abstract: Part of a first oxide film formed by thermal oxidation is removed by etching. A second oxide film is formed in the part of substrate from which the first oxide film has been removed using heated nitric acid. The two oxide films are nitrided by a nitrogen plasma having a low energy so as to be first and second gate insulating films, i.e., oxynitride films, respectively.

Abstract: A via hole is first formed, and an embedded material is embedded in the via hole. A height of the embedded material is adjusted so that a surface thereof is between an upper surface of an SiOC film and that of an SiC film. After this, an SiN film, a TEOS film, and the SiOC film are etched by using a resist mask as a mask. However, etching of the SiOC film is stopped when a bottom of a trench formed in the SiOC film is lower than an upper surface of the embedded material and higher than that of the SiC film. Then, the resist mask and the embedded material are removed. The SiOC film is etched again by using the SiN film as a mask, and the SiN film and an exposed part of the SiC film are removed.

Abstract: A low dielectric constant hydrogenated silicon-oxycarbide (SiCO:H) film is prepared by bringing an organosilicon or organosilicate compound having at least one vinyl or ethynyl group, or a mixture of a saturated organosilicon or organosilicate compound and an unsaturated hydrocarbon into contact with a substrate in the presence of an O2-containing gas plasma.

Abstract: The present invention provides, in one embodiment, a method method of monitoring a process for forming a nitridated oxide gate dielectric. A nitrided oxide dielectric layer is formed on a test substrate (110). The nitrided oxide dielectric layer is exposed to an etch process (120). A change in a property of the nitrided oxide dielectric layer is measured as a function of the etch process (130). Other embodiments advantageously incorporate the method into methods for making semiconductor devices and integrated circuits.

Abstract: A method is described for forming a low-k dielectric film, in particular, a pre-metal dielectric (PMD) on a semiconductor wafer which has good gap-filling characteristics. The method uses a thermal sub-atmospheric CVD process that includes a carbon-containing organometallic precusor such as TMCTS or OMCTS, an ozone-containing gas, and a source of dopants for gettering alkali elements and for lowering the reflow temperature of the dielectric while attaining the desired low-k and gap-filling properties of the dielectric film. Phosphorous is a preferred dopant for gettering alkali elements such as sodium. Additional dopants for lowering the reflow temperature include, but are not limited to boron, germanium, arsenic, fluorine or combinations thereof.

Abstract: A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure.

Abstract: A method of forming an opening in a stack of insulator layers featuring an underlying etch stop layer comprised of a tri-layer insulator composite, has been developed. The tri-layer insulator composite comprised of a bottom silicon rich, silicon oxide layer and a top silicon nitride layer, is first formed on a conductive region of a semiconductor substrate. After deposition of overlying insulator layers a photoresist shape is used as a etch mask to allow the desired contact or via hole shape to be defined in the overlying insulator layers via a first phase of an anisotropic dry etch procedure, with the first phase of the dry etching procedure terminating at the top surface of the silicon nitride layer. An over etch procedure used to insure complete removal of overlying insulator layer from the surface of the tri-layer insulator composite, is next performed as a second phase of the anisotropic dry etch procedure.

Abstract: A method for manufacturing an integrated circuit structure includes providing a semiconductor substrate and forming at least one oxide-nitride-oxide dielectric layer above the semiconductor substrate. At least one implantation is formed into at least one area of the semiconductor substrate beneath the oxide-nitride-oxide dielectric layer subsequent to the formation of the oxide-nitride-oxide dielectric layer.

Abstract: A low k inter-level dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide-comprising inter-level dielectric layer including carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the dielectric layer, it is exposed to a plasma including oxygen effective to reduce the dielectric constant to below what it was prior to the exposing. A low k inter-level dielectric layer fabrication method includes providing a substrate having integrated circuitry at least patially formed thereon. In a chamber, an inter-level dielectric layer including carbon and having a dielectric constant no greater than 3.5 is plasma-enhanced chemical vapor deposited over the substrate at subatmospheric pressure.

Abstract: A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure.

Abstract: A composition and method of preparation, to provide silane compounds that are free of chlorine. The compounds are hexakis(monohydrocarbylamino)disilanes with general formula (I) ((R)HN)3—Si—Si—(NH(R))3??(I) wherein each R independently represents a C1 to C4 hydrocarbyl. These disilanes may be synthesized by reacting hexachlorodisilane in organic solvent with at least 6-fold moles of the monohydrocarbylamine RNH2 (wherein R is a C1 to C4 hydrocarbyl). Such compounds have excellent film-forming characteristics at low temperatures. These films, particularly in the case of silicon nitride and silicon oxynitride, also have excellent handling characteristics.

Abstract: A material containing, as a main component, an organic silicon compound represented by the following general formula: R1xSi(OR2)4-x (where R1 is a phenyl group or a vinyl group; R2 is an alkyl group; and x is an integer of 1 to 3) is caused to undergo plasma polymerization or react with an oxidizing agent to form an interlayer insulating film composed of a silicon oxide film containing an organic component. As the organic silicon compound where R1 is a phenyl group, there can be listed phenyltrimethoxysilane or diphenyldimethoxysilane. As the organic silicon compound where R1 is a vinyl group, there can be listed vinyltrimethoxysilane or divinyldimethoxysilane.

Abstract: A method for depositing a low dielectric constant film is provided by reacting a gas mixture including one or more linear, oxygen-free organosilicon compounds, one or more oxygen-free hydrocarbon compounds comprising one ring and one or two carbon-carbon double bonds in the ring, and one or more oxidizing gases. Optionally, the low dielectric constant film is post-treated after it is deposited. In one aspect, the post treatment is an electron beam treatment.

Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.

Abstract: A method of forming a sidewall spacer on a gate electrode of a metal oxide semiconductor device that includes striking a first plasma to form an oxide layer on a side of the gate electrode, where the first plasma is generated from a oxide gas that includes O3 and bis-(tertiarybutylamine)silane, and striking a second plasma to form a carbon-doped nitride layer on the oxide layer, where the second plasma may be generated from a nitride gas that includes NH3 and the bis-(tertiarybutylamine)silane. The first and second plasmas may be formed using plasma CVD and the bis-(tertiarybutylamine)silane flows uninterrupted between the striking of the first plasma and the striking of the second plasma.

Abstract: Pinholes in a silicon oxynitride film are reduced by PECVD deposition of a plurality of silicon oxynitride sub-layers in a PECVD apparatus containing multiple chambers. Embodiments include forming a layer of amorphous carbon over a conductive layer, such as doped polycrystalline silicon, on a substrate, transferring the substrate to a multi-chamber PECVD tool and depositing 2 to 7, e.g., 5, sub-layers of dense silicon oxynitride at a total thickness of 300 to 700 ?.

Abstract: A method of forming a multi-layer stack over a low-k dielectric layer is disclosed, wherein the multi-layer stack provides an improved anti-reflective effect and an enhanced protection of the underlying low-k dielectric material during the chemical mechanical polishing process. The multi-layer stack includes silicon dioxide based sub-layers, which may be formed in a highly efficient, non-expensive plasma enhanced deposition method, wherein the optical characteristics may be adjusted by varying a ratio of silane and nitrogen oxide during the deposition.

Abstract: The present invention relates to a method of fabricating a flash memory device. According to the present invention, an oxide film is deposited and etched to form trenches, the trenches are filled with a metal film, and the metal film undergoes CMP to form bit lines. In this case, an etch stop layer of the trench etch process, a CMP stop layer of a CMP process and a wet barrier on the sides of the trenches are formed using a thermally treated SiON film having an etch rate lower than that of a wet chemical. As such, since a thickness and width of bit lines can be made uniform, bit line resistance and capacitance can be maintained constantly.

Abstract: The present invention is provided to a semiconductor device and a method of fabricating the same. A spacer consisting of SiCxHy or SiOCxHy having a low dielectric constant is formed at the sidewall of a trench or a hole that is formed in an interlayer insulating film. It is therefore possible to reduce the dielectric constant while reducing critical dimension loss of the trench or the hole. Therefore, the present invention has advantages that it can enhance the operating speed of the device by minimizing parasitic capacitance and prohibiting RC delay and crosstalk.

Abstract: A method of depositing a low dielectric constant film on a substrate and post-treating the low dielectric constant film is provided. The post-treatment includes rapidly heating the low dielectric constant film to a desired high temperature and then rapidly cooling the low dielectric constant film such that the low dielectric constant film is exposed to the desired high temperature for about five seconds or less. In one aspect, the post-treatment also includes exposing the low dielectric constant film to an electron beam treatment and/or UV radiation.

Abstract: A method of fabricating a semiconductor device which includes introducing, after a step of patterning a gate electrode, nitrogen atoms into an oxide film covering a device region on a semiconductor substrate, by exposing said oxide film to an atmosphere containing-nitrogen, such that said nitrogen atoms do not reach a region underneath said gate electrode, covering, after said step of introducing nitrogen atoms, said oxide film including said gate electrode by a CVD oxide film continuously without taking out said semiconductor substrate out of a processing chamber and forming a sidewall oxide film on a sidewall surface of said gate electrode by etching back said CVD oxide film.

Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.13 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of hydrogen and a phosphorus dopant precursor as process gasses in the reactive mixture of a plasma containing CVD reactor. The process gas also includes dielectric forming precursor molecules such as silicon and oxygen containing molecules.

Abstract: An embodiment of the instant invention is a method of forming a dielectric layer on a silicon-containing structure, the method comprising the steps of: providing a nitrogen-containing gas; heating the silicon-containing structure to an elevated temperature which is greater than 700 C; and striking a plasma above the silicon-containing structure, wherein combination of the nitrogen-containing gas, the elevated temperature, and the plasma resulting in the thermal nitridation of a portion of the silicon-containing structure. Preferably, the elevated temperature is greater than 900 C (more preferably the elevated temperature is greater than 1000 C). The silicon-containing structure is, preferably, a silicon substrate or a bottom electrode of a storage capacitor of a memory device.

Abstract: A process technology effectuates production of low defect homogeneous oxynitride, which can be applied in tunneling dielectrics with high dielectric constants and low barrier heights for flash memory devices, and as gate oxide for ultra-thin logic devices. The process technology involves varying the oxygen content in a the homogeneous oxynitride film comprising a part of the flash memory device, which effectively increases the dielectric constant of the oxynitride film and lowers its barrier height. In one such process, a controlled co-flow of N2O is introduced into a CVD deposition process. This process effectuates production of a oxynitride film with uniform distributions of nitrogen and oxygen throughout.

Abstract: The present invention relates to a process for vapor depositing alow dielectric insulating film, and more particularly to a process for vapor deposition of low dielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device.

Abstract: A method of silanizing the surface of a low-k interlayer dielectric oxides (carbon doped oxides or organo-silicate glasses) to improve surface adhesion to adjacent thin film layers in damascene integration of microelectronic devices. A low-k interlayer dielectric oxide may be exposed to the vapor of a silane-coupling agent in order to modify its surface energy to improve adhesion with adjacent thin film layers. A low-k interlayer dielectric oxide can also be silanized by dipping the low-k interlayer dielectric oxide in a solution of silane-coupling agent. The silane-coupling agent will cause covalent bonds between the low-k interlayer dielectric oxide and the adjacent thin film thereby improving adhesion.

Abstract: A method of forming oxide-nitride-oxide (ONO) dielectric of a SONOS-type nonvolatile storage device is disclosed. According to a first embodiment, a method may include the steps of forming a tunneling dielectric (step 102), forming a charge storing dielectric (step 104), and forming a top insulating layer (step 106) all in the same wafer processing tool. According to various aspects of the embodiments, all layers of an ONO dielectric of a SONOS-type device may be formed in the same general temperature range. Further, a tunneling dielectric may include a tunnel oxide formed with a long, low pressure oxidation, and a top insulating layer may include silicon dioxide formed with a preheated source gas.

Abstract: A high k dielectric film and methods for forming the same are disclosed. The high k material includes two peaks of impurity concentration, particularly nitrogen, such as at a lower interface and upper interface, making the layer particularly suitable for transistor gate dielectric applications. The methods of formation include low temperature processes, particularly CVD using a remote plasma generator and atomic layer deposition using selective incorporation of nitrogen in the cyclic process. Advantageously, nitrogen levels are tailored during the deposition process and temperatures are low enough to avoid interdiffusion and allow maintenance of the desired impurity profile.

Abstract: Process for fabricating a charge trapping dielectric flash memory device including steps of providing a semiconductor substrate; forming on the semiconductor substrate a bottom oxide layer; depositing on the bottom oxide layer a nitride layer, the deposited nitride layer having a first hydrogen content; and applying a treatment to reduce the first hydrogen content to a second hydrogen content.

Abstract: A capacitor and a capacitor dielectric material are fabricated by adjusting the amount of an ionic conductive species, such as hydrogen, contained in the capacitor dielectric material to obtain predetermined electrical or functional characteristics. Forming the capacitor dielectric material from silicon, nitrogen and hydrogen allows a stoichiometric ratio control of silicon to nitrogen to limit the amount of hydrogen. Forming the capacitor by dielectric material plasma enhanced chemical vapor deposition (PECVD) allows hydrogen bonds to be broken by ionic bombardment, so that stoichiometric control is achieved by controlling the power of the PECVD. Applying a predetermined number of thermal cycles of temperature elevation and temperature reduction also breaks the hydrogen bonds to control the amount of the hydrogen in the formed capacitor dielectric material.

Abstract: The instant invention is a method for forming a smooth interface between the upper surface of a silicon substrate and a dielectric layer. The invention comprises forming a thin amorphous region (180) on the upper surface (170) of a silicon substrate prior to forming the dielectric layer on the upper silicon surface.

Abstract: A manufacturing method for semiconductor devices that can improve uniformity in the surface of a silicon nitride film or a nitride film to be formed and improve production efficiency is provided. A step of forming a first film that is a silicon oxide film or a silicon oxynitride film on a silicon substrate, a step of forming a second film that is a tetrachlorosilane monomolecular layer, and a step of forming a third film that is a silicon nitride monomolecular layer by performing a nitriding process on the second film are included. A silicon nitride film having a predetermined film thickness is formed by repeating the step of forming the second film and the step of forming the third film for a predetermined number of times. In a manufacturing apparatus, a plurality of silicon substrates are arranged on a stair-like wafer boat, and a process gas is supplied toward the upper side of a reaction tube from a process gas supply pipe.

Abstract: A method of forming a titanium silicide nitride (TiSiN) layer on a substrate id described. The titanium silicide nitride (TiSiN) layer is formed by providing a substrate to a process chamber and treating the substrate with a silicon-containing gas. A titanium nitride layer is formed on the treated substrate and exposed to a silicon-containing gas. The titanium nitride (TiN) layer reacts with the silicon-containing gas to form the titanium silicide nitride (TiSiN) layer. The formation of the titanium silicide nitride (TiSiN) layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the titanium silicide nitride (TiSiN) layer may be used as a diffusion barrier for a tungsten (W) metallization process.

Abstract: The instant invention describes a method for forming a dielectric film with a uniform concentration of nitrogen. The films are formed by first incorporating nitrogen into a dielectric film using RPNO. The films are then annealed in N2O which redistributes the incorporated species to produce a uniform nitrogen concentration.

Abstract: A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.

Abstract: Methods for preparing a silicon oxynitride layer where the silicon oxynitride layer is deposited atop a substrate and have a low concentration of nitrogen at the interface of the silicon oxynitride layer and the substrate. The silicon oxynitride layer is formed by pulsing at least one interface precursor onto a substrate, where said substrate chemisorbs a portion of said at least one interface precursor to form a monolayer of said at least one interface precursor; and pulsing a nitrogen-containing precursor onto said substrate containing said monolayer of interface precursor, where said monolayer of said at least one interface precursor chemisorbs a portion of said nitrogen-containing precursor to form a monolayer of said nitrogen-containing precursor. The interface precursor includes oxygen-containing or silicon-containing precursor gasses.

Abstract: A method of forming an oxide layer on a semiconductor substrate includes thermally oxidizing a surface of the substrate to form an oxide layer on the substrate, and then exposing the oxide layer to an ambient including predominantly oxygen radicals to thereby thicken the oxide layer. Related methods of fabricating a recessed gate transistor are also discussed.

Abstract: Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.

Abstract: A method for forming a silicon carbide film on a semiconductor substrate by plasma CVD includes (a) introducing a raw material gas containing silicon, carbon, and hydrogen and an inert gas into a reaction chamber at a predetermined mixture ratio of the raw material gas to the inert gas; (b) applying radio-frequency power at the mixture ratio, thereby forming a curable silicon carbide film having a dielectric constant of about 4.0 or higher; and (c) continuously applying radio-frequency power at a mixture ratio which is reduced from that in step (b), thereby curing the silicon carbide film to give a dielectric constant lower than that of the curable silicon carbide film.

Abstract: A method for depositing a low dielectric constant film on a substrate. The method includes depositing a low dielectric constant film comprising silicon, carbon, oxygen and hydrogen on the substrate disposed in a chemical vapor deposition chamber, introducing a gas mixture comprising a hydrogen-containing gas to the chemical vapor deposition chamber, forming a plasma of the gas mixture proximate the low dielectric constant film using a radio frequency power, and applying a direct current bias to at least one of the substrate or a gas distribution plate to cure the low dielectric constant film.

Abstract: An anti-reflective coating is formed between a material layer which is to be patterned on a semiconductor structure using photolithography, and an overlying photoresist layer. The anti-reflective coating suppresses reflections from the material layer surface into the photoresist layer that could degrade the patterning. The anti-reflective coating includes an anti-reflective layer of silicon oxime, silicon oxynitride, or silicon nitride, and a barrier layer which is grown on the anti-reflective layer using a nitrous oxide plasma discharge to convert a surface portion of the anti-reflective layer into silicon dioxide. The barrier layer prevents interaction between the anti-reflective layer and the photoresist layer that could create footing. The anti-reflective layer is deposited on the material layer using Plasma Enhanced Chemical Vapor Deposition (PECVD) in a reactor. The barrier layer is grown on the anti-reflective layer in-situ in the same reactor, thereby maximizing throughput.

Abstract: A method for forming a gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then subjected to a plasma nitridation, the plasma nitridation resulting in final oxynitride layer having a final physical thickness.

Abstract: An ultra high-speed semiconductor device has a high-K dielectric gate insulator layer, wherein spread of impurities to a Si substrate from a gate electrode through the high-K dielectric gate insulator layer, and spread of oxygen and metallic elements from the high-K dielectric gate insulator layer to the Si substrate or the gate electrode are suppressed by arranging the high-K dielectric film sandwiched by nitrogen atomic layers on the Si substrate that is covered by an oxygen atomic layer.

Abstract: According to the present invention, a pixel TFT (an n-channel TFT) having a considerably low OFF current value and a high ratio of an ON current value to an OFF current value can be realized. In a pixel portion, an electrode having a taper portion with a width of 1 ?m or more is formed. An impurity region is formed by adding an impurity through the taper portion, so that the impurity region has a concentration gradient. Then, only the taper portion is removed to form the pixel TFT in the pixel portion. In the impurity region of the pixel TFT in the pixel portion, the concentration gradient is provided in a concentration distribution of the impurity imparting one conductivity, whereby a concentration is made small on the side of a channel forming region and a concentration is made large on the side of a semiconductor layer end portion.

Abstract: The invention includes methods of forming deuterated silicon nitride-containing materials from at least one deuterated nitrogen compound in combination with one or more silicon-containing compounds that do not contain hydrogen isotopes. Suitable deuterated nitrogen compounds can comprise, for example, NH2D, NHD2 and ND3. Suitable silicon-containing compounds include, for example, SiCl4 and Si2Cl6. Deuterated silicon nitride-containing materials of the present invention can be incorporated into, for example, transistor devices. The transistor devices can be utilized in DRAM cells, which in turn can be utilized in electronic systems.

Abstract: A method for fabricating a non-volatile memory is provided. A stacked structure including a tunneling layer, a trapping layer, a barrier layer, and a control gate is formed on a substrate. A source region and a drain region are formed beside the stacked structure in the substrate. A silicon oxide spacer is formed on the sidewalls of the stacked structure. An ultraviolet-resistant lining layer is formed on the surfaces of the substrate and the stacked structure to prevent the ultraviolet light from penetrating into the trapping layer. A dielectric layer is formed on the ultraviolet-resistant lining layer. A contact being electrically connected to the control gate is formed in the dielectric layer. A conducting line electrically connected to the contact is formed on the dielectric layer. A lost-surface-charge lining layer is formed on the surfaces of the dielectric layer and the conducting line to reduce the antenna effect.

Abstract: Specific embodiments of the invention provide a silicon-carbide-type or silicon oxycarbide (also often called carbon-doped-oxide [CDO] or organosilicate glass) capping material and method for depositing this capping material on ELK films which are used as a dielectric material in integrated circuits. The ELK film may include any ELK film including but not limited to inorganic, organic and hybrid dielectric materials and their respective porous versions. The silicon-carbide-type material may be an amorphous silicon carbide type material such as the commercially available BLOk™ material, or a carbon-doped oxide material such as the commercially available Black Diamond™ both of which are developed by Applied Materials of Santa Clara, Calif. The amorphous silicon carbide (a-SiC) material is deposited using a plasma process in a non-oxidizing environment and the CDO-type material is deposited using an oxygen-starved plasma process.

Abstract: The present invention disclosed a manufacturing method of shallow trench isolation (STI). By making use of depositing two layer of SiON with specific thickness and different extinction coefficient (k) as the ARC, comprising: (a) Depositing pad oxide/silicon nitride on a substrate as a hard mask for etching; (b) Depositing a layer of high extinction coefficient SiON on said silicon nitride, then depositing a layer of low extinction coefficient SiON as the ARC; (c) Exposing by using a STI mask and developing to form an etching mask of said STI; (d) Etching said SiON, silicon nitride, pad oxide and said substrate to form a shallow trench; (e) Growing an oxide layer on the side-wall and the bottom of said shallow trench to remove damage and decrease leakage; (f) Depositing an oxide layer on said shallow trench and said silicon nitride to fill said shallow trench; (g) planarizing by CMP.

Abstract: A method of determining a composition of an integrated circuit feature, including collecting intensity data representative of spectral wavelengths of radiant energy generated by a plasma during plasma nitridation of an integrated circuit feature disposed on a substrate, analysing the in intensity data to determine a peak intensity at one of the wavelengths, and determining a component concentration of the feature based on the peak intensity.