Abstract: A process for depositing a low dielectric constant layer (k<3) on a flat panel display and a flat panel display. The process includes reacting one or more organosilicon compounds with an oxygen containing compound at an RF power level from about 0.345 W/cm2 to about 1.265 W/cm2. The flat panel display includes a plasma display panel having a first substrate, a plurality of barriers deposited on the first substrate, a second substrate, a low dielectric constant layer (k<3) deposited on the second substrate, and a plurality of ground electrodes formed between the barriers and the dielectric layer.

Abstract: A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.

Abstract: A method for depositing a low k dielectric film comprising silicon, carbon, and nitrogen is provided. The low k dielectric film is formed by a gas mixture comprising a silicon source, a carbon source, and NR1R2R3, wherein R1, R2, and R3 are selected from the group consisting of alkyl and phenyl groups. The low k dielectric film may be used as a barrier layer, an etch stop, an anti-reflective coating, or a hard mask.

Abstract: A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon oxide film containing the metallic element including a first region near a lower surface thereof, a second region near an upper surface thereof, and a third region between the first and second regions, the metallic element contained in the silicon oxide film having a density distribution in a thickness direction of the silicon oxide film, a peak of the density distribution existing in the third region, and an electrode formed on the gate dielectrics.

Abstract: This invention relates to a chemical vapor deposition process for forming Zr or Hf oxynitride films suitable for use in electronic applications such as gate dielectrics. The process comprises: a. delivering a Zr or Hf containing precursor in gaseous form to a chemical vapor deposition chamber, and, b. simultaneously delivering an oxygen source and a nitrogen source to the chamber separately, such that mixing of these sources with the precursor does not take place prior to delivery to the chamber, and, c. contacting the resultant reaction mixture with a substrate in said chamber, said substrate heated to an elevated temperature to effect deposition of the Zr or Hf oxynitride film, respectively. A silicon containing precursor may be added simultaneously to the chamber for forming Zr or Hf silicon oxynitride films.

Abstract: Methods are provided for depositing a silicon carbide layer having significantly reduced current leakage. The silicon carbide layer may be a barrier layer or part of a barrier bilayer that also includes a barrier layer. Methods for depositing oxygen-doped silicon carbide barrier layers are also provided. The silicon carbide layer may be deposited by reacting a gas mixture comprising an organosilicon compound, an aliphatic hydrocarbon comprising a carbon-carbon double bond or a carbon-carbon triple bond, and optionally, helium in a plasma. Alternatively, the silicon carbide layer may be deposited by reacting a gas mixture comprising hydrogen or argon and an organosilicon compound in a plasma.

Abstract: The present invention forms a nitrided dielectric layer without substantial harm to a semiconductor layer on which the dielectric layer is formed. The invention employs a multi-stage process in which dielectric sub-layers are individually nitrided before formation of a next dielectric sub-layer. The net result is a nitrided multi-layered dielectric layer comprised of a plurality of dielectric sub-layers wherein the sub-layers have been individually deposited and incorporated with nitrogen.

Abstract: This invention relates to a chemical vapor deposition process for forming Zr or Hf oxynitride films suitable for use in electronic applications such as gate dielectrics.

Abstract: A method of forming an insulating film containing silicon oxy-nitride includes a loading step, temperature raising step, oxidation step, cycle purge step, and annealing step, in this order. The temperature raising step is performed while supplying nitrogen gas and oxygen gas for preventing a silicon layer surface from being nitrided, at a supply ratio 100:1 to 1000:1. The oxidation step is performed at a temperature of 700 to 950° C. while supplying a gas that contains 1 to 5 vol % of water vapor and 95 to 99 vol % of nitrogen gas, to form a silicon oxide film. The annealing step is performed at a temperature of 800 to 950° C. while supplying a gas that contains 10 to 100 vol % of nitrogen monoxide gas, to convert a portion of the silicon oxide film into silicon oxy-nitride.

Abstract: Embodiments of the present invention are directed to an improved method for forming dual oxide layers at the bottom of a trench of a substrate. A substrate has a trench which includes a bottom and a sidewall. The trench may be created by forming a mask oxide layer on the substrate; defining the mask oxide layer to form a patterned mask oxide layer and exposing a partial surface of the substrate to form a window; and using the patterned mask oxide layer as an etching mask to form the trench in the window. A first oxide layer is formed on the sidewall and the bottom of the trench of the substrate. A photoresist layer is formed on the substrate, filling the trench of the substrate. The method further comprises partially etching back the photoresist layer to leave a remaining photoresist layer in the trench. The height of the remaining photoresist layer is lower than the depth of the trench. A curing treatment of the remaining photoresist layer is performed after the partial etching.

Abstract: A method for improving high-&kgr; gate dielectric film (104) properties. The high-&kgr; film (104) is subjected to a two step anneal sequence. The first anneal is a high temperature anneal in a non-oxidizing ambient (106) such as N2 to densify the high-&kgr; film (104). The second anneal is a lower temperature anneal in an oxidizing ambient (108) to perform a mild oxidation that heals the high-&kgr; film and reduces interface defects.

Abstract: The present invention generally provides improved adhesion and oxidation resistance of carbon-containing layers without the need for an additional deposited layer. In one aspect, the invention treats an exposed surface of carbon-containing material, such as silicon carbide, with an inert gas plasma, such as a helium (He), argon (Ar), or other inert gas plasma, or an oxygen-containing plasma such as a nitrous oxide (N2O) plasma. Other carbon-containing materials can include organic polymeric materials, amorphous carbon, amorphous fluorocarbon, carbon containing oxides, and other carbon-containing materials. The plasma treatment is preferably performed in situ following the deposition of the layer to be treated. Preferably, the processing chamber in which in situ deposition and plasma treatment occurs is configured to deliver the same or similar precursors for the carbon-containing layer(s). However, the layer(s) can be deposited with different precursors.

Abstract: The effect of resist poisoning may be eliminated or at least substantially reduced in the formation of a low-k metallization layer, in that a nitrogen-containing barrier layer is provided with a surface modified by plasma treatment. Consequently, diffusion of nitrogen and nitrogen compounds in vias formed in the low-k dielectric layer is significantly suppressed, so that in a subsequent photolithography step interaction of nitrogen and nitrogen compounds with the photoresist is remarkably reduced.

Abstract: An in-situ ultra dilute ammonia nitridation process and apparatus of the following ultra-thin chemically tailored gate dielectrics: DCE/O2 (Trans 1,2-Dichloroethylene) based ultra-thin gate dielectric; Nitric Oxide (NO) based ultra-thin gate dielectric that has been re-oxidized via a DCE/O2 (Trans 1,2-Dichloroethylene) process; “dry-wet” DCE (Trans 1,2-Dichloroethylene)/O2-H2O/O2) based ultra-thin gate dielectric; and ultra dilute, less than 1E-7 moles NH3/mm2, nitridation of an ultra-thin gate dielectric. A vertical diffusion furnace (VDF) is provided to process the same. The ultra-thin chemically tailored gate dielectrics generated in a VDF with ultra-dilute NH3, below 1E-7 moles NH3/mm2, in-situ nitridation show a performance comparable or better to traditional ex-situ rapid thermal anneal (RTA) processing techniques for 90 nm CMOS technology.

Abstract: A method for forming shallow trench isolation (STI) for semiconductor devices. A first hard mask is deposited over a semiconductor wafer, and a second hard mask is deposited over the first hard mask. The semiconductor wafer includes a first etching zone and at least a second etching zone disposed beneath the first etching zone. The etch process for the first etching zone and the etch process for the at least one second etching zone are selected such that smooth sidewall surface structures are formed within the semiconductor device. The etch processes for each subsequent etching zone may alternate between non-selective and selective etch processes to preserve at least the first hard mask material.

Abstract: A method of nitriding a gate oxide layer by annealing a preformed oxide layer with nitric oxide (NO) gas is disclosed. The nitridation process can be carried out at lower temperatures and pressures than a conventional nitrous oxide anneal while still achieving acceptable levels of nitridation. The nitridation process can be conducted at atmospheric or sub-atmospheric pressures. As a result, the nitridation process can be used to form nitrided gate oxide layers in-situ in a CVD furnace. The nitrided gate oxide layer can optionally be reoxidized in a second oxidation step after the nitridation step. A gate electrode layer (e.g., boron doped polysilicon) can then be deposited on top of the nitrided gate oxide layer or on top of the reoxidized and nitrided gate oxide layer.

Abstract: A method is provided for processing a substrate including providing a processing gas comprising an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials.

Abstract: The method for fabricating a semiconductor device including a step of forming a gate insulation film on a semiconductor substrate 10, the method further comprises, before the step of forming the gate insulation film, the step of forming an insulation film 12, covering a first side (upper side) and a second side (underside) of the semiconductor substrate 10, the step of etching off the insulation film 12 on the first side of the semiconductor substrate 10, and the step of annealing the semiconductor substrate 10 with the insulation film 12 present on the second side of the semiconductor substrate 10.

Abstract: The invention concerns a method comprising evaporating silicon and/or SiOx, wherein said evaporating is further defined as occurring in the presenceof oxygen if silicon or SiOx with x less than two is being evaporated, to form a silicon oxide film at the surface of a substrate and in bombarding said silicon film, while it is being formed, with a beam of positive ions derived from both a polyfluorocarbon compound and a rare gas. The invention is useful for producing low-index antiglare films.

Abstract: A MOSFSET structure with high-k gate dielecttrics for silicon or metal gates with gate dielectric liquid-based oxidation surface treatments prior to gate material desposition and gate formation.

Abstract: One aspect of the invention relates to flash memory device that stores charge in a substantially stoichiometric silicon oxynitride dielectric. A stoichiometric silicon oxynitride dielectric can be represented by the formula (Si3N4)x(SiO2)(1-x), where x is from 0-1. A substantially stoichiometric silicon oxynitride dielectric has relatively few atoms that do not fit into the foregoing formula. The flash memory devices of the present invention have fewer defects and lower leakage than comparable SONOS-type flash memory devices. Another aspect of the invention relates to assessing the stoichiometry by FTIR, refractive index measurement, or a combination of the two.

Abstract: A process for producing a nitrided oxide layer on a silicon semiconductor substrate includes introducing a multiplicity of wafers into an atmospheric batch furnace, carrying out an oxidation step at a first predetermined temperature, carrying out a nitriding step at a second predetermined temperature, and carrying out a reoxidation step at a third predetermined temperature. The wafers are then cooled and removed from the atmospheric batch furnace.

Abstract: In one aspect, the invention includes a semiconductor processing method comprising exposing silicon, nitrogen and oxygen in gaseous form to a high density plasma during deposition of a silicon, nitrogen and oxygen containing solid layer over a substrate.

Abstract: A method of forming a dielectric film that includes nitrogen. The method includes incorporating nitrogen into a dielectric film using a plasma nitridation process to form a silicon oxynitride film. The silicon oxynitride film is annealed first in an inert or reducing ambient at a temperature ranging between about 700° C. and 1100° C. The silicon oxynitride film is annealed for the second time in an oxidizing ambient at a temperature ranging between about 900° C. and 1100° C.

Abstract: A metal wiring buried in an insulating layer is subjected to a reducing treatment prior to formation of a second insulating layer on the insulating layer under the condition that the total partial pressure of oxygen and water vapor is sufficiently low.

Abstract: This invention provides a capacitor and a method for manufacturing of the same, which are adaptable to preventing a lower electrode from being oxidized at a following thermal process. The capacitor includes: a lower electrode; an oxidation barrier layer formed on the lower electrode, wherein the oxidation barrier layer is formed of at least double nitridation layers; a dielectric layer formed on the oxidation barrier layer; and an upper electrode formed on the dielectric layer.

Abstract: A method of fabricating a gate dielectric layer. The method comprises: providing a substrate; forming a silicon dioxide layer on a top surface of the substrate; exposing the silicon dioxide layer to a plasma nitridation to convert the silicon dioxide layer into a silicon oxynitride layer; and performing a spiked rapid thermal anneal of the silicon oxynitride layer.

Abstract: A semiconductor device includes a gate insulating film formed on a semiconductor substrate, and a gate electrode formed on the gate insulating film. Nitrogen is introduced into the gate insulating film, and the nitrogen concentration distribution thereof has a peak near the surface of the gate insulating film or near the center of the gate insulating film in the thickness direction. The peak value of nitrogen concentration in the gate insulating film is equal to or greater than 10 atm % and less than or equal to 40 atm %.

Abstract: This invention relates to a method for making the gate dielectric layer, more particularly, to the method for making the interface between the gate dielectric layer and silicon substrate by using oxygen radicals and hydroxyl radicals. In the method, we send the wafers, which has passed through the cleaning process for the silicon substrate, to the chamber at first and then transmit the first reaction gas, which comprises the nitric monoxide and the oxygen or comprises the nitric monoxide and nitrogen, to the chamber to form a silicon nitride layer or a silicon oxynitride layer on the first surface of the silicon substrate to be a gate. Next, we transmit the second reaction gas, which comprises the oxygen and the hydrogen, to the chamber and make the second reaction gas to be dissociated into the oxygen radicals and the hydroxyl radicals.

Abstract: A thermal nitride film is formed as a gate insulating film on a silicon substrate, and after a gate electrode material is formed on the insulating film, it is patterned to form gate electrodes. After processing the electrodes, part of the gate insulating film other than a portion thereof which lies under the gate electrodes is removed. Further, an insulating film (a post oxidation film) is formed on side walls and upper surfaces of the stacked gate structures and the exposed main surface of the silicon substrate by use of thermal oxidation method.

Abstract: A series of conductive layers separated by interlayer gaps is formed adjacent a substrate layer, the conductive layer and interlayer gap dimensions defining aspect ratios for trenches between the conductive layers. A layer of dielectric material is deposited over the conductive layers using plasma enhanced chemical vapor deposition. Trenches having aspect ratios within specified geometric categories are incompletely filled, leaving interlayer voids which may have desirable dielectric properties.

Abstract: An improved insitu hard mask open strategy is performed before carrying out a metal etching process. The method for opening the hard mask made of SiO2, Si3N4 or SiON includes providing a substrate having thereon at least one metal layer, the hard mask layer, and a patterned photoresist layer overlying the hard mask layer. The hard mask layer is etched in a plasma etching process using an etchant source gas which is formed of a fluorine containing gas and oxygen. The plasma processing chamber used for etching the hard mask layer is the same as the plasma processing chamber in which the at least one metal layer is etched in another plasma etching process after the hard mask layer has been etched.

Abstract: In a method of forming a quantum dot having nanometeric size and a method of forming a gate electrode including the quantum dot, a first layer including a first material is deposited on the substrate. The first material has first atoms that are superbundant and bound with the weak bonding energy in the first layer. A second layer is deposited on the first layer. The second layer comprises a second material including second atoms that are capable of migrating into the first atoms. The first atoms are migrated into the second layer and the second atoms are migrated into the first layer, so that the second atoms are arranged in the first layer. Each of the second atoms in the first layer is formed into a quantum dot. An electrode layer is formed on the first layer after partially etching the second layer, and then a gate electrode is formed by patterning the electrode layer.

Abstract: A method of forming a multi-layer stack over a low-k dielectric layer is disclosed, wherein the multi-layer stack provides an improved anti-reflective effect and an enhanced protection of the underlying low-k dielectric material during the chemical mechanical polishing process. The multi-layer stack comprises silicon dioxide based sub-layers, which may be formed in a highly efficient, non-expensive plasma enhanced deposition method, wherein the optical characteristics may be adjusted by varying a ratio of silane and nitrogen oxide during the deposition.

Abstract: One aspect of the present invention relates to a system and method for improving memory retention in flash memory devices. Retention characteristics may be enhanced by nitridating the bottom silicon dioxide layer of the ONO dielectric. To further mitigate charge leakage within the memory cell, the charge retention layer, or silicon nitride layer of the ONO dielectric, may be passivated via a hydrogen anneal process in order to reduce the number of charge traps, and thus, the amount of charge loss. The present invention also provides a monitoring and feedback-relay system to automatically control ONO formation such that a desired ONO dielectric stack is obtained. The present invention may be accomplished in part by employing a measurement system to measure properties and characteristics of the ONO stack during the critical formation steps of the bottom silicon dioxide layer and a silicon nitride layer.

Abstract: Disclosed are a capacitor for semiconductor devices capable of increasing storage capacitance and preventing leakage current, and method of manufacturing the same. The capacitor for semiconductor memory devices according to the present invention includes: a lower electrode; a dielectric layer formed on the lower electrode; and an upper electrode formed on the upper portion of the dielectric layer, wherein the dielectric layer is a crystalline TaxOyNz layer, and the total of x, y, and z in the crystalline TaxOyNz layer is 1, and y is 0.3 to 0.5, and z is 0.1 to 0.3.

Abstract: A passivation layer is deposited onto the surface of a substrate followed by deposition of a polymer layer, through the application of a plasma enhanced chemical vapor deposition process, in which the substrate is placed on a chuck within a reaction chamber and fluorocarbon gas is introduced into the reaction chamber under the influence of at least one plasma source. The fluorocarbon gas can be a CFX gas. The at least one plasma source can include a first plasma source that ionizes the fluorocarbon gas by applying RF plasma energy, and a second plasma source that applies a near-zero self-bias to the substrate at an RF frequency during deposition of the passivation layer and a greater bias during deposition of the polymer layer. The passivation layer is deposited prior to the polymer layer to protect the surface of the substrate from damage during the deposition of the polymer layer.

Abstract: Heating a reaction chamber or other apparatus in the absence of product wafers to a “curing” temperature above a deposition temperature between the deposition of a film on a first set of semiconductor product wafers and the deposition of a film on a second set of semiconductor product wafers. In some embodiments, a boat with filler wafers is in the reaction chamber when the reaction chamber is heated to the curing temperature. In some examples, the films are deposited by a low pressure chemical vapor deposition (LPCVD) process. With some processes, if the deposition of a film on product wafers is at a temperature below a certain temperature, the film deposited with the product wafer on a boat, filler wafers, and/or other structures in the reaction chamber can cause contamination of product wafers subsequently deposited with a film in the presence of the boat and filler wafers.

Abstract: A method for modifying a surface of a substrate to be processed, by utilizing plasma includes the steps of adjusting a temperature of the substrate from 200° C. to 400° C., introducing gas including nitrogen atoms or mixture gas including inert gas and the gas including nitrogen atoms into a plasma process chamber, adjusting pressure in the plasma process chamber above 13.3 Pa, generating plasma in the plasma process chamber, and injecting ions equal to or smaller than 10 eV in the plasma into the substrate to be processed.

Abstract: A method for fabricating a substantially smooth-surfaced anti-reflective coating on a semiconductor device structure including generating a plasma from an inert gas in a process chamber in which the anti-reflective coating is to be deposited. The anti-reflective coating may include silicon, oxygen and nitrogen, and is preferably of the general formula SixOyNz, where x equals 0.40 to 0.65, y equals 0.02 to 0.56 and z equals 0.05 to 0.33. Preferably, x+y+z equals one. The method may also include fabricating a silicon nitride layer over the anti-reflective coating. A semiconductor device comprising a silicon nitride layer over the anti-reflective coating including at most about 1¼ in-film particles per square millimeter of surface area particles or surface roughness features in the silicon nitride of about 120-150 nanometers. Accordingly, a mask that is subsequently formed over the silicon nitride layer has a substantially uniform thickness and is substantially distortion-free.

Abstract: A method and composition for a composite spacer with low overlapped capacitance includes a low-k dielectric spacer layer. A first spacer is deposited on a partially formed semiconductor device having a gate oxide stack, followed by a low dielectric constant spacer layer. Anisotropic etching of the combined layers form spacers surrounding the gate oxide stack.

Abstract: Oxide layers, including gate oxide layers having different thicknesses, are formed, plasma nitridized, and oxidized in an oxygen atmosphere containing hydrogen at a high temperature. Electron trap sites and stress occurring during plasma nitridation may be removed during oxidation.

Abstract: Methods and apparatuses for forming an oxide film. The method includes depositing an oxide film on a substrate using a process gas mixture that comprises a silicon source gas, an oxygen gas, and a hydrogen gas, and a process temperature between 800° C. and 1300° C. During the deposition of the oxide film, the process gas mixture comprises less than 6% oxygen, silicon gas, and predominantly hydrogen.

Abstract: A semiconductor device manufacturing apparatus which forms silicon nitride films on a plurality of substrates by thermal chemical vapor deposition. The semiconductor device manufacturing apparatus includes a vertical reaction tube, a substrate holder, and gas supplies. The vertical reaction tube has an inner wall. The substrate holder is for holding the plurality of substrates in the vertical reaction tube with the plurality of substrates being vertically stacked with a distance “a” between adjacent substrates of the plurality of substrates and a distance “b” between edges of the plurality of substrates and the inner wall of the vertical reaction tube being maintained substantially equal to each other.

Abstract: Disclosed herein is a method for the fabrication of a capacitor of semiconductor device, which is capable of increasing a charge storage capacitance of the capacitor while preventing generation of leakage current in the capacitor. The disclosed method comprises comprising the steps of: forming a ruthenium film as a lower electrode on a semiconductor substrate; depositing an amorphous TaON film having an excellent dielectric constant on the ruthenium film; subjecting the resulting substrate to a first thermal treatment to prevent oxidation of the lower electrode and to remove carbons present in the amorphous TaON thin film; subjecting the resulting substrate to a second thermal treatment to crystallize the amorphous TaON thin film; and forming a metal film as a metal film on the crystalline TaON film.

Abstract: A method of converting a hydrophobic surface of a dielectric layer to a hydrophilic surface is described. That method comprises forming on a substrate a dielectric layer that has a hydrophobic surface, then coupling a hydrophilic component to the surface of the dielectric layer. Also described is a method for making a semiconductor device that employs this technique after polishing a conductive layer, which may comprise copper.

Abstract: The construction of a film on a wafer, which is placed in a processing chamber, may be carried out through the following steps. A layer of material is deposited on the wafer. Next, the layer of material is annealed. Once the annealing is completed, the material may be oxidized. Alternatively, the material may be exposed to a silicon gas once the annealing is completed. The deposition, annealing, and either oxidation or silicon gas exposure may all be carried out in the same chamber, without need for removing the wafer from the chamber until all three steps are completed. A semiconductor wafer processing chamber for carrying out such an in-situ construction may include a processing chamber, a showerhead, a wafer support and a rf signal means. The showerhead supplies gases into the processing chamber, while the wafer support supports a wafer in the processing chamber.

Abstract: A copper interconnect having a transition metal-nitride barrier (106) with a thin metal-silicon-nitride cap (108). A transition metal-nitride barrier (106) is formed over the structure. Then the barrier (106) is annealed in a Si-containing ambient to form a silicon-rich capping layer (108) at the surface of the barrier (106). The copper (110) is then deposited over the silicon-rich capping layer (108) with good adhesion.

Abstract: According to this invention, residues generated after selectively removing a low-dielectric-constant film such as SiOC can be effectively removed without damage on an insulating film or metal film. Specifically, residues 126 and 128 generated after forming an interconnect trench in an SiOC film 116 are removed using a fluoride-free weak alkaline amine stripper. After the removing step, the wafer is rinsed with isopropyl alcohol and then dried without drying with pure water.

Abstract: A method of manufacturing a semiconductor device including providing a first layer, forming a layer of stacked oxide-nitride-oxide layer over the first layer, depositing a first silicon layer over the layer of stacked oxide-nitride-oxide layer, providing a layer of photoresist over the first silicon layer, patterning and defining the photoresist layer, etching the first silicon layer and stacked oxide-nitride-oxide layer unmasked by the photoresist, removing the photoresist layer, providing a cleaning solution to the stacked oxide-nitride-oxide layer with the first silicon layer as a mask, and depositing a second layer of polysilicon over the first silicon layer to form a combined silicon layer.