Silicon Oxide Formation Patents (Class 438/787)
  • Patent number: 8999859
    Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: April 7, 2015
    Assignee: Novellus Systems, Inc.
    Inventors: Shankar Swaminathan, Jon Henri, Dennis M. Hausmann, Pramod Subramonium, Mandyam Sriram, Vishwanathan Rangarajan, Kirthi K. Kattige, Bart K. van Schravendijk, Andrew J. McKerrow
  • Patent number: 8999783
    Abstract: A method for producing a semiconductor device is disclosed. The method includes providing a semiconductor body having a first surface, and a second surface opposite the first surface, producing a first trench having a bottom and sidewalls and extending from the first surface into the semiconductor body, forming a dielectric layer along at least one sidewall of the trench, and filling the trench with a filling material. Forming the dielectric layer includes forming a protection layer on the least one sidewall such that the protection layer leaves a section of the at least one sidewall uncovered, oxidizing the semiconductor body in the region of the uncovered sidewall section to form a first section of the dielectric layer, removing the protection layer, and forming a second section of the dielectric layer on the at least one sidewall.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: April 7, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Anton Mauder, Franz Hirler, Andreas Meiser
  • Patent number: 8999805
    Abstract: A semiconductor device includes a first type region including a first conductivity type. The semiconductor device includes a second type region including a second conductivity type. The semiconductor device includes a channel region extending between the first type region and the second type region. The semiconductor device includes a gate region surrounding the channel region. The gate region includes a gate electrode. A gate electrode length of the gate electrode is less than about 10 nm. A method of forming a semiconductor device is provided.
    Type: Grant
    Filed: October 5, 2013
    Date of Patent: April 7, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jean-Pierre Colinge, Kuo-Cheng Ching, Ta-Pen Guo, Carlos H. Diaz
  • Patent number: 8993446
    Abstract: A method for flowable oxide deposition is provided. An oxygen source gas is increased as a function of time or film depth to change the flowable oxide properties such that the deposited film is optimized for gap fill near a substrate surface where high aspect ratio shapes are present. The oxygen gas flow rate increases as the film depth increases, such that the deposited film is optimized for planarization quality at the upper regions of the deposited film.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: March 31, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Hung-Wei Liu, Tsung-Liang Chen, Huang Liu, Zhiguo Sun
  • Publication number: 20150087161
    Abstract: A film-forming method includes forming a tungsten film or a tungsten oxide film on an object to be processed, forming a seed layer on the tungsten film or the tungsten oxide film, and forming a silicon oxide film on the seed layer, wherein the seed layer formed on the tungsten film or the tungsten oxide film is formed by heating the object to be processed and supplying an aminosilane-based gas to a surface of the tungsten film or the tungsten oxide film.
    Type: Application
    Filed: December 4, 2014
    Publication date: March 26, 2015
    Inventors: Jun SATO, Pao-Hwa Chou
  • Publication number: 20150079807
    Abstract: A method of manufacturing a silicon oxide film by using a film deposition apparatus is provided. The apparatus includes a turntable including a substrate receiving part on its upper surface, a first gas supply part to supply a first gas to the turntable in a first process area, and a second gas supply part arranged in a second process area apart from the first process area to supply a second gas. In the method, a silicon-containing gas is supplied from the first gas supply part as the first gas. A hydrogen gas and an oxidation gas are supplied from the second gas supply part as the second gas. The first gas is caused to adsorb on the substrate in the first process area, and the second gas is caused to react with the first gas adsorbed on the substrate in the second process area while rotating the turntable.
    Type: Application
    Filed: September 9, 2014
    Publication date: March 19, 2015
    Inventors: Tatsuya TAMURA, Takeshi KUMAGAI
  • Publication number: 20150079808
    Abstract: A method of manufacturing a silicon oxide film is provided. In the method, a substrate having a metal film on a surface thereof is loaded in a reaction chamber, and supply of a hydrogen gas into the reaction chamber is started by a hydrogen gas supply unit after the step of loading the substrate in the reaction chamber. Then, supply of an oxidation gas into the reaction chamber is started by an oxidation gas supply unit after the step of starting the supply of the hydrogen gas into the reaction chamber, and supply of a silicon-containing gas into the reaction chamber is started by a silicon-containing gas supply unit after the step of starting the supply of the hydrogen gas into the reaction chamber.
    Type: Application
    Filed: September 9, 2014
    Publication date: March 19, 2015
    Inventors: Tatsuya TAMURA, Takeshi KUMAGAI, Takashi CHIBA
  • Patent number: 8975196
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes providing a substrate, supplying a first liquid including a terpene to a surface of the substrate, supplying a second liquid including a silicon-containing compound to the surface of the substrate, and converting the silicon-containing compound to a silicon oxide compound.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: March 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Publication number: 20150050816
    Abstract: A method of preparing a silicon thin film, silicon thin film prepared using the method, and an electronic device including the silicon thin film are provided. The method includes applying an oxidized silicon element solution to a substrate and sintering the silicon oxide film to prepare a compact silicon oxide thin film, electrochemically reducing the silicon oxide thin film to form a porous silicon film, and re-sintering the porous silicon film. Therefore, the silicon thin film used in semiconductors, solar cells, secondary batteries and the like can be easily prepared at a low cost with a smaller number of processes than the conventional methods, and thus price competitiveness of products can be enhanced.
    Type: Application
    Filed: August 19, 2014
    Publication date: February 19, 2015
    Inventors: Sang Eun Bae, Jong-Yun Kim, Jei-Won Yeon, Tae-Hong Park, Kyuseok Song, Dae Hyeon Kim, Young Hwan Cho, Yong Joon Park, Yeong-Keong Ha
  • Patent number: 8956983
    Abstract: Disclosed herein are methods of doping a patterned substrate in a reaction chamber. The methods may include forming a first conformal film layer which has a dopant source including a dopant, and driving some of the dopant into the substrate to form a conformal doping profile. In some embodiments, forming the first film layer may include introducing a dopant precursor into the reaction chamber, adsorbing the dopant precursor under conditions whereby it forms an adsorption-limited layer, and reacting the adsorbed dopant precursor to form the dopant source. Also disclosed herein are apparatuses for doping a substrate which may include a reaction chamber, a gas inlet, and a controller having machine readable code including instructions for operating the gas inlet to introduce dopant precursor into the reaction chamber so that it is adsorbed, and instructions for reacting the adsorbed dopant precursor to form a film layer containing a dopant source.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: February 17, 2015
    Assignee: Novellus Systems, Inc.
    Inventors: Shankar Swaminathan, Mandyam Sriram, Bart van Schravendijk, Pramod Subramonium, Adrien LaVoie
  • Patent number: 8946097
    Abstract: A manufacturing method of a semiconductor device, which includes the steps of forming a gate electrode layer over a substrate having an insulating surface, forming a gate insulating layer over the gate electrode layer, forming an oxide semiconductor layer over the gate insulating layer, forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer, forming an insulating layer including oxygen over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and after formation of an insulating layer including hydrogen over the insulating layer including oxygen, performing heat treatment so that hydrogen in the insulating layer including hydrogen is supplied to at least the oxide semiconductor layer.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: February 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8945305
    Abstract: Methods for depositing a material, such as a metal or a transition metal oxide, using an ALD (atomic layer deposition) process and resulting structures are disclosed. Such methods include treating a surface of a semiconductor structure periodically throughout the ALD process to regenerate a blocking material or to coat a blocking material that enables selective deposition of the material on a surface of a substrate. The surface treatment may reactivate a surface of the substrate toward the blocking material, may restore the blocking material after degradation occurs during the ALD process, and/or may coat the blocking material to prevent further degradation during the ALD process. For example, the surface treatment may be applied after performing one or more ALD cycles. Accordingly, the presently disclosed methods enable in situ restoration of blocking materials in ALD process that are generally incompatible with the blocking material and also enables selective deposition in recessed structures.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: February 3, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 8940646
    Abstract: Disclosed herein are methods of depositing layers of material on multiple semiconductor substrates at multiple processing stations within one or more reaction chambers. The methods may include dosing a first substrate with film precursor at a first processing station and dosing a second substrate with film precursor at a second processing station with precursor flowing from a common source, wherein the timing of said dosing is staggered such that the first substrate is dosed during a first dosing phase during which the second substrate is not substantially dosed, and the second substrate is dosed during a second dosing phase during which the first substrate is not substantially dosed. Also disclosed herein are apparatuses having a plurality of processing stations contained within one or more reaction chambers and a controller with machine-readable instructions for staggering the dosing of first and second substrates at first and second processing stations.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: January 27, 2015
    Assignee: Lam Research Corporation
    Inventors: Ramesh Chandrasekharan, Adrien Lavoie, Damien Slevin, Karl Leeser
  • Patent number: 8927430
    Abstract: In one exemplary embodiment of the invention, a method includes: providing a structure having a first layer overlying a substrate, where the first layer includes a dielectric material having a plurality of pores; applying a filling material to a surface of the first layer; after applying the filling material, heating the structure to enable the filling material to at least partially fill the plurality of pores, where heating the structure results in residual filling material being left on the surface of the first layer; and after heating the structure, removing the residual filling material by applying a solvent wash.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Robert L. Bruce, Geraud Jean-Michel Dubois, Theo J. Frot, Willi Volksen
  • Patent number: 8906455
    Abstract: This invention discloses the method of forming silicon nitride, silicon oxynitride, silicon oxide, carbon-doped silicon nitride, carbon-doped silicon oxide and carbon-doped oxynitride films at low deposition temperatures. The silicon containing precursors used for the deposition are monochlorosilane (MCS) and monochloroalkylsilanes. The method is preferably carried out by using plasma enhanced atomic layer deposition, plasma enhanced chemical vapor deposition, and plasma enhanced cyclic chemical vapor deposition.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: December 9, 2014
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Liu Yang, Xinjian Lei, Bing Han, Manchao Xiao, Eugene Joseph Karwacki, Jr., Hansong Cheng
  • Patent number: 8906757
    Abstract: Methods of forming patterns of a semiconductor device are provided. The methods may include forming a hard mask film on a semiconductor substrate. The methods may include forming first and second sacrificial film patterns that are spaced apart from each other on the hard mask film. The methods may include forming a first spacer on opposing sidewalls of the first sacrificial film pattern and a second spacer on opposing sidewalls of the second sacrificial film pattern. The methods may include removing the first and second sacrificial film patterns. The methods may include trimming the second spacer such that a line width of the second spacer becomes smaller than a line width of the first spacer. The methods may include forming first and second hard mask film patterns by etching the hard mask film using the first spacer and the trimmed second spacer as an etch mask.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: December 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myeong-Cheol Kim, Il-Sup Kim, Cheol Kim, Jong-Chan Shin, Jong-Wook Lee, Choong-Ho Lee, Si-Young Choi, Jong-Seo Hong
  • Patent number: 8895455
    Abstract: To form an insulating film with extremely low concentration of impurities such as carbon, hydrogen, nitrogen, chlorine, etc in a film. There are provided the steps of forming a specific element-containing layer on a substrate by supplying source gas containing a specific element into a processing container in which the substrate is accommodated; changing the specific element-containing layer into a nitride layer, by activating and supplying gas containing nitrogen into the processing container; and changing the nitride layer into an oxide layer or an oxynitride layer, by activating and supplying gas containing oxygen into the processing container; with this cycle set as one cycle and performed for at least one or more times.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: November 25, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Naonori Akae, Yoshiro Hirose
  • Patent number: 8895456
    Abstract: A method of depositing a film of forming a doped oxide film including a first oxide film containing a first element and doped with a second element on substrates mounted on a turntable including depositing the first oxide film onto the substrates by rotating the turntable predetermined turns while a first reaction gas containing the first element is supplied from a first gas supplying portion, an oxidation gas is supplied from a second gas supplying portion, and a separation gas is supplied from a separation gas supplying portion, and doping the first oxide film with the second element by rotating the turntable predetermined turns while a second reaction gas containing the second element is supplied from one of the first and second gas supplying portions, an inert gas is supplied from another one, and the separation gas is supplied from the separation gas supplying portion.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: November 25, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Mitsuhiro Tachibana, Hiroaki Ikegawa, Yu Wamura, Muneyuki Otani, Jun Ogawa, Kosuke Takahashi
  • Publication number: 20140339497
    Abstract: Fluorescent semiconductor nanocrystals and quantum dots having an inorganic coating on the outermost surface of the nanocrystal are described herein as well as methods for preparing and using such nanocrystals and quantum dots. Devices in which such nanocrystals and quantum dots are used are also described.
    Type: Application
    Filed: June 20, 2012
    Publication date: November 20, 2014
    Applicant: CRYSTALPLEX CORPORATION
    Inventors: Lianhua Qu, Matthew W. Bootman
  • Patent number: 8883624
    Abstract: Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a gate stack of a NVM transistor in a NVM region of a substrate including the NVM region and a plurality of MOS regions; and depositing a high-k dielectric material over the gate stack of the NVM transistor and the plurality of MOS regions to concurrently form a blocking dielectric comprising the high-k dielectric material in the gate stack of the NVM transistor and high-k gate dielectrics in the plurality of MOS regions. In one embodiment, a first metal layer is deposited over the high-k dielectric material and patterned to concurrently form a metal gate over the gate stack of the NVM transistor, and a metal gate of a field effect transistor in one of the MOS regions.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: November 11, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Krishnaswamy Ramkumar
  • Patent number: 8871654
    Abstract: A film deposition apparatus forming a thin film by after repeating cycles of sequentially supplying gases to a substrate on a turntable inside a vacuum chamber that includes a first supplying portion for causing the substrate to absorb a first gas containing silicon; a second supplying portion apart from the first supplying portion for supplying a second gas containing active species to produce a silicone dioxide; a separating area between the first and second supplying portions for preventing their mixture; a main heating mechanism for heating the substrate; and an auxiliary mechanism including a heat lamp above the turntable and having a wavelength range absorbable by the substrate to directly heat to be a processing temperature at which an ozone gas is thermally decomposed, wherein a maximum temperature is lower than the thermally decomposed temperature, at which, the first gas is absorbed and oxidized by the second gas.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: October 28, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Hitoshi Kato, Shigehiro Miura
  • Patent number: 8871656
    Abstract: Methods of depositing initially flowable dielectric films on substrates are described. The methods include introducing silicon-containing precursor to a deposition chamber that contains the substrate. The methods further include generating at least one excited precursor, such as radical nitrogen or oxygen precursor, with a remote plasma system located outside the deposition chamber. The excited precursor is also introduced to the deposition chamber, where it reacts with the silicon-containing precursor in a reaction zone deposits the initially flowable film on the substrate. The flowable film may be treated in, for example, a steam environment to form a silicon oxide film.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: October 28, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Abhijit Basu Mallick, Nitin K. Ingle
  • Patent number: 8871645
    Abstract: Semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. In some embodiments, a semiconductor device may include a floating gate having a first width proximate a base of the floating gate that is greater than a second width proximate a top of the floating gate. In some embodiments, a method of shaping a material layer may include (a) oxidizing a surface of a material layer to form an oxide layer at an initial rate; (b) terminating formation of the oxide layer when the oxidation rate is about 90% or below of the initial rate; (c) removing at least some of the oxide layer by an etching process; and (d) repeating (a) through (c) until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: October 28, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Udayan Ganguly, Yoshita Yokota, Jing Tang, Sunderraj Thirupapuliyur, Christopher Sean Olsen, Shiyu Sun, Tze Wing Poon, Wei Liu, Johanes Swenberg, Vicky U. Nguyen, Swaminathan Srinivasan, Jacob Newman
  • Publication number: 20140315393
    Abstract: A method of manufacturing a semiconductor device includes: pre-treating a surface of a substrate by supplying an oxygen-containing gas and a hydrogen-containing gas to the substrate heated in a process chamber under a pressure less than atmospheric pressure; and forming a film on the pre-treated substrate by performing a cycle a predetermined number of times. The cycle includes: supplying a precursor gas to the substrate in the process chamber; and supplying a reaction gas to the substrate in the process chamber.
    Type: Application
    Filed: March 31, 2014
    Publication date: October 23, 2014
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takashi OZAKI, Hideki HORITA
  • Patent number: 8866255
    Abstract: A semiconductor device is provided that comprises a semiconductor substrate comprising an active area and a peripheral region adjacent the active area and structure positioned in the peripheral region for hindering the diffusion of mobile ions from the peripheral region into the active area.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: October 21, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans-Joachim Schulze, Stephan Voss, Markus Zundel
  • Publication number: 20140302690
    Abstract: Methods forming a low-? dielectric material on a substrate are described. The methods may include the steps of producing a radical precursor by flowing an unexcited precursor into a remote plasma region, and reacting the radical precursor with a gas-phase silicon precursor to deposit a flowable film on the substrate. The gas-phase silicon precursor may include at least one silicon-and-oxygen containing compound and at least one silicon-and-carbon linker. The flowable film may be cured to form the low-? dielectric material.
    Type: Application
    Filed: September 6, 2013
    Publication date: October 9, 2014
    Applicant: Applied Materials, Inc.
    Inventors: Brian S. Underwood, Abhijit B. Mallick, Nitin K. Ingle
  • Patent number: 8846536
    Abstract: Provided herein are integration-compatible dielectric films and methods of depositing and modifying them. According to various embodiments, the methods can include deposition of flowable dielectric films targeting specific film properties and/or modification of those properties with an integration-compatible treatment process. In certain embodiments, methods of depositing and modifying flowable dielectric films having tunable wet etch rates and other properties are provided. Wet etch rates can be tuned during integration through am integration-compatible treatment process. Examples of treatment processes include plasma exposure and ultraviolet radiation exposure.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: September 30, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Nerissa Draeger, Karena Shannon, Bart van Schravendijk, Kaihan Ashtiani
  • Patent number: 8846549
    Abstract: A non-volatile memory device on a semiconductor substrate may include a bottom oxide layer over the substrate, a middle layer of silicon nitride over the bottom oxide layer, and a top oxide layer over the middle layer. The bottom oxide layer may have a hydrogen concentration of up to 5E19 cm?3 and an interface trap density of up to 5E11 cm?2 eV?1. The three-layer structure may be a charge-trapping structure for the memory device, and the memory device may further include a gate over the structure and source and drain regions in the substrate.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: September 30, 2014
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Yen-Hao Shih, Hang-Ting Lue, Erh-Kun Lai, Kuang Yeu Hsieh
  • Publication number: 20140287598
    Abstract: A method of manufacturing a semiconductor device includes forming an oxide film on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a precursor gas to the substrate; and supplying an ozone gas to the substrate. In the act of supplying the precursor gas, the precursor gas is supplied to the substrate in a state where a catalytic gas is not supplied to the substrate, and in the act of supplying the ozone gas, the ozone gas is supplied to the substrate in a state where an amine-based catalytic gas is supplied to the substrate.
    Type: Application
    Filed: March 19, 2014
    Publication date: September 25, 2014
    Applicants: L'AIR LIQUIDE, SOCIETE ANONYME POUR L'ETUDE ET L'EXPLOITATION DES PROCEDES GEORGES CLAUDE, HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoshiro HIROSE, Norikazu MIZUNO, Kazutaka YANAGITA, Shingo OKUBO
  • Patent number: 8835261
    Abstract: The disclosure relates generally to a metal-oxide-semiconductor field effect transistor (MOSFET) structures and methods of forming the same. The MOSFET structure includes at least one semiconductor body on a substrate; a dielectric cap on a top surface of the at least one semiconductor body, wherein a width of the at least one semiconductor body is less than a width of the dielectric cap; a gate dielectric layer conformally coating the at least one semiconductor body; and at least one electrically conductive gate on the gate dielectric layer.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: Edward J. Nowak, Richard Q. Williams
  • Patent number: 8835332
    Abstract: A film deposition method, in which a film of a reaction product of a first reaction gas, which tends to be adsorbed onto hydroxyl radicals, and a second reaction gas capable of reacting with the first reaction gas is formed on a substrate provided with a concave portion, includes a step of controlling an adsorption distribution of the hydroxyl radicals in a depth direction in the concave portion of the substrate; a step of supplying the first reaction gas on the substrate onto which the hydroxyl radicals are adsorbed; and a step of supplying the second reaction gas on the substrate onto which the first reaction gas is adsorbed.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: September 16, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Hitoshi Kato, Tatsuya Tamura, Takeshi Kumagai
  • Patent number: 8828888
    Abstract: When forming complex metallization systems on the basis of copper, the very last metallization layer may receive contact regions on the basis of copper, the surface of which may be passivated on the basis of a dedicated protection layer, which may thus allow the patterning of the passivation layer stack prior to shipping the device to a remote manufacturing site. Hence, the protected contact surface may be efficiently re-exposed in the remote manufacturing site on the basis of an efficient non-masked wet chemical etch process.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: September 9, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Matthias Lehr, Joerg Hohage, Andreas Ott
  • Patent number: 8822350
    Abstract: An oxide film is formed, having a specific film thickness on a substrate by alternately repeating: forming a specific element-containing layer on the substrate by supplying a source gas containing a specific element, to the substrate housed in a processing chamber and heated to a first temperature; and changing the specific element-containing layer formed on the substrate, to an oxide layer by supplying a reactive species containing oxygen to the substrate heated to the first temperature in the processing chamber under a pressure of less than atmospheric pressure, the reactive species being generated by causing a reaction between an oxygen-containing gas and a hydrogen-containing gas in a pre-reaction chamber under a pressure of less than atmospheric pressure and heated to a second temperature higher than the first temperature.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: September 2, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kazuhiro Yuasa, Ryuji Yamamoto
  • Patent number: 8822349
    Abstract: A method of making a semiconductor structure is provided. The method includes forming a dielectric layer using a high density plasma oxidation process. The dielectric layer is on a storage layer and the thickness of the storage layer is reduced during the high density plasma oxidation process.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: September 2, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventors: Jeong Soo Byun, Krishnaswamy Ramkumar
  • Patent number: 8815699
    Abstract: Generally, the present disclosure is directed to methods for forming reverse shallow trench isolation structures with super-steep retrograde wells for use with field effect transistor elements. One illustrative method disclosed herein includes performing a thermal oxidation process to form a layer of thermal oxide material on a semiconductor layer of a semiconductor substrate, and forming a plurality of openings in the layer of thermal oxide material to form a plurality of isolation regions from the layer of thermal oxide material, wherein each of the plurality of openings exposes a respective surface region of the semiconductor layer.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: August 26, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Tong Weihua, Krishnan Bharat, Lun Zhao, Kim Seung, Lee Yongmeng, Kim Sun
  • Patent number: 8809204
    Abstract: A method of manufacturing a semiconductor device, the method comprising: forming an oxide film on a substrate by alternately repeating: (a) forming an element-containing layer on the substrate by supplying a source gas containing an element into a process vessel accommodating the substrate; and (b) changing the element-containing layer to an oxide layer by supplying an oxygen-containing gas and a hydrogen-containing gas into the process vessel having an inside pressure lower than atmospheric pressure, reacting the oxygen-containing gas with the hydrogen-containing gas to generate an atomic oxygen, and oxidizing the element-containing layer by the atomic oxygen.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: August 19, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Naonori Akae, Yoshiro Hirose, Yushin Takasawa, Yosuke Ota
  • Patent number: 8809206
    Abstract: A method for semiconductor device fabrication is provided. The present invention is directed towards using at least one patterned dummy wafer along with one or more product wafers in a film deposition system to create a sidewall layer thickness variation that is substantially uniform across all product wafers. The at least one patterned dummy wafer may have a high density patterned substrate surface with a topography that is different from or substantially similar to a topography of the one or more product wafers. Furthermore, in a batch type Chemical Vapor Deposition (CVD) system, the at least one patterned dummy wafer may be placed near a gas inlet of the CVD system. At least one patterned dummy wafer may be placed near an exhaust of the CVD system. Additionally, the patterned dummy wafers may be reusable in subsequent film deposition processes.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: August 19, 2014
    Assignee: Spansion LLC
    Inventors: Rinji Sugino, Bradley Marc Davis, Lei Xue, Kenichi Ohtsuka
  • Patent number: 8809161
    Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: August 19, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Vishal Gauri, Raashina Humayun, Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
  • Patent number: 8809202
    Abstract: Methods of manufacturing semiconductor devices are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece, and forming a protective material over a bottom surface and edges of the workpiece. A top surface of the workpiece is processed. The protective material protects the edges and the bottom surface of the workpiece during the processing of the top surface of the workpiece.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: August 19, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hui Weng, Wei-Sheng Yun, Shao-Ming Yu, Hsin-Chih Chen, Chih-Hsin Ko, Clement Hsingjen Wann
  • Patent number: 8802569
    Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a plurality of circuit devices over a substrate. The method includes forming an organic layer over the substrate. The organic layer is formed over the plurality of circuit devices. The method includes polishing the organic layer to planarize a surface of the organic layer. The organic layer is free of being thermally treated prior to the polishing. The organic material is un-cross-linked during the polishing. The method includes depositing a LT-film over the planarized surface of the organic layer. The depositing is performed at a temperature less than about 150 degrees Celsius. The depositing is also performed without using a spin coating process. The method includes forming a patterned photoresist layer over the LT-film.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: August 12, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Liang Lu, Ming-Feng Shieh, Ching-Yu Chang
  • Patent number: 8796105
    Abstract: A method for depositing a polysilazane on a semiconductor wafer is provided. The method includes steps of disposing a silazane onto the semiconductor wafer, and heating the silazane to form the polysilazane on the semiconductor wafer. An apparatus for preparing a polysilazane on a semiconductor wafer is also provided.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: August 5, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: You-Hua Chou, Chih-Tsung Lee, Min-Hao Hong, Ming-Huei Lien, Chih-Jen Wu, Chen-Ming Huang
  • Patent number: 8796078
    Abstract: An object is to provide a highly reliable semiconductor device including a thin film transistor having stable electric characteristics. In addition, another object is to manufacture a highly reliable semiconductor device at low cost with high productivity. In a method for manufacturing a semiconductor device including a thin film transistor including an oxide semiconductor layer as a channel formation region, the oxide semiconductor layer is heated under a nitrogen atmosphere to lower its resistance, thereby forming a low-resistance oxide semiconductor layer. Further, resistance of a region of the low-resistance oxide semiconductor layer, which is overlapped with a gate electrode layer, is selectively increased, thereby forming a high-resistance oxide semiconductor layer. Resistance of the oxide semiconductor layer is increased by forming a silicon oxide film in contact with the oxide semiconductor layer by a sputtering method.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: August 5, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshinari Sasaki, Hiroki Ohara, Junichiro Sakata
  • Patent number: 8790982
    Abstract: Oxidation methods and resulting structures including providing an oxide layer on a substrate and then reoxidizing the oxide layer by vertical ion bombardment of the oxide layer in an atmosphere containing at least one oxidant. The oxide layer may be provided over diffusion regions, such as source and drain regions, in a substrate. The oxide layer may overlie the substrate and is proximate a gate structure on the substrate. The at least one oxidant may be oxygen, water, ozone, or hydrogen peroxide, or a mixture thereof. These oxidation methods provide a low-temperature oxidation process, less oxidation of the sidewalls of conductive layers in the gate structure, and less current leakage to the substrate from the gate structure.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: July 29, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Li Li, Pai-Hung Pan
  • Patent number: 8790953
    Abstract: The surface of silicon is textured to create black silicon on a nano-micro scale by electrochemical reduction of a silica layer on silicon in molten salts. The silica layer can be a coating, or a layer caused by the oxidation of the silicon.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: July 29, 2014
    Inventors: Derek John Fray, Eimutis Juzeliunas
  • Patent number: 8785301
    Abstract: A method of cleaning a SiC semiconductor includes the steps of forming an oxide film at the surface of a SiC semiconductor, and removing the oxide film. At the step of forming an oxide film, an oxide film is formed using ozone water having a concentration greater than or equal to 30 ppm. The forming step preferably includes the step of heating at least one of the surface of the SiC semiconductor and the ozone water. Thus, there can be obtained a method of cleaning a SiC semiconductor that can exhibit cleaning effect on the SiC semiconductor.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: July 22, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Takeyoshi Masuda, Tomihito Miyazaki, Toru Hiyoshi, Satomi Itoh, Hiromu Shiomi
  • Patent number: 8778194
    Abstract: A method is described for manufacturing a component having a through-connection. The method includes providing a substrate; forming a trench structure in the substrate, a substrate area which is completely surrounded by the trench structure being produced; forming a closing layer for closing off the trench structure, a cavity girded by the closing layer being formed in the area of the trench structure; removing substrate material from the substrate area surrounded by the closed-off trench structure; and at least partially filling the substrate area surrounded by the closed-off trench structure with a metallic material. A component having a through-connection is also described.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: July 15, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Jochen Reinmuth, Yvonne Bergmann
  • Publication number: 20140183706
    Abstract: Described herein are methods of forming dielectric films comprising silicon, such as, but not limited to, silicon oxide, silicon oxycarbide, silicon carbide, and combinations thereof, that exhibit at least one of the following characteristics: low wet etch resistance, a dielectric constant of 6.0 or below, and/or can withstand a high temperature rapid thermal anneal process. Also disclosed herein are the methods to form dielectric films or coatings on an object to be processed, such as, for example, a semiconductor wafer.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 3, 2014
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Liu Yang, Manchao Xiao, Kirk Scott Cuthill, Bing Han, Mark Leonard O'Neill
  • Patent number: 8765606
    Abstract: Methods are provided for producing a pristine hydrogen-terminated silicon wafer surface with high stability against oxidation. The silicon wafer is treated with high purity, heated dilute hydrofluoric acid with anionic surfactant, rinsed in-situ with ultrapure water at room temperature, and dried. Alternatively, the silicon wafer is treated with dilute hydrofluoric acid, rinsed with hydrogen gasified water, and dried. The silicon wafer produced by the method is stable in a normal clean room environment for greater than 3 days and has been demonstrated to last without significant oxide regrowth for greater than 8 days.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: July 1, 2014
    Assignee: ASM America, Inc.
    Inventor: Robert H. Pagliaro, Jr.
  • Patent number: 8764993
    Abstract: A method of making a porous SiOC membrane is provided. The method comprises disposing a SiOC layer on a porous substrate, and etching the SiOC layer to form through pores in the SiOC layer. A porous SiOC membrane having a network of pores extending through a thickness of the membrane is provided.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: July 1, 2014
    Assignee: General Electric Company
    Inventors: Atanu Saha, Salil Mohan Joshi, An-Ping Zhang
  • Patent number: 8759131
    Abstract: Techniques are provided for manufacturing a light-emitting device having high internal quantum efficiency, consuming less power, having high luminance, and having high reliability. The techniques include forming a conductive light-transmitting oxide layer comprising a conductive light-transmitting oxide material and silicon oxide, forming a barrier layer in which density of the silicon oxide is higher than that in the conductive light-transmitting oxide layer over the conductive light-transmitting oxide layer, forming an anode having the conductive light-transmitting oxide layer and the barrier layer, heating the anode under a vacuum atmosphere, forming an electroluminescent layer over the heated anode, and forming a cathode over the electroluminescent layer. According to the techniques, the barrier layer is formed between the electroluminescent layer and the conductive light-transmitting oxide layer.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: June 24, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Junichiro Sakata, Yoshiharu Hirakata, Norihito Sone