Utilizing Electromagnetic Or Wave Energy (e.g., Photo-induced Deposition, Plasma, Etc.) Patents (Class 438/792)
  • Patent number: 10720322
    Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: July 21, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Dai Ishikawa, Atsuki Fukazawa, Eiichiro Shiba, Shinya Ueda, Taishi Ebisudani, SeungJu Chun, YongMin Yoo, YoonKi Min, SeYong Kim, JongWan Choi
  • Patent number: 10468297
    Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: November 5, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Szu-Ping Tung, Yu-Kai Lin, Jen Hung Wang, Shing-Chyang Pan
  • Patent number: 10381219
    Abstract: Methods for forming a silicon nitride film by a plasma enhanced atomic layer deposition (PEALD) process are provided. The methods may include: providing a substrate into a reaction chamber; and performing at least one unit deposition cycle of a PEALD process, wherein a unit cycle comprises, contacting the substrate with a vapor phase reactant comprising a silicon precursor; and contacting the substrate with a reactive species generated from a gas mixture comprising a nitrogen precursor and an additional gas. Methods for improving the etch characteristics of a silicon nitride film utilizing a post deposition plasma treatment are also provided.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: August 13, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Shinya Ueda, Tomomi Takayama, Taishi Ebisudani, Toshiya Suzuki, Tomohiro Kubota
  • Patent number: 10355011
    Abstract: Methods for forming semiconductor structures are provided. The method for forming the semiconductor structure includes forming a control gate over a substrate and forming a dielectric layer covering the control gate. The method further includes forming a conductive layer having a first portion and a second portion over the dielectric layer. In addition, the first portion of the conductive layer is separated from the control gate by the dielectric layer. The method further includes forming an oxide layer on a top surface of the first portion of the conductive layer and removing the second portion of the conductive layer to form a memory gate.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: July 16, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu-Ting Sung, Chung-Chiang Min, Wei-Hang Huang, Shih-Chang Liu, Chia-Shiung Tsai
  • Patent number: 10317437
    Abstract: A method of determining payload potential may include the steps of receiving data on a first bias voltage and a resulting first collected current of a first needle of a multi-needle Langmuir probe, receiving data on a second bias voltage and a resulting second collected current of a second needle of the multi-needle Langmuir probe, assigning a value for the electron temperature in which the multi-needle Langmuir probe was operating, and using the current and voltage data, the assigned electron temperature value and Langmuir probe theory to calculate the platform potential of the multi-needle Langmuir probe.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: June 11, 2019
    Assignee: Ukniversitetet | Olso
    Inventors: Arne Pedersen, Tore André Bekkeng, Espen Trondsen, Jøran Moen
  • Patent number: 10163625
    Abstract: There is provided a method for manufacturing a semiconductor device, including: providing a substrate with an oxide film formed on a surface thereof; pre-processing a surface of the oxide film; and forming a nitride film containing carbon on the surface of the oxide film which has been pre-processed, by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas to the substrate; supplying a carbon-containing gas to the substrate; and supplying a nitrogen-containing gas to the substrate, or by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas to the substrate; and supplying a gas containing carbon and nitrogen to the substrate, or by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas containing carbon to the substrate; and supplying a nitrogen-containing gas to the substrate.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: December 25, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoshinobu Nakamura, Kiyohiko Maeda, Yoshiro Hirose, Ryota Horiike, Yoshitomo Hashimoto
  • Patent number: 10121654
    Abstract: There is provided a method for manufacturing a semiconductor device, including: providing a substrate with an oxide film formed on a surface thereof; pre-processing a surface of the oxide film; and forming a nitride film containing carbon on the surface of the oxide film which has been pre-processed, by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas to the substrate; supplying a carbon-containing gas to the substrate; and supplying a nitrogen-containing gas to the substrate, or by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas to the substrate; and supplying a gas containing carbon and nitrogen to the substrate, or by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: supplying a precursor gas containing carbon to the substrate; and supplying a nitrogen-containing gas to the substrate.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: November 6, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoshinobu Nakamura, Kiyohiko Maeda, Yoshiro Hirose, Ryota Horiike, Yoshitomo Hashimoto
  • Patent number: 10017853
    Abstract: A processing method of a silicon nitride film can modify a silicon nitride film such that the silicon nitride film has a required characteristic even if it is formed at a low temperature by CVD. The processing method of the silicon nitride film formed on a substrate by plasma CVD includes modifying a surface portion of the silicon nitride film by irradiating microwave hydrogen plasma to the silicon nitride film to remove hydrogens in the surface portion of the silicon nitride film with atomic hydrogens contained in the microwave hydrogen plasma.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: July 10, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Toshio Nakanishi, Daisuke Katayama
  • Patent number: 9960266
    Abstract: Passivated AlGaN/GaN HEMTs having no plasma damage to the AlGaN surface and methods for making the same. In a first embodiment, a thin HF SiN barrier layer is deposited on the AlGaN surface after formation of the gate. A thick HF/LF SiN layer is then deposited, the thin HF SiN layer and the thick HF/LF Sin layer comprising bi-layer SiN passivation on the HEMT. In a second embodiment, a first thin HF SiN barrier layer is deposited on the AlGaN surface before formation of the gate and is annealed. Following annealing of the first SiN layer, the gate is formed, and a second HF SiN barrier layer is deposited, followed by a thick HF/LF SiN layer, the three SiN layers comprising tri-layer SiN passivation on the HEMT.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: May 1, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Andrew D. Koehler, Travis J. Anderson, Karl D. Hobart
  • Patent number: 9728402
    Abstract: An embodiment is a method including depositing a first flowable film over a substrate in a processing region, the first flowable film comprising silicon and nitrogen, curing the first flowable film in a first step at a first temperature with a first process gas and ultra-violet light, the first process gas including oxygen, curing the first flowable film in a second step at a second temperature with a second process gas and ultra-violet light, the second process gas being different than the first process gas, and annealing the cured first flowable film at a third temperature to convert the cured first flowable film into a silicon oxide film over the substrate.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: August 8, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Cheng Wang, Chun-Hao Hsu, Han-Ti Hsiaw, Keng-Chu Lin
  • Patent number: 9613949
    Abstract: A bipolar junction transistor (BJT) and a diode including fin structures are provided in the present invention. In the BJT and the diode of the present invention, first doped layers are formed in a first fin and below first epitaxial structures in the first fin, and the first doped layers are connected with one another for improving related electrical performance of the BJT and the diode including fin structures.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: April 4, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Chen-Wei Pan
  • Patent number: 9543209
    Abstract: A method includes forming a first semiconductor fin, and oxidizing surface portions of the first semiconductor fin to form a first oxide layer. The first oxide layer includes a top portion overlapping the first semiconductor fin and sidewall portions on sidewalls of the first semiconductor fin. The top portion of the first oxide layer is then removed, wherein the sidewall portions of the first oxide layer remains after the removing. The top portion of the first semiconductor fin is removed to form a recess between the sidewall portions of the first oxide layer. An epitaxy is performed to grow a semiconductor region in the recess.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: January 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Ka-Hing Fung
  • Patent number: 9478460
    Abstract: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: October 25, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mei-yee Shek, Weifeng Ye, Li-Qun Xia, Kang Sub Yim, Kelvin Chan
  • Patent number: 9178043
    Abstract: A method includes forming a first semiconductor fin, and oxidizing surface portions of the first semiconductor fin to form a first oxide layer. The first oxide layer includes a top portion overlapping the first semiconductor fin and sidewall portions on sidewalls of the first semiconductor fin. The top portion of the first oxide layer is then removed, wherein the sidewall portions of the first oxide layer remains after the removing. The top portion of the first semiconductor fin is removed to form a recess between the sidewall portions of the first oxide layer. An epitaxy is performed to grow a semiconductor region in the recess.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: November 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Ka-Hing Fung
  • Patent number: 9159574
    Abstract: Methods of silicon etch for trench sidewall smoothing are described. In one embodiment, a method involves smoothing a sidewall of a trench formed in a semiconductor wafer via plasma etching. The method includes directionally etching the semiconductor wafer with plasma generated from a fluorine gas to smooth the sidewall of the trench, the trench having a protective layer formed by plasma generated by a second process gas such as oxygen or a polymerization gas. In another embodiment, a method involves etching a semiconductor wafer to generate a trench having a smooth sidewall. The method includes plasma etching the semiconductor wafer with one or more first process gases including a fluorine gas, simultaneously performing deposition and plasma etching the semiconductor wafer with one or more second process gases including a fluorine gas and a polymerization gas mix, and performing deposition with one or more third process gases including a polymerization gas.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: October 13, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Keven Yu, Ajay Kumar
  • Publication number: 20150126045
    Abstract: Embodiments of the present invention generally provide methods for forming a silicon nitride layer on a substrate. In one embodiment, a method of forming a silicon nitride layer using remote plasma chemical vapor deposition (CVD) at a temperature that is less than 300 degrees Celsius is disclosed. The precursors for the remote plasma CVD process include tris(dimethylamino)silane (TRIS), dichlorosilane (DCS), trisilylamine (TSA), bis-t-butylaminosilane (BTBAS), hexachlorodisilane (HCDS) or hexamethylcyclotrisilazane (HMCTZ).
    Type: Application
    Filed: October 22, 2014
    Publication date: May 7, 2015
    Inventors: Amit CHATTERJEE, Abhijit Basu MALLICK, Nitin K. INGLE
  • Patent number: 9023700
    Abstract: Methods and apparatus for selective one-step nitridation of semiconductor substrates is provided. Nitrogen is selectively incorporated in silicon regions of a semiconductor substrate having silicon regions and silicon oxide regions by use of a selective nitridation process. Nitrogen containing radicals may be directed toward the substrate by forming a nitrogen containing plasma and filtering or removing ions from the plasma, or a thermal nitridation process using selective precursors may be performed. A remote plasma generator may be coupled to a processing chamber, optionally including one or more ion filters, showerheads, and radical distributors, or an in situ plasma may be generated and one or more ion filters or shields disposed in the chamber between the plasma generation zone and the substrate support.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: May 5, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Udayan Ganguly, Theresa Kramer Guarini, Matthew Scott Rogers, Yoshitaka Yokota, Johanes S. Swenberg, Malcolm J. Bevan
  • Patent number: 9018093
    Abstract: A method for forming a layer constituted by repeated stacked layers includes: forming a first layer and a second layer on a substrate under different deposition conditions to form a stacked layer, wherein the film stresses of the first and second layers are tensile or compressive and opposite to each other, and the wet etch rates of the first and second layers are at least 50 times different from each other; and repeating the above step to form a layer constituted by repeated stacked layers, wherein the deposition conditions for forming at least one stacked layer are different from those for forming another stacked layer.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: April 28, 2015
    Assignee: ASM IP Holding B.V.
    Inventors: Naoto Tsuji, Fumitaka Shoji
  • Patent number: 9018109
    Abstract: A thin film transistor in which deterioration at initial operation is not likely to be caused and a manufacturing method thereof. A transistor which includes a gate insulating layer at least whose uppermost surface is a silicon nitride layer, a semiconductor layer over the gate insulating layer, and a buffer layer over the semiconductor layer and in which the concentration of nitrogen in the vicinity of an interface between the semiconductor layer and the gate insulating layer, which is in the semiconductor layer is lower than that of the buffer layer and other parts of the semiconductor layer. Such a thin film transistor can be manufactured by exposing the gate insulating layer to an air atmosphere and performing plasma treatment on the gate insulating layer before the semiconductor layer is formed.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: April 28, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Miyairi, Erika Kato, Kunihiko Suzuki
  • Patent number: 9018104
    Abstract: There is provided a method for manufacturing a semiconductor device, including forming an insulating film having a prescribed composition and a prescribed film thickness on a substrate by alternately performing the following steps prescribed number of times: supplying one of the sources of a chlorosilane-based source and an aminosilane-based source to a substrate in a processing chamber, and thereafter supplying the other source, to form a first layer containing silicon, nitrogen, and carbon on the substrate; and supplying a reactive gas different from each of the sources, to the substrate in the processing chamber, to modify the first layer and form a second layer.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: April 28, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yoshiro Hirose, Kenji Kanayama, Norikazu Mizuno, Yushin Takasawa, Yosuke Ota
  • Patent number: 9018108
    Abstract: Methods of forming a dielectric layer on a substrate are described, and may include introducing a first precursor into a remote plasma region fluidly coupled with a substrate processing region of a substrate processing chamber A plasma may be formed in the remote plasma region to produce plasma effluents. The plasma effluents may be directed into the substrate processing region. A silicon-containing precursor may be introduced into the substrate processing region, and the silicon-containing precursor may include at least one silicon-silicon bond. The plasma effluents and silicon-containing precursor may be reacted in the processing region to form a silicon-based dielectric layer that is initially flowable when formed on the substrate.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 28, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Sukwon Hong, Toan Tran, Abhijit Mallick, Jingmei Liang, Nitin K. Ingle
  • Patent number: 9012336
    Abstract: Disclosed are apparatus and methods for processing a substrate. The substrate having a feature with a layer thereon is exposed to an inductively coupled plasma which forms a substantially conformal layer.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: April 21, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Heng Pan, Matthew Scott Rogers, Johanes F. Swenberg, Christopher S. Olsen, Wei Liu, David Chu, Malcom J. Bevan
  • Patent number: 8989888
    Abstract: A method for automatically detecting fault conditions and classifying the fault conditions during substrate processing is provided. The method includes collecting processing data by a set of sensors during the substrate processing. The method also includes sending the processing data to a fault detection/classification component. The method further includes performing data manipulation of the processing data by the fault detection/classification component. The method yet also includes executing a comparison between the processing data and a plurality of fault models stored within a fault library. Each fault model of the plurality of fault models represents a set of data characterizing a specific fault condition. Each fault model includes at least a fault signature, a fault boundary, and a set of principal component analysis (PCA) parameters.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: March 24, 2015
    Assignee: Lam Research Corporation
    Inventors: Gunsu Yun, Vijayakumar C. Venugopal
  • Patent number: 8980768
    Abstract: A protective insulation film covering a surface of a compound semiconductor region is formed to have a two-layer structure of a first insulation film and a second insulation film which have different properties. The first insulation film is a non-stoichiometric silicon nitride film while the second insulation film is a silicon nitride film in an almost stoichiometric state.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: March 17, 2015
    Assignee: Fujitsu Limited
    Inventor: Kozo Makiyama
  • Patent number: 8980382
    Abstract: Methods of forming silicon oxide layers are described. The methods include the steps of concurrently combining both a radical precursor and a radical-oxygen precursor with a carbon-free silicon-containing precursor. One of the radical precursor and the silicon-containing precursor contain nitrogen. The methods result in depositing a silicon-oxygen-and-nitrogen-containing layer on a substrate. The oxygen content of the silicon-oxygen-and-nitrogen-containing layer is then increased to form a silicon oxide layer which may contain very little nitrogen. The radical-oxygen precursor and the radical precursor may be produced in separate plasmas or the same plasma. The increase in oxygen content may be brought about by annealing the layer in the presence of an oxygen-containing atmosphere and the density of the film may be increased further by raising the temperature even higher in an inert environment.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Nitin Ingle, Abhijit Basu Mallick, Earl Osman Solis, Nicolay Kovarsky, Olga Lyubimova
  • Patent number: 8980767
    Abstract: Methods and apparatus for processing a substrate are provided. In some embodiments, a method of processing a substrate disposed in a process chamber includes performing a process on a substrate disposed in a process chamber having a substrate support ring configured to support the substrate and a reflector plate disposed proximate a back side of the substrate; providing a first gas comprising one of an oxygen containing gas or a nitrogen containing gas to a back side of the substrate via one or more through holes disposed in the reflector plate while performing the process on the substrate; and maintaining the process chamber at a first pressure proximate a top surface of the substrate and at a second pressure proximate the bottom surface of the substrate, wherein the first pressure is greater than the second pressure sufficiently to prevent dislodgement of the substrate from the substrate support ring during processing.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: March 17, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Matthew Rogers, Martin Ripley
  • Publication number: 20150064932
    Abstract: A method for restoring a porous surface of a dielectric layer formed on a substrate, includes: (i) providing in a reaction space a substrate on which a dielectric layer having a porous surface with terminal hydroxyl groups is formed as an outer layer; (ii) supplying gas of a Si—N compound containing a Si—N bond to the reaction space to chemisorb the Si—N compound onto the surface with the terminal hydroxyl groups; (iii) irradiating the Si—N compound-chemisorbed surface with a pulse of UV light in an oxidizing atmosphere to oxidize the surface and provide terminal hydroxyl groups to the surface; and (iv) repeating steps (ii) through (iii) to form a film on the porous surface of the dielectric layer for restoration.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 5, 2015
    Applicant: ASM IP Holding B.V.
    Inventors: Kiyohiro Matsushita, Hirofumi Arai
  • Patent number: 8956984
    Abstract: Provided is a method of manufacturing a semiconductor device capable of forming a nitride layer having high resistance to hydrogen fluoride at low temperatures. The method includes forming a nitride film on a substrate by performing a cycle a predetermined number of times, the cycle including supplying a source gas to the substrate, supplying a plasma-excited hydrogen-containing gas to the substrate, supplying a plasma-excited or thermally excited nitriding gas to the substrate, and supplying at least one of a plasma-excited nitrogen gas and a plasma-excited rare gas to the substrate.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: February 17, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Kazuyuki Okuda
  • Patent number: 8945978
    Abstract: A metal contact of a solar cell is formed by electroplating copper using an electroplating seed that is formed on a dielectric layer. The electroplating seed includes an aluminum layer that connects to a diffusion region of the solar cell through a contact hole in the dielectric layer. A nickel layer is formed on the aluminum layer, with the nickel layer-aluminum layer stack forming the electroplating seed. The copper is electroplated in a copper plating bath that has methanesulfonic acid instead of sulfuric acid as the supporting electrolyte.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: February 3, 2015
    Assignee: SunPower Corporation
    Inventor: Joseph Frederick Behnke
  • Publication number: 20150031218
    Abstract: In a film forming apparatus (10), plasma-assisted ALD sequences are carried out to form a nitride film on a substrate (W) through the nitration of the silicon (Si) resulting from dichlorosilane (DCS), and then the first to fourth gas-feeding processes and plasma-feeding processes are successively carried out as plasma-assisted post-treatment. The gas to be fed in the first to fourth gas-feeding processes in the plasma-assisted post-treatment is a modifier gas consisting of either a gas selected from among N2, NH3, Ar and H2 or a mixed gas obtained by suitably mixing some of these gases. After the completion of the plasma-assisted ALD sequences, a plasma formed from the modifier gas is fed onto the nitride film on the substrate (W) to improve the film quality of the nitride film.
    Type: Application
    Filed: March 7, 2013
    Publication date: January 29, 2015
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Takayuki Karakawa
  • Patent number: 8940650
    Abstract: A method of fabricating an integrated circuit includes the steps of providing a semiconductor substrate comprising a semiconductor device disposed thereon and depositing a first silicon nitride layer over the semiconductor substrate and over the semiconductor device using a first deposition process. The first deposition process is a plasma-enhanced chemical vapor deposition (PECVD) process that operates over a plurality of cycles, each cycle having a first time interval and a second time interval. The PECVD process includes the steps of generating a plasma with a power source during the first time interval, the plasma comprising reactive ionic and radical species of a silicon-providing gas and a nitrogen-providing gas, and discontinuing generating the plasma during the second time interval immediately subsequent to the first time interval. The method further includes depositing a second silicon nitride layer over the first silicon nitride layer after the plurality of cycles.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: January 27, 2015
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Huy Cao, Huang Liu, Hoong Shing Wong, Songkram Srivathanakul, Sandeep Gaan
  • Publication number: 20150004805
    Abstract: A method of forming a silicon-containing dielectric material. The method includes forming a plasma comprising nitrogen radicals, absorbing the nitrogen radicals onto a substrate, and exposing the substrate to a silicon-containing precursor in a non-plasma environment to form monolayers of a silicon-containing dielectric material on the substrate. Additional methods are also described, as are semiconductor device structures including the silicon-containing dielectric material and methods of forming the semiconductor device structures.
    Type: Application
    Filed: July 1, 2013
    Publication date: January 1, 2015
    Inventors: Thomas R. Omstead, Cole S. Franklin
  • Patent number: 8900899
    Abstract: Novel processing methods for production of high-refractive index contrast and low loss optical waveguides are disclosed. In one embodiment, a “channel” waveguide is produced by first depositing a lower cladding material layer with a low refractive index on a base substrate, a refractory metal layer, and a top diffusion barrier layer. Then, a trench is formed with an open surface to the refractory metal layer. The open surface is subsequently oxidized to form an oxidized refractory metal region, and the top diffusion barrier layer and the non-oxidized refractory metal region are removed. Then, a low-refractive-index top cladding layer is deposited on this waveguide structure to encapsulate the oxidized refractory metal region. In another embodiment, a “ridge” waveguide is produced by using similar process steps with an added step of depositing a high-refractive-index material layer and an optional optically-transparent layer.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: December 2, 2014
    Inventor: Payam Rabiei
  • Patent number: 8901015
    Abstract: A method and apparatus for depositing a material layer, such as encapsulating film, onto a substrate is described. In one embodiment, an encapsulating film formation method includes delivering a gas mixture into a processing chamber, the gas mixture comprising a silicone-containing gas, a first nitrogen-containing gas, a second nitrogen-containing gas and hydrogen gas; energizing the gas mixture within the processing chamber by applying between about 0.350 watts/cm2 to about 0.903 watts/cm2 to a gas distribution plate assembly spaced about 800 mils to about 1800 mils above a substrate positioned within the processing chamber; maintaining the energized gas mixture within the processing chamber at a pressure of between about 0.5 Torr to about 3.0 Torr; and depositing an inorganic encapsulating film on the substrate in the presence of the energized gas mixture. In other embodiments, an organic dielectric layer is sandwiched between inorganic encapsulating layers.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: December 2, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Jrjyan Jerry Chen, Tae K. Won, Beom Soo Park, Young Jin Choi, Soo Young Choi
  • Patent number: 8889568
    Abstract: Disclosed are: a method for producing a silicon nitride film, wherein generation of blisters at the periphery of a substrate is suppressed when a silicon nitride film is formed through application of a bias power; and an apparatus for producing a silicon nitride film. Specifically disclosed are a method and apparatus for producing a silicon nitride film, wherein a silicon nitride film used for a semiconductor element is formed on a substrate by plasma processing. In the method and apparatus for producing a silicon nitride film, a bias is applied to the substrate at time (b1), and a starting material gas SiH4 for the silicon nitride film is started to be supplied at time (b3) after the application of the bias.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: November 18, 2014
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Seiji Nishikawa, Hidetaka Kafuku, Tadashi Shimazu
  • Patent number: 8883624
    Abstract: Memory cells including embedded SONOS based non-volatile memory (NVM) and MOS transistors and methods of forming the same are described. Generally, the method includes: forming a gate stack of a NVM transistor in a NVM region of a substrate including the NVM region and a plurality of MOS regions; and depositing a high-k dielectric material over the gate stack of the NVM transistor and the plurality of MOS regions to concurrently form a blocking dielectric comprising the high-k dielectric material in the gate stack of the NVM transistor and high-k gate dielectrics in the plurality of MOS regions. In one embodiment, a first metal layer is deposited over the high-k dielectric material and patterned to concurrently form a metal gate over the gate stack of the NVM transistor, and a metal gate of a field effect transistor in one of the MOS regions.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: November 11, 2014
    Assignee: Cypress Semiconductor Corporation
    Inventor: Krishnaswamy Ramkumar
  • Publication number: 20140302689
    Abstract: Methods for depositing flowable dielectric films are provided. In some embodiments, the methods involve introducing a silicon-containing precursor to a deposition chamber wherein the precursor is characterized by having a partial pressure:vapor pressure ratio between 0.01 and 1. In some embodiments, the methods involve depositing a high density plasma dielectric film on a flowable dielectric film. The high density plasma dielectric film may fill a gap on a substrate. Also provided are apparatuses for performing the methods.
    Type: Application
    Filed: April 9, 2014
    Publication date: October 9, 2014
    Applicant: Novellus Systems, Inc.
    Inventors: Kaihan Ashtiani, Michael Wood, John Drewery, Naohiro Shoda, Bart van Schravendijk, Lakshminarayana Nittala, Nerissa Draeger
  • Patent number: 8853100
    Abstract: According to an embodiment of present disclosure, a film formation method is provided. The film formation method includes supplying a first process gas as a source gas for obtaining a reaction product to a substrate while rotating a turntable and revolving the substrate, and supplying a second process gas as a gas for nitriding the first process gas adsorbed to the substrate to the substrate in a position spaced apart along a circumferential direction of the turntable from a position where the first process gas is supplied to the substrate. Further, the film formation method includes providing a separation region along the circumferential direction of the turntable between a first process gas supply position and a second process gas supply position, and irradiating ultraviolet rays on a molecular layer of the reaction product formed on the substrate placed on the turntable to control stresses generated in a thin film.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: October 7, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masanobu Igeta, Jun Sato, Kazuo Yabe, Hitoshi Kato, Yusaku Izawa
  • Patent number: 8846536
    Abstract: Provided herein are integration-compatible dielectric films and methods of depositing and modifying them. According to various embodiments, the methods can include deposition of flowable dielectric films targeting specific film properties and/or modification of those properties with an integration-compatible treatment process. In certain embodiments, methods of depositing and modifying flowable dielectric films having tunable wet etch rates and other properties are provided. Wet etch rates can be tuned during integration through am integration-compatible treatment process. Examples of treatment processes include plasma exposure and ultraviolet radiation exposure.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: September 30, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Nerissa Draeger, Karena Shannon, Bart van Schravendijk, Kaihan Ashtiani
  • Publication number: 20140273530
    Abstract: Provided are methods post deposition treatment of films comprising SiN. Certain methods pertain to providing a film comprising SiN; and exposing the film to an inductively coupled plasma, capacitively coupled plasma or a microwave plasma to provide a treated film with a modulated film stress and/or wet etch rate in dilute HF. Certain other methods comprise depositing a PEALD SiN film followed by exposure to a plasma nitridation process or a UV treatment to provide a treated film.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Inventors: Victor Nguyen, Isabelita Roflox, Mihaela Balseanu, Li-Qun Xia, Heng Pan, Wei Liu, Malcolm J. Bevan, Christopher S. Olsen, Johanes F. Swenberg
  • Publication number: 20140273529
    Abstract: Provided are methods of for deposition of SiN films via PEALD processes. Certain methods pertain to exposing a substrate surface to a silicon precursor to provide a silicon precursor at the substrate surface; purging excess silicon precursor; exposing the substrate surface to an ionized reducing agent; and purging excess ionized reducing agent to provide a film comprising SiN, wherein the substrate has a temperature of 23° C. to about 550° C.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Inventors: Victor Nguyen, Woong Jae Lee, Mihaela Balseanu, Li-Qun Xia, Derek R. Witty
  • Publication number: 20140273528
    Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: ASM IP HOLDING B.V.
    Inventors: Antti J. Niskanen, Shang Chen, Viljami Pore
  • Publication number: 20140273527
    Abstract: The present invention relates to methods of forming silicon nitride thin films on a substrate in a reaction chamber by plasma enhanced atomic layer deposition (PEALD). Exemplary methods include the steps of (i) introducing an octahalotrisilane Si3X8 silicon precursor, such as octachlorotrisilane (OCTS) Si3Cl8, into a reaction space containing a substrate, (ii) introducing a nitrogen containing plasma into the reaction space, and wherein steps (i), (ii) and any steps in between constitute one cycle, and repeating said cycles a plurality of times until an atomic layer nitride film having a desired thickness is obtained.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventors: Antti Niskanen, Suvi Haukka, Jaakko Anttila
  • Patent number: 8828890
    Abstract: Provided is a method of depositing a cyclic thin film that can provide excellent film properties and step coverage. The method comprises the steps of forming a silicon thin film by repeating a silicon deposition step for depositing silicon on a substrate by injecting a silicon precursor into a chamber into which the substrate is loaded and a first purge step for removing a non-reacted silicon precursor and a reacted byproduct from the chamber; and forming the insulating film including silicon from the silicon thin film by forming a plasma atmosphere into the chamber.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: September 9, 2014
    Assignee: Eugene Technology Co., Ltd.
    Inventors: Hai Won Kim, Sang Ho Woo
  • Patent number: 8822313
    Abstract: Embodiments provided herein describe methods and systems for processing substrates. A plasma including radical species and charged species is generated. The charged species of the plasma are collected. A substrate is exposed to the radical species of the plasma. A layer is formed on the substrate after exposing the substrate to the radical species.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: September 2, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Chi-I Lang, Sandip Niyogi
  • Publication number: 20140242814
    Abstract: Disclosed is a method of forming a nitride film on an object to be processed (“processed object”). The method includes: exposing the processed object to dichlorosilane which is a The method includes a step (step (a)) of exposing the processed object to dichlorosilane which is a precursor gas and a step (step (b)) of exposing the processed object to plasma of a processing gas which includes an ammonia gas and a hydrogen gas after step (a). Alternatively, step (a) and step (b) may be alternately repeated and a step of removing dichlorosilane (step (c)) may be further provided between step (a) and step (b).
    Type: Application
    Filed: February 24, 2014
    Publication date: August 28, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Takayuki KARAKAWA
  • Patent number: 8809207
    Abstract: A pattern-forming method for forming a predetermined pattern serving as a mask when etching film on a substrate includes the steps of: an organic film pattern-forming step for forming an organic film pattern on a film to be processed; forming a silicon nitride film on the organic film pattern; etching the silicon nitride film so that the silicon nitride film remains only on the lateral wall sections of the organic film pattern; and removing the organic film, thereby forming the predetermined silicon nitride film pattern on the film to be processed on a substrate. With the temperature of the substrate maintained at no more than 100° C., the film-forming step excites a processings gas and generates a plasma, performs plasma processing with the plasma, and forms a silicon nitride film having stress of no more than 100 MPa.
    Type: Grant
    Filed: February 20, 2012
    Date of Patent: August 19, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Hiraku Ishikawa, Teruyuki Hayashi, Takaaki Matsuoka, Yuji Ono
  • Patent number: 8784951
    Abstract: A method of forming an insulation film on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: (i) adsorbing a non-excited non-halide precursor having four or more silicon atoms in its molecule onto a substrate placed in a reaction space; (ii) supplying an oxygen-free reactant to the reaction space without applying RF power so as to expose the precursor-adsorbed substrate to the reactant; and (iii) after step (ii), applying RF power to the reaction space while the oxygen-free reactant is supplied in the reaction space; and (iv) repeating steps (i) to (iii) as a cycle, thereby depositing an insulation film on the substrate.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: July 22, 2014
    Assignee: ASM IP Holding B.V.
    Inventors: Atsuki Fukazawa, Hideaki Fukuka
  • Patent number: 8765233
    Abstract: A method of forming a low-carbon silicon-containing film by CVD on a substrate having trenches includes: introducing a silicon-containing compound having three or less hydrocarbon units in its molecule and having a boiling temperature of 35° C. to 220° C.; applying RF power to the gas; and depositing a film on a substrate having trenches wherein the substrate is controlled at a temperature such that components of the silicon-containing compound are at least partially liquidified on the substrate, thereby filling the trenches with the film.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: July 1, 2014
    Assignee: ASM Japan K.K.
    Inventors: Atsuki Fukazawa, Hisashi Tazawa, Shigeyuki Onizawa
  • Patent number: 8753989
    Abstract: High tensile stress in a deposited layer, such as a silicon nitride layer, may be achieved utilizing one or more techniques employed either alone or in combination. In one embodiment, a silicon nitride film having high tensile stress may be formed by depositing the silicon nitride film in the presence of a porogen. The deposited silicon nitride film may be exposed to at least one treatment selected from a plasma or ultraviolet radiation to liberate the porogen. The silicon nitride film may be densified such that a pore resulting from liberation of the porogen is reduced in size, and Si—N bonds in the silicon nitride film are strained to impart a tensile stress in the silicon nitride film. In another embodiment, tensile stress in a silicon nitride film may be enhanced by depositing a silicon nitride film in the presence of a nitrogen-containing plasma at a temperature of less than about 400° C., and exposing the deposited silicon nitride film to ultraviolet radiation.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: June 17, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Michael S. Cox, Li-Qun Xia, Mei-Yee Shek, Jia Lee, Vladimir Zubkov, Tzu-Fang Huang, Rongping Wang, Isabelita Roflox, Hichem M'Saad