Utilizing Electromagnetic Or Wave Energy (e.g., Photo-induced Deposition, Plasma, Etc.) Patents (Class 438/792)
  • Patent number: 7816272
    Abstract: A process of cleaning a semiconductor manufacturing system, and a method of manufacturing a semiconductor device. The cleaning process includes, for example, positioning a ceramic cover on the electrostatic chuck in tight contact with the chuck, and feeding a fluoride-based cleaning gas into a chamber. After the cleaning process, a process of forming a semiconductor film (deposition process) is performed. It is possible to prevent fluorine degasification from a substrate-supporting electrode (electrostatic chuck) during the deposition process. A semiconductor film can be formed without causing a temperature drop near the substrate. This prevents irregular film thickness, defective etching, film flaking, etc.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: October 19, 2010
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hiroomi Tsutae
  • Patent number: 7816205
    Abstract: A flash memory device and method of forming a flash memory device are provided. The flash memory device includes a silicon nitride layer having a compositional gradient in which the ratio of silicon to nitrogen varies through the thickness of the layer. The silicon nitride layer having a compositional gradient of silicon and nitrogen provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: October 19, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Vladimir Zubkov, Li-Qun Xia, Atif Noori, Reza Arghavani, Derek R. Witty, Amir Al-Bayati
  • Patent number: 7811945
    Abstract: A selective plasma processing method, within a processing chamber of a plasma processing apparatus, acts oxygen-containing plasma on a target object having silicon and a silicon nitride layer to selectively oxidize the silicon with respect to the silicon nitride layer and to form a silicon oxide film. Further, the ratio of a thickness of a silicon oxynitride film formed within the silicon nitride layer to a thickness of the silicon oxide film formed by the oxidization is equal to or smaller than 20%.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: October 12, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Masaru Sasaki
  • Patent number: 7807586
    Abstract: A method for forming a stressed passivation film. In one embodiment, the method includes depositing a silicon nitride film over an integrated circuit structure on a substrate and embedding oxygen into a surface of the silicon nitride film by exposing the silicon nitride film to a process gas containing oxygen radicals formed by non-ionizing electromagnetic radiation induced dissociation of an oxygen-containing gas or an oxygen- and nitrogen-containing gas. The method further includes heat-treating the oxygen-embedded silicon nitride film to form a stressed silicon oxynitride film.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: October 5, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D Clark
  • Patent number: 7803722
    Abstract: A method for forming a semiconductor structure includes reacting a silicon precursor and an atomic oxygen or nitrogen precursor at a processing temperature of about 150° C. or less to form a silicon oxide or silicon-nitrogen containing layer over a substrate. The silicon oxide or silicon-nitrogen containing layer is ultra-violet (UV) cured within an oxygen-containing environment.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: September 28, 2010
    Assignee: Applied Materials, Inc
    Inventor: Jingmei Liang
  • Patent number: 7803706
    Abstract: Disclosed is a semiconductor device manufacturing method in which a silicon nitride film is formed to cover an n-channel transistor formed on a semiconductor substrate and to apply a tensile stress in a channel length direction to a channel of the n-channel transistor, the method includes: forming a first-layer silicon nitride film above the n-channel transistor; irradiating the first-layer silicon nitride film with ultraviolet radiation; and after the ultraviolet irradiation, forming at least one silicon nitride film thinner than the first-layer silicon nitride film above the first-layer silicon nitride film. Silicon nitride films formed to apply the tensile stress is formed by respective steps.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: September 28, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiaki Idaka, Kazuyuki Yahiro
  • Patent number: 7799632
    Abstract: One embodiment of the present invention relates to a method of forming an isolation structure. During this method, an isolation trench is formed within a semiconductor body. After this trench is formed, it is filled by performing multiple high-frequency plasma depositions to deposit multiple dielectric layers over the semiconductor body. A first of the multiple layers is deposited at a high-frequency power of between approximately 100 watts and approximately 900 watts.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: September 21, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Jin Zhao, Manuel Quevedo-Lopez, Louis H. Breaux
  • Patent number: 7799706
    Abstract: A neutral beam-assisted atomic layer chemical vapor deposition (ALCVD) apparatus is provided for uniformly depositing an oxide layer filling a planarization layer or a trench to increase uniformity and density of the oxide layer using neutral beams generated by a neutral beam generator without a seam or void occurring in an atomic layer deposition (ALD) or ALD-like chemical vapor deposition (CVD) process, thereby solving problems on the void or seam and low density occurring when a high-density planarization layer or a shallow trench having a width of 65 nm or less is formed, and improving a next generation oxide layer isolation process.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: September 21, 2010
    Assignee: Sungkyunkwan University Foundation for Corporate Collaboration
    Inventors: Geun-young Yeom, Byoung-jae Park, Sung-woo Kim, Jong-tae Lim
  • Publication number: 20100233887
    Abstract: A production method for a semiconductor device comprising the first step of supplying a first reaction material to a substrate housed in a processing chamber to subject to a ligand substitution reaction a ligand as a reaction site existing on the surface of the substrate and the ligand of the first reaction material, the second step of removing the excessive first reaction material from the processing chamber, the third step of supplying a second reaction material to the substrate to subject a ligand substituted by the first step to a ligand substitution reaction with respect to a reaction site, the fourth step of removing the excessive second reaction material from the processing chamber, and a fifth step of supplying a third reaction material excited by plasma to the substrate to subject a ligand, not subjected to a substitution reaction with respect to a reaction site in the third step, to a ligand substitution reaction with respect to a reaction site, wherein the steps 1-5 are repeated a specified number
    Type: Application
    Filed: May 27, 2010
    Publication date: September 16, 2010
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hironobu Miya, Kazuyuki Toyoda, Norikazu Mizuno, Taketoshi Sato, Masanori Sakai, Masayuki Asai, Kazuyuki Okuda, Hideki Horita
  • Patent number: 7793611
    Abstract: An apparatus for depositing a solid film onto a substrate from a reagent solution includes a reservoir of solution maintained at a low temperature to inhibit homogeneous reactions. The solution contains multiple ligands to control temperature stability and shelf life. The chilled solution is periodically dispensed onto a substrate positioned in a holder having a raised peripheral structure that retains a controlled volume of solution over the substrate. The solution is periodically replenished so that only the part of the solution directly adjacent to the substrate is heated. A heater maintains the substrate at an elevated temperature at which the deposition of a desired solid phase from the solution may be initiated. The apparatus may also dispense excess chilled solution to cool various components within the apparatus and minimize nucleation of solids in areas other than on the substrate. The apparatus is particularly suited to forming films of II-VI semiconductors.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: September 14, 2010
    Assignee: Sisom Thin Films LLC
    Inventor: Isaiah O. Oladeji
  • Patent number: 7790635
    Abstract: A method for forming a compressive stress carbon-doped silicon nitride layer is provided. The method includes forming an initiation layer and a bulk layer thereon, wherein the bulk layer has a compressive stress of between about ?0.1 GPa and about ?10 GPa. The initiation layer is deposited from a gas mixture that includes a silicon and carbon-containing precursor and optionally a nitrogen and/or source but does not include hydrogen gas. The bulk layer is deposited from a gas mixture that includes a silicon and carbon-containing precursor, a nitrogen source, and hydrogen gas. The initiation layer is a thin layer that allows good transfer of the compressive stress of the bulk layer therethrough to an underlying layer, such as a channel of a transistor.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: September 7, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Mihaela Balseanu, Victor T. Nguyen, Li-Qun Xia, Vladimir Zubkov, Derek R. Witty, Hichem M'Saad
  • Patent number: 7790478
    Abstract: In remote plasma cleaning, it is difficult to locally excite a plasma because the condition is not suitable for plasma excitation different from that at the time of film formation and a method using light has a problem of fogginess of a detection window that cannot be avoided in a CVD process and is not suitable for a mass production process.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: September 7, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Kazuyuki Fujii, Minoru Hanazaki, Gen Kawaharada, Masakazu Taki, Mutsumi Tsuda
  • Patent number: 7790628
    Abstract: A method is provided for depositing a high dielectric constant (high-k) film for integrated circuits (ICs) by atomic layer deposition (ALD) or chemical vapor deposition (CVD). The method includes exposing a substrate to one or more metal precursors and plurality of oxidation sources to deposit a high-k film with a desired thickness and tailored properties. The plurality of oxidation sources contain a first oxidation source containing H2O, H2O2, or a combination thereof, and a second oxidation source containing oxygen radicals (O), O3, or O2, or a combination of two or more thereof. The high-k film may contain one or more metal elements selected from alkaline earth elements, rare earth elements, and Group IVB elements of the Periodic Table of the Elements.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: September 7, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Robert D Clark, Lisa F Edge
  • Publication number: 20100221925
    Abstract: A method of forming a conformal dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced chemical vapor deposition (PECVD) includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which a semiconductor substrate is placed; applying RF power to the reaction space; and introducing a hydrogen-containing silicon precursor as a first precursor and a hydrocarbon gas as a second precursor in pulses into the reaction space wherein a plasma is excited, thereby forming a conformal dielectric film doped with carbon and having Si—N bonds on the substrate.
    Type: Application
    Filed: May 12, 2010
    Publication date: September 2, 2010
    Applicant: ASM JAPAN K.K.
    Inventors: Woo Jin Lee, Akira Shimizu
  • Patent number: 7781352
    Abstract: A method of forming an inorganic silazane-based dielectric film includes: introducing a gas constituted by Si and H and a gas constituted by N and optionally H into a reaction chamber where an object is placed; controlling a temperature of the object at ?50° C. to 50° C.; and depositing by plasma reaction a film constituted by Si, N, and H containing inorganic silazane bonds.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: August 24, 2010
    Assignee: ASM Japan K.K.
    Inventors: Atsuki Fukazawa, Nobuo Matsuki, Jeongseok Ha
  • Publication number: 20100210081
    Abstract: A method for forming a tensile SiN stress layer for stress memorization enhancement of NMOS transistors with a high Si—H/N—H bond ratio that does not degrade PMOS transistors.
    Type: Application
    Filed: August 14, 2009
    Publication date: August 19, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kanan GARG, Haowen BU, Mahalingam NANDAKUMAR, Song ZHAO
  • Patent number: 7767538
    Abstract: It is made possible to form a silicon nitride film, an aluminum oxide film and a transition metal high-k insulation film of high quality. A manufacturing method includes: forming an insulation film having at least one kind of bonds selected out of silicon-nitrogen bonds, aluminum-oxygen bonds, transition metal-oxygen-silicon bonds, transition metal-oxygen-aluminum bonds, and transition metal-oxygen bonds on either a film having a semiconductor as a main component or a semiconductor substrate, and irradiating the insulation film with pulse infrared light having a wavelength corresponding to a maximum intensity in a wavelength region depending upon the insulation film and having a wavelength absorbed by the insulation film.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: August 3, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hirotaka Nishino, Koichi Kato
  • Patent number: 7763551
    Abstract: Film thickness uniformity and stoichiometry are controlled and deposition rate is increased in the chemical vapor deposition (CVD) of silicon nitride from complex gas mixtures in microwave plasmas. In Si2H6+NH3+Ar gas mixtures using a radial line slot antenna (RLSA) microwave plasma to deposit SiN by CVD, deposition rate and film uniformity are improved by limiting the amounts of atomic or molecular hydrogen from the gas mixture during the deposition process. A halogen, for example, fluorine, is added to a gas mixture of silane or disilane, ammonia and argon. The halogen scavenges hydrogen from the mixture, and prevents the hydrogen from blocking the nitrogen and silicon atoms and their fragments from bonding to the surface atoms and to grow stoichiometric silicon nitride. Adding the halogen generates free halogen radicals that react with hydrogen to create hydrogen halide, for example, HF or HCl, thereby scavenging the hydrogen.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: July 27, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Jozef Brcka, Song Yun Kang, Toshio Nakanishi, Peter L. G. Ventzek, Minoru Honda, Masayuki Kohno
  • Publication number: 20100184302
    Abstract: A method of forming a conformal dielectric film having Si—N bonds on a semiconductor substrate by plasma enhanced chemical vapor deposition (PECVD) includes: introducing a nitrogen- and hydrogen-containing reactive gas and an additive gas into a reaction space inside which a semiconductor substrate is placed; applying RF power to the reaction space; and introducing a hydrogen-containing silicon precursor in pulses into the reaction space wherein a plasma is excited, thereby forming a conformal dielectric film having Si—N bonds on the substrate.
    Type: Application
    Filed: January 21, 2009
    Publication date: July 22, 2010
    Applicant: ASM Japan K.K.
    Inventors: Woo Jin LEE, Akira Shimizu, Atsuki Fukazawa
  • Patent number: 7745346
    Abstract: A method for forming a silicon-based dielectric film on a substrate with a single deposition process operation using pulsed plasma enhanced chemical vapor deposition (PECVD) wherein the high frequency radio frequency power of the plasma is pulsed, allows enhanced control, efficiency and product quality of the PECVD process. Pulsing the high frequency RF power of the plasma reduces the deposited film thickness per unit time the high frequency RF power of the plasma is on. This yields silicon-based dielectric films that are both thin and conformal.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: June 29, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Dennis Hausmann, James S. Sims, Andrew Antonelli, Sesha Varadarajan, Bart Van Schravendijk
  • Publication number: 20100140683
    Abstract: Provided is a silicon nitride film which has an excellent charge storage capacity and thus is useful as a charge storage layer of a semiconductor memory device. The silicon nitride film having substantially uniform trap density in the film thickness direction has high charge storage performance. The silicon nitride film is formed by plasma CVD by using a plasma processing apparatus (100), wherein microwaves are introduced into a chamber (1) by a plane antenna having a plurality of holes, plasma is generated by the microwaves while a source gas including nitrogen-containing compound and silicon-containing compound is introduced into the chamber (1), and the silicon nitride film is deposited on the surface of a processing object by the plasma.
    Type: Application
    Filed: March 26, 2008
    Publication date: June 10, 2010
    Applicants: TOKYO ELECTRON LIMITED, HIROSHIMA UNIVERSITY
    Inventors: Seiichi Miyazaki, Masayuki Kohno, Tatsuo Nishita, Toshio Nakanishi, Yoshihiro Hirota
  • Patent number: 7732324
    Abstract: One aspect of the invention provides a method of forming a semiconductor device (100). One aspect includes forming transistors (120, 125) on a semiconductor substrate (105), forming a first interlevel dielectric layer (165) over the transistors (120, 125), and forming metal interconnects (170, 175) within the first interlevel dielectric layer (165). A carbon-containing gas is used to form a silicon carbon nitride (SiCN) layer (180) over the metal interconnects (170, 175) and the first interlevel dielectric layer (165) within a deposition tool. An adhesion layer (185) is formed on the SiCN layer (180), within the deposition tool, by discontinuing a flow of the carbon-containing gas within the deposition chamber. A second interlevel dielectric layer (190) is formed over the adhesion layer (185).
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: June 8, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Ju-Ai Ruan, Sameer K. Ajmera, Changming Jin, Anand J. Reddy, Tae S. Kim
  • Patent number: 7727864
    Abstract: Metallic-compound films are formed by plasma-enhanced atomic layer deposition (PEALD). According to preferred methods, film or thin film composition is controlled by selecting plasma parameters to tune the oxidation state of a metal (or plurality of metals) in the film. In some embodiments, plasma parameters are selected to achieve metal-rich metallic-compound films. The metallic-compound films can be components of gate stacks, such as gate electrodes. Plasma parameters can be selected to achieve a gate stack with a predetermined work function.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: June 1, 2010
    Assignee: ASM America, Inc.
    Inventor: Kai-Erik Elers
  • Patent number: 7723218
    Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: May 25, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
  • Patent number: 7718553
    Abstract: A method for forming an insulation film on a semiconductor substrate by plasma reaction includes: introducing into a reaction chamber a source gas of a silicon-containing hydrocarbon compound comprising in its molecule at least one Si—O bond and at least one bond selected from the group consisting of a Si—Si bond, Si—N bond, and Si—H bond; introducing into the reaction chamber an additive gas constituted by C, H, and optionally O; controlling a susceptor at a temperature of ?50° C. to 50° C.; forming by plasma reaction an insulation film constituted by Si, O, H, and optionally N on an irregular surface of a substrate at a deposition rate of 100 nm/min or less; and heat-treating the substrate with the insulation film, thereby increasing a density of the insulation film to more than 2.1 g/cm3 as a result of the heat treatment.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: May 18, 2010
    Assignee: ASM Japan K.K.
    Inventors: Atsuki Fukazawa, Nobuo Matsuki
  • Patent number: 7713886
    Abstract: Disclosed is a film forming method using a film forming gas composed of a metal alkoxide wherein clean film formation suppressed in contamination of a target substrate to be processed is achieved by restraining aluminum or an aluminum alloy in the processing chamber from dissolving. Specifically disclosed is method for forming a thin film on a target substrate to be processed which is held in a processing chamber, and this method comprises a step for heating the target substrate and a step for supplying a film forming gas into the processing chamber. This method is characterized in that the film forming gas is composed of a metal alkoxide, the processing chamber is made of aluminum or an aluminum alloy, and a protective film composed of a nonporous anodic oxide film is formed on the inner wall surface of the processing chamber.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: May 11, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Hirokatsu Kobayashi, Tetsuya Nakano, Masato Koizumi
  • Publication number: 20100109067
    Abstract: Prior to deposition of a silicon nitride (SiN) layer on a structure, a non-plasma enhanced operation is undertaken wherein the structure is exposed to silane (SiH4) flow, reducing the overall exposure of the structure to hydrogen radicals. This results in the silicon nitride being strongly bonded to the structure and in improved performance.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 6, 2010
    Inventors: Sung Jin Kim, Alexander Nickel, Minh-Van Ngo, Hieu Trung Pham, Masato Tsuboi, Shinich Imada
  • Patent number: 7709866
    Abstract: In one embodiment of the invention, contact patterning may be divided into two or more passes which may allow designers to control the gate height critical dimension relatively independent from the contact top critical dimension.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: May 4, 2010
    Assignee: Intel Corporation
    Inventors: Nadia Rahhal-Orabi, Charles H. Wallace, Alison Davis, Swaminathan Sivakumar
  • Publication number: 20100096687
    Abstract: A flash memory device and methods of forming a flash memory device are provided. The flash memory device includes a doped silicon nitride layer having a dopant comprising carbon, boron or oxygen. The doped silicon nitride layer generates a higher number and higher concentration of nitrogen and silicon dangling bonds in the layer and provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.
    Type: Application
    Filed: October 21, 2008
    Publication date: April 22, 2010
    Inventors: Mihaela BALSEANU, Vladimir Zubkov, Li-Qun Xia, Atif Noori, Reza Arghavani, Derek R. Witty, Amir Al-Bayati
  • Patent number: 7687359
    Abstract: The present invention relates to a method for fabricating flash memory devices. The method may include the steps of forming an oxide/nitride/oxide (ONO) layer over a semiconductor substrate and a gate electrode on the ONO layer. Next, source/drain impurity region may be formed in a surface of the semiconductor substrate on both sides of the gate electrode and a pre-metal dielectric (PMD) layer may be formed over an entire surface of the semiconductor substrate including the gate electrode. Finally, a densification process for densifying the PMD layer may be performed under a gas atmosphere. A densification gas atmosphere used for densifying the PMD layer may include an H2 or N2/H2 atmosphere.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: March 30, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Dae Ho Jeong
  • Patent number: 7662730
    Abstract: A method for fabricating an ultra-high tensile-stressed nitride film is disclosed. A PECVD process is first performed to deposit a transitional silicon nitride film over a substrate. The transitional silicon nitride film has a first concentration of hydrogen atoms. The transitional silicon nitride film is subjected to UV curing process for reducing the first concentration of hydrogen atoms to a second concentration of hydrogen atoms.
    Type: Grant
    Filed: November 24, 2005
    Date of Patent: February 16, 2010
    Assignee: United Microelectronics Corp.
    Inventors: Neng-Kuo Chen, Teng-Chun Tsai, Chien-Chung Huang, Tsai-Fu Chen, Wen-Han Hung
  • Publication number: 20100029094
    Abstract: A method of forming a silicon nitride layer is described. According to the present invention, a silicon nitride layer is deposited by thermally decomposing a silicon/nitrogen containing source gas or a silicon containing source gas and a nitrogen containing source gas at low deposition temperatures to form a silicon nitride layer. The thermally deposited silicon nitride layer is then treated with hydrogen radicals to form a treated silicon nitride layer.
    Type: Application
    Filed: October 13, 2009
    Publication date: February 4, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Shulin Wang, Errol Antonio Sanchez, Aihua Chen
  • Patent number: 7651959
    Abstract: A method of forming a dielectric film includes: introducing a source gas essentially constituted by Si, N, H, and optionally C and having at least one bond selected from Si—N, Si—Si, and Si—H into a reaction chamber where a substrate is placed; depositing a silazane-based film essentially constituted by Si, N, H, and optionally C on the substrate by plasma reaction at ?50° C. to 50° C., wherein the film is free of exposure of a solvent constituted essentially by C, H, and optionally O; and heat-treating the silazane-based film on the substrate in a heat-treating chamber while introducing an oxygen-supplying source into the heat-treating chamber to release C from the film and increase Si—O bonds in the film.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: January 26, 2010
    Assignee: ASM Japan K.K.
    Inventors: Atsuki Fukazawa, Jeongseok Ha, Nobuo Matsuki
  • Patent number: 7651961
    Abstract: A method for forming a strained SiN film and a semiconductor device containing the strained SiN film. The method includes exposing the substrate to a gas including a silicon precursor, exposing the substrate to a gas containing a nitrogen precursor activated by a plasma source at a first level of plasma power and configured to react with the silicon precursor with a first reactivity characteristic, and exposing the substrate to a gas containing the nitrogen precursor activated by the plasma source at a second level of plasma power different from the first level and configured to react with the silicon precursor with a second reactivity characteristic such that a property of the silicon nitride film formed on the substrate changes to provide the strained silicon nitride film.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 26, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Robert D. Clark
  • Patent number: 7651956
    Abstract: A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The process includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature within the reaction chamber facilitates temperature uniformity across the semiconductor wafer. As a result, a layer forming reaction occurs at a substantially consistent rate over the entire active surface of the semiconductor substrate. The process may also include oscillating the temperature within the reaction chamber while a layer of a material is being formed upon a semiconductor substrate.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: January 26, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Garry Anthony Mercaldi, Don Carl Powell
  • Patent number: 7648927
    Abstract: Embodiments of the invention generally provide a method for depositing films or layers using a UV source during a photoexcitation process. The films are deposited on a substrate and usually contain a material, such as silicon (e.g., epitaxy, crystalline, microcrystalline, polysilicon, or amorphous), silicon oxide, silicon nitride, silicon oxynitride, or other silicon-containing materials. The photoexcitation process may expose the substrate and/or gases to an energy beam or flux prior to, during, or subsequent a deposition process. Therefore, the photoexcitation process may be used to pre-treat or post-treat the substrate or material, to deposit the silicon-containing material, and to enhance chamber cleaning processes.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: January 19, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Joseph M. Ranish
  • Patent number: 7645709
    Abstract: Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. In some embodiments, a method of forming an oxide layer on a semiconductor substrate includes placing a substrate to be oxidized on a substrate support in a vacuum chamber of a plasma reactor, the chamber having an ion generation region remote from the substrate support; introducing a process gas into the chamber, the process gas comprising at least one of hydrogen (H2) and oxygen (O2)—provided at a flow rate ratio of hydrogen (H2) to oxygen (O2) of up to about 3:1—or water vapor (H2O vapor); and generating an inductively coupled plasma in the ion generation region of the chamber to form a silicon oxide layer on the substrate.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Thai Cheng Chua, James P. Cruse, Cory Czarnik
  • Patent number: 7629273
    Abstract: A method for forming a semiconductor structure includes providing a substrate comprising a first device region, forming a metal-oxide-semiconductor (MOS) device in the first device region, forming a stressed layer over the MOS device, and performing a post-treatment to modulate a stress of the stressed layer. The post-treatment is selected from the group consisting essentially of ultra-violet (UV) curing, laser curing, e-Beam curing, and combinations thereof.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: December 8, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Hung Chun Tsai, Hui-Lin Chang, Ting-Yu Shen, Yung-Cheng Lu
  • Publication number: 20090283874
    Abstract: Disclosed is a semiconductor device manufacturing method in which a silicon nitride film is formed to cover an n-channel transistor formed on a semiconductor substrate and to apply a tensile stress in a channel length direction to a channel of the n-channel transistor, the method includes: forming a first-layer silicon nitride film above the n-channel transistor; irradiating the first-layer silicon nitride film with ultraviolet radiation; and after the ultraviolet irradiation, forming at least one silicon nitride film thinner than the first-layer silicon nitride film above the first-layer silicon nitride film. Silicon nitride films formed to apply the tensile stress is formed by respective steps.
    Type: Application
    Filed: March 20, 2009
    Publication date: November 19, 2009
    Inventors: Toshiaki IDAKA, Kazuyuki Yahiro
  • Patent number: 7618548
    Abstract: We have developed an uncomplicated method of plasma etching deeply recessed features such as deep trenches, of at least 5 ?m in depth, in a silicon-containing substrate, in a manner which generates smooth sidewalls, having a roughness of less than about 1 ?m, typically less than about 500 nm, and even more typically between about 100 nm and 20 nm. Features having a sidewall taper angle, relative to an underlying substrate, typically ranges from about 85° to about 92° and exhibiting the smooth sidewalls are produced by the method. In one embodiment, a stabilizing etchant species is used constantly during the plasma etch process, while at least one other etchant species and at least one polymer depositing species are applied intermittently, typically periodically, relative to each other. In another embodiment, the stabilizing etchant species is used constantly and a mixture of the other etchant species and polymer depositing species is used intermittently.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: November 17, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey D. Chinn, Michael Rattner, Nicholas Pornsin-Sirirak, Yanping Li
  • Patent number: 7601619
    Abstract: A method and an apparatus for plasma processing which can accurately monitor an ion current applied to the surface of a sample. Predetermined gas is exhausted via an exhaust port by a turbo-molecular pump while introducing the gas within the vacuum chamber from a gas supply device, and the pressure within the vacuum chamber is kept at a predetermined value by a pressure regulating valve. A high-frequency power supply for a plasma source supplies a high-frequency power to a coil provided near a dielectric window to generate inductively coupled plasma within the vacuum chamber. A high-frequency power supply for the sample electrode for supplying the high-frequency power to the sample electrode is provided. A matching circuit for the sample electrode and a high-frequency sensor are provided between the sample electrode high-frequency power supply and the sample electrode. An ion current applied to the surface of a sample can be accurately monitored buy using the high-frequency sensor and an arithmetic device.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: October 13, 2009
    Assignee: Panasonic Corporation
    Inventors: Tomohiro Okumura, Yuichiro Sasaki, Katsumi Okashita, Hiroyuki Ito, Bunji Mizuno, Cheng-Guo Jin, Ichiro Nakayama
  • Patent number: 7601652
    Abstract: Embodiments of the invention generally provide a method for depositing films using photoexcitation. The photoexcitation may be utilized for at least one of treating the substrate prior to deposition, treating substrate and/or gases during deposition, treating a deposited film, or for enhancing chamber cleaning. In one embodiment, a method for depositing silicon and nitrogen-containing film on a substrate includes heating a substrate disposed in a processing chamber, generating a beam of energy of between about 1 to about 10 eV, transferring the energy to a surface of the substrate; flowing a nitrogen-containing chemical into the processing chamber, flowing a silicon-containing chemical with silicon-nitrogen bonds into the processing chamber, and depositing a silicon and nitrogen-containing film on the substrate.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: October 13, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Sean M. Seutter, Jacob Smith, R. Suryanarayanan Iyer, Steve G. Ghanayem, Adam Brailove, Robert Shydo, Jeannot Morin
  • Patent number: 7598562
    Abstract: A semiconductor device including a semiconductor substrate; an element isolation region having a trench filled with an insulating film defined on the semiconductor substrate; a memory cell transistor formed in an element forming region isolated by the element isolating regions of the semiconductor substrate; and the memory cell transistor includes a gate insulating film formed on a surface of the element forming region; a floating gate formed over the gate insulating film; an inter-gate insulating film formed integrally so as to cover the floating gate and the insulating film of the element isolation region and having high dielectric constant in a portion corresponding to the floating gate and low dielectric constant in a portion corresponding to the insulating film of the element isolation region; and a control gate stacked over the floating gate via the inter-gate insulating film.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: October 6, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nagano, Takeo Furuhata
  • Patent number: 7598184
    Abstract: A method for the selective removal of a high-k layer such as HfO2 over silicon or silicon dioxide is provided. More specifically, a method for etching high-k selectively over silicon and silicon dioxide and a plasma composition for performing the selective etch process is provided. Using a BCl3 plasma with well defined concentrations of nitrogen makes it possible to etch high-k with at a reasonable etch rate while silicon and silicon dioxide have an etch rate of almost zero. The BCl3 comprising plasmas have preferred additions of 10 up to 13% nitrogen. Adding a well defined concentration of nitrogen to the BCl3/N2 plasma gives the unexpected deposition of a Boron-Nitrogen (BxNy) comprising film onto the silicon and silicon dioxide which is not deposited onto the high-k material. Due to the deposition of the Boron-Nitrogen (BxNy) comprising film, the etch rate of silicon and silicon dioxide is dropped down to zero.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: October 6, 2009
    Assignee: IMEC
    Inventors: Denis Shamiryan, Vasile Paraschiv, Marc Demand
  • Publication number: 20090246974
    Abstract: A method for forming a stressed passivation film. In one embodiment, the method includes depositing a silicon nitride film over an integrated circuit structure on a substrate and embedding oxygen into a surface of the silicon nitride film by exposing the silicon nitride film to a process gas containing an oxygen-containing or an oxygen- and nitrogen-containing gas excited by plasma induced dissociation based on microwave irradiation via a plane antenna member having a plurality of slots, wherein the plane antenna member faces the substrate surface containing the silicon nitride film. The method further includes heat-treating the oxygen-embedded silicon nitride film to form a stressed silicon oxynitride film.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 1, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Robert D. Clark
  • Publication number: 20090246973
    Abstract: A method for forming a stressed passivation film. In one embodiment, the method includes depositing a silicon nitride film over an integrated circuit structure on a substrate and embedding oxygen into a surface of the silicon nitride film by exposing the silicon nitride film to a process gas containing oxygen radicals formed by non-ionizing electromagnetic radiation induced dissociation of an oxygen-containing gas or an oxygen- and nitrogen-containing gas. The method further includes heat-treating the oxygen-embedded silicon nitride film to form a stressed silicon oxynitride film.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 1, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Robert D. Clark
  • Patent number: 7592273
    Abstract: A method of forming a semiconductor device comprises providing a portion of a semiconductor device structure, wherein the portion includes a region susceptible to hydrogen incorporation due to subsequent device processing. For example, the subsequent device processing can include one or more of (i) forming a layer over the region, wherein the layer includes hydrogen and (ii) using gases containing hydrogen in a plasma for the subsequent device processing, wherein the semiconductor device is subject to an undesirable device characteristic alteration by hydrogen incorporation into the region. The method further comprises forming a hydrogen barrier layer overlying the region, wherein the hydrogen barrier layer prevents substantial migration of hydrogen made available due to the subsequent device processing into the underlying region. The method further includes performing the subsequent device processing.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: September 22, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Stanley M. Filipiak, Zhi-Xiong Jiang, Mehul D. Shroff
  • Patent number: 7592222
    Abstract: The present invention relates to a method of fabricating a flash memory device. According to a method of fabricating a flash memory device in accordance with an aspect of the present invention, a semiconductor substrate over which a tunnel insulating layer and a first conductive layer are formed is provided. A first oxide layer is formed on the first conductive layer using a plasma oxidization process in a state where a back bias voltage is applied. A nitride layer is formed on the first oxide layer. A second oxide layer is formed on the nitride layer. A second conductive layer is formed on the second oxide layer.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: September 22, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Eun Shil Park, Kwon Hong, Jae Hong Kim, Jae Hyoung Koo
  • Patent number: 7589027
    Abstract: Provided is a method of manufacturing a semiconductor device. A first gate oxide layer is formed on a semiconductor substrate in which a core region and an input/output region are defined. The first gate oxide layer of the core region is selectively removed, and a second gate oxide layer is formed under the first gate oxide layer of the input/output region and on the semiconductor substrate of the core region. Nitrogen annealing is performed to form a nitrogen-rich oxide layer under the second gate oxide layer. An additional thermal process is performed to diffuse nitrogen segregated on an interface between the first gate oxide layer and the second gate oxide layer of the input/output region to a surface of the semiconductor substrate. Impurities generated during the additional thermal process are discharged to the outside.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: September 15, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Young Seong Lee
  • Patent number: 7589031
    Abstract: A method of PECVD deposition of silicon-containing films has been discovered and further developed. The method is particularly useful when the films are deposited on substrates having surface areas which are larger than 25,000 cm2. The method prevents the deposition of partially reacted silicon-containing species which form a powdery material or haze (contaminant compound) on the substrate surface. The contaminant compounds are avoided by assuring that the power applied to form a plasma in the PECVD process is maintained, at least at a minimal level, until reactive silicon-containing precursor gases present above the surface of the substrate have been reacted or evacuated from the plasma processing area.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: September 15, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Suhail Anwar, Chung-Hee Park, Beom Soo Park, Han Byoul Kim, Soo Young Choi, John M. White