Abstract: Methods of forming 2D metal chalcogenide films using laser-assisted atomic layer deposition are disclosed. A direct-growth method includes: adhering a layer of metal-bearing molecules to the surface of a heated substrate; then reacting the layer of metal-bearing molecules with a chalcogenide-bearing radicalized precursor gas delivered using a plasma to form an amorphous 2D film of the metal chalcogenide; then laser annealing the amorphous 2D film to form a crystalline 2D film of the metal chalcogenide, which can have the form MX or MX2, where M is a metal and X is the chalcogenide. An indirect growth method that includes forming an MO3 film is also disclosed.

Abstract: A fabricating method of a flexible substrate is provided, including: step 1: fabricating a first flexible base; step 2: fabricating at least one layer of a laminated material made of silicon oxide and amorphous silicon on the first flexible base; step 3: performing a dehydrogenation treatment to the laminated material; and step 4: fabricating a second flexible base on the laminated material to obtain a flexible substrate. Compared with the prior art, by disposing two layers of flexible bases and a laminated material between the flexible bases, the stability of multiple bending can be improved; by performing a dehydrogenation treatment of the laminated material, the defects of the flexible substrate in the back-end process can be reduced.

Abstract: An apparatus and a method for implanting ions are disclosed. In an embodiment, the apparatus includes a receptacle configured to support the wafer, a source of dopants configured to selectively provide dopants to an implantation region of the wafer and a source of radiation configured to selectively irradiate the implantation region.

Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

Abstract: Eye tracking system incorporates and/or uses one or more silicon photomultiplier (SiPM) sensor and an infrared module of a microelectromechanical (MEMs)-based scanner. The infrared module emits a beam of photons, where at least some of the photons are directed towards a user's eye while the eye tracking system is being used. The SiPM sensor(s) capture a reflection that emanates off of the user's eye.

Abstract: A silicon carbide epitaxial film has a plurality of arc-shaped or annular basal plane dislocations and a plurality of threading dislocations. The plurality of threading dislocations have a first threading dislocation which is surrounded by the plurality of basal plane dislocations and a second threading dislocation which is not surrounded by the plurality of basal plane dislocations, when viewed from a direction perpendicular to a main surface. The plurality of basal plane dislocations and the first threading dislocation constitute an annular defect. An area density of the plurality of threading dislocations in the main surface is more than or equal to 50 cm?2. A value obtained by dividing an area density of the annular defect when viewed from the direction perpendicular to the main surface by the area density of the plurality of threading dislocations in the main surface is more than or equal to 0.00002 and less than or equal to 0.004.

Abstract: A novel display panel that can be used as a reflective display panel in an environment with strong external light and as a self-luminous display panel in a dim environment, for example and that has low power consumption and is highly convenient or reliable is provided. The display panel includes a pixel and a substrate that supports the pixel. The pixel includes a first display element (e.g., a reflective liquid crystal element) that includes a reflective film having an opening as a first conductive film and a second display element (e.g., an organic EL element) that emits light to the opening.

Abstract: Techniques herein include systems and methods for correcting pattern overlay errors by correcting or adjusting bowing of wafers. Location-specific tuning of stress on semiconductor substrates reduces overlay error. Location-specific tuning of stress independently modifies specific regions, areas, or point locations on a substrate to change wafer bow at those specific locations, which reduces overlay error on substrates, which in turn improves overlay of subsequent patterns created on the substrate. Techniques herein include receiving a substrate with some amount of overlay error, measuring bow of the substrate to map z-height deviations across the substrate, generating an overlay correction pattern, and then physically modifying internal stresses on the substrate at specific locations with modifications independent of other coordinate locations. Such modifications can include etching a backside surface of the substrate. One or more processing modules can be used for such processing.

Abstract: A semiconductor device includes a substrate, a first source/drain (S/D) region, a second S/D region, and a semiconductor sheet. The first S/D region is disposed on the substrate. The second S/D region is disposed above the first S/D region. The semiconductor sheet interconnects the first and second S/D regions and includes a plurality of turns. A method for fabricating the semiconductor device is also disclosed.

Abstract: A ceiling heat insulator installed above a side wall heat insulator of a heating apparatus for a substrate processing apparatus for processing a substrate is provided. The ceiling heat insulator includes a gas-flow path installed therein to allow a cooling gas to pass therethrough so that the ceiling heat insulator has a solid cross-sectional area in an outer edge side of the ceiling heat insulator that is smaller than that in a center side of the ceiling heat insulator.

Abstract: Disclosed is a method for manufacturing a thin film transistor. The method for manufacturing a thin film transistor includes: forming a patterned semiconductor layer and a patterned wiring layer on a substrate; and etching the wiring layer to form a channel part. Herein, the wiring layer includes a compensation layer and the compensation layer is formed from a material including a metal of a metal oxide component among components of a material forming the semiconductor layer.

Abstract: The yield of a manufacturing process of a semiconductor device is increased. The productivity of a semiconductor device is increased. A first material layer is formed over a substrate, a second material layer is formed over the first material layer, and the first material layer and the second material layer are separated from each other, so that a semiconductor device is manufactured. In addition, a stack including the first material layer and the second material layer is preferably heated before the separation. The first material layer includes one or more of hydrogen, oxygen, and water. The first material layer includes a metal oxide, for example. The second material layer includes a resin (e.g., polyimide or acrylic). The first material layer and the second material layer are separated from each other by cutting a hydrogen bond.

Abstract: A liquid immersion exposure apparatus includes a projection system, a liquid supply inlet, a first liquid collection outlet, and a separator fluidically connected to the first liquid collection outlet, the separator separating one of liquid and gas, which have been collected via the first liquid collection outlet, from the other. A stage which holds a substrate has a second liquid collection outlet that collects a portion of the liquid supplied from the liquid supply inlet which comes from a gap between an upper surface of the substrate and an upper surface of the stage.

Abstract: A method for preparing a porous dielectric is described. In particular, the method includes removing pore-filling agent from pores in a cured porous dielectric layer, wherein the pore-filling agent was back-filled within the pores following the removal of a pore-forming agent during a curing process. The removal of the pore-filling agent includes heating a substrate holder upon which the substrate rests to a holder temperature greater than 100 degrees C. and less than 400 degrees C., and while heating the substrate holder, exposing the substrate to electromagnetic (EM) radiation, wherein the EM radiation includes emission at a wavelengths within the ultraviolet (UV) spectrum, visible spectrum, infrared (IR) spectrum, or microwave spectrum, or combination thereof.

Abstract: A micromechanical resonator is disclosed. The resonator includes a resonant micromechanical element. A film of annealable material deposited on a facial surface of the element. In one instance, the resonance of the element can be adjusting by using a feedback loop to control annealing of the deposited film.

Abstract: The embodiments of the present disclosure provide an optical device and an excimer laser annealing equipment. The optical device includes: a light source; a transparent window spaced apart from the light source by a distance; and an optical system disposed between the light source and the transparent window. The transparent window is configured such that emergent light of the light source is vertically incident onto the transparent window after passing through the optical system.

Abstract: A method of focusing a telecentric imaging system (30), particularly as a part of a measuring machine (10) includes measuring an image of a feature (25) of an object (24) through the telecentric imaging system (30) in a telecentric operating mode and measuring an image of the feature (25) of the object (24) through the telecentric imaging system (30) in a non-telecentric operating mode. A value is acquired characterizing a function by which the size of the imaged feature varies in the non-telecentric mode with the relative displacement of the object (24) through the depth of field (D). The measures of the image of the feature (25) of the object (24) in the telecentric and non-telecentric modes are related to each other and to the acquired value as an estimate of a relative displacement of the object (24) from the best focus position.

Abstract: A semiconductor device includes a semiconductor fin, a first silicon nitride based layer, a lining oxide layer, a second silicon nitride based layer and a gate oxide layer. The semiconductor fin has a top surface, a first side surface adjacent to the top surface, and a second side surface which is disposed under and adjacent to the first side surface. The first silicon nitride based layer peripherally encloses the second side surface of the semiconductor fin. The lining oxide layer is disposed conformal to the first silicon nitride based layer. The second silicon nitride based layer is disposed conformal to the lining oxide layer. The gate oxide layer is disposed conformal to the top surface and the first side surface of the semiconductor fin.

Abstract: Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing.

Abstract: The present disclosure is related to a method of fabricating a semiconductor device involving the production of at least two non-parallel nano-scaled structures on a substrate. These structures are heated to different temperatures by exposing them simultaneously to polarized light having a wavelength and polarization such that a difference in absorption of light occurs in the first and second nanostructure. In some cases the light is polarized in a plane that is parallel to one of the structures. The present disclosure may provide differential heating of semiconductor structures of different materials, such as Ge and Si fins.

Abstract: A method of patterning a device includes forming a fluorinated photopolymer layer over a device substrate. The photopolymer layer has a lower portion proximate the device substrate and an upper portion distal the device substrate. The fluorinated photopolymer layer includes a radiation-absorbing dye and a fluorinated photopolymer having a solubility-altering reactive group. The photopolymer layer is exposed to patterned radiation to form exposed and unexposed areas in accordance with the patterned radiation and a developed structure is formed by removing unexposed areas using a developing agent that includes a first fluorinated solvent. The lower portion of the exposed area of the photopolymer layer has a dissolution rate in the developing agent that is at least 5 times higher than a dissolution rate for the upper portion.

Abstract: A semiconductor device (100) includes: a substrate (11); a first thin film transistor (10A) supported on the substrate (11), the first thin film transistor (10A) having a first active region (13c) which mainly contains a crystalline silicon; and a second thin film transistor (10B) being supported on the substrate (11), the second thin film transistor (10B) having a second active region (17c) which mainly contains an oxide semiconductor having a crystalline portion.

Abstract: Provided are methods of for deposition of SiN films via PEALD processes. Certain methods pertain to exposing a substrate surface to a silicon precursor to provide a silicon precursor at the substrate surface; purging excess silicon precursor; exposing the substrate surface to an ionized reducing agent; and purging excess ionized reducing agent to provide a film comprising SiN, wherein the substrate has a temperature of 23° C. to about 550° C.

Abstract: Embodiments of the present invention may provide the capability to design SRAM cells may be designed that is compatible with the requirements of InGaAs integration by selective epitaxy in SiO2 cavities without sacrificing density and area scaling. In an embodiment of the present invention, a computer-implemented method for designing a hybrid integrated circuit may comprise receiving data representing a layout of a static random-access memory cell array, identifying areas between active channel regions that do not overlap with transistor gates of static random-access memory cells of the static random-access memory cell array, selecting from among the identified areas at least one area, expanding the selected areas to determine whether the expanded area intersects with a p-doped active Si semiconductor or p-channel semiconductor area, and marking as Si seed locations the identified expanded areas that do not intersect on both sides with a channel active transistor region.

Abstract: A method for controlling a substrate temperature in a substrate processing system includes determining a temperature difference between the substrate temperature before the substrate is loaded onto a substrate support device and a desired temperature for the substrate support device and, during a first period, controlling a thermal control element to adjust the temperature of the substrate support device to a temperature value based on the temperature difference. The temperature value is not equal to the desired temperature for the substrate support device. The method further includes loading the substrate onto the substrate support device after the first period begins and before the temperature of the substrate support device returns to the desired temperature and, during a second period that follows the first period, controlling the temperature of the substrate support device to the desired temperature for the substrate support device.

Abstract: Disclosed is a mask for use in a lithography system having a defined resolution. The mask comprises first and second patterns that are greater than the defined resolution and a sub-resolution feature that is less than the defined resolution. Portions of the first and second patterns are positioned close to each other and separated by the sub-resolution feature in an intersection area. The size and shape of the sub-resolution feature are such that when the mask is used in the lithography system, a resulting pattern includes the first and second patterns interconnected with each other through the interconnection area.

Abstract: The invention relates to a substrate holding device comprising a holding plate, a base plate, an array of supports, and an array of droplets of a heat absorbing material. The holding plate comprises a first side for holding a substrate. The base plate is arranged at a distance from the holding plate and provides a gap between the base plate and the holding plate at a side of the holding plate opposite to the first side. The array of supports is arranged in between the holding plate and the base plate. The array of liquid and/or solid droplets is arranged in between the holding plate and the base plate, and the droplets are arranged to contact both the base plate and the holding plate. The droplets are arranged spaced apart from each other and from the supports, and are arranged adjacent to each other in a direction along the gap.

Abstract: Described herein are methods for flattening a substrate, such as a semiconductor wafer, to reduce bowing in such substrates. Methods include treating or bombarding a backside surface of a substrate with particles of varying doses, densities, and spatial locations. Particle bombardment and selection is such that the substrate becomes more planar by selectively increasing or decreasing z-height points to reduce overall deflection. One or more tensile or compressive films can be added to the backside surface to be selectively relaxed at specific point locations. Such methods can correct bowing in substrates resulting from various fabrication processes such as thermal annealing.

Abstract: A processing system for forming a cross-section of an object. The processing system comprises a focused ion beam system for forming the cross-section from a pre-prepared surface region of the object and a laser and a light optical system for forming the pre-prepared surface region by laser ablation of a processing region of the object with a first and a second laser beam. The light optical system is configured to direct the first and the second laser beams onto common impingement locations of a common scanning line in the processing region for scanning the first laser beam and for scanning the second laser beam. For each of the impingement locations, an angle between a first incidence direction along an axis of the first laser beam and a second incidence direction along an axis of the second laser beam is greater than 10 degrees, measured in a stationary coordinate system.

Abstract: An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer; forming a second conductive layer to be electrically connected to the semiconductor layer; forming a second insulating layer to cover the semiconductor layer and the second conductive layer; forming a third conductive layer to be electrically connected to the second conductive layer; performing first heat treatment after forming the semiconductor layer and before forming the second insulating layer; and performing second heat treatment after forming the second insulating layer.

Abstract: According to various embodiments, a method may include: disposing a dopant in a semiconductor region; forming a radiation absorption layer including or formed from at least one allotrope of carbon over at least a portion of the semiconductor region; and activating the dopant at least partially by irradiating the radiation absorption layer at least partially with electromagnetic radiation to heat the semiconductor region at least partially.

Abstract: An apparatus for crystallizing an active layer of a thin film transistor, the apparatus includes a first laser irradiating a first beam toward a substrate, an amorphous layer on the substrate being crystallizable into the active layer of the thin film transistor by the first beam, and a second laser irradiating a second beam toward the substrate to heat the active layer, the second beam having an asymmetric intensity profile in a scanning direction of the first and second beams.

Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The method includes forming a gate electrode, a gate insulating layer, a metal oxide semiconductor (MOS) active layer, a source electrode and a drain electrode on a substrate. The MOS active layer includes forming a pattern layer of indium oxide series binary metal oxide including a first, second, and third pattern directly contacting with the source electrode and the drain electrode. An insulating layer formed over the source electrode and the drain electrode acts as a protection layer, the pattern layer of indium oxide series binary metal oxide is implanted with metal doping ions by using an ion implanting process, and is annealed, so that the indium oxide series binary metal oxide of the third pattern is converted into the indium oxide series multiple metal oxide to form the MOS active layer.

Abstract: A method and apparatus for processing a semiconductor substrate is described. The apparatus is a process chamber having an optically transparent upper dome and lower dome. Vacuum is maintained in the process chamber during processing. The upper dome is thermally controlled by flowing a thermal control fluid along the upper dome outside the processing region. Thermal lamps are positioned proximate the lower dome, and thermal sensors are disposed among the lamps. The lamps are powered in zones, and a controller adjusts power to the lamp zones based on data received from the thermal sensors.

Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes: respectively forming a first layer and a second layer at the top of a protruding portion and at the bottom of a depressed portion of a treatment target having protrusions/depressions in such a manner that sidewalls of the protruding portion is exposed, supplying a treatment liquid to the treatment target having the first layer and the second layer, bringing a catalyst into contact with or closer to the first layer and thereby increasing the dissolution rate of the first layer in dissolving into the treatment liquid and dissolving the first layer into the treatment liquid, and sequentially dissolving the protruding portion and the second layer into the treatment liquid after the dissolution of the first layer.

Abstract: The goal is the improvement of technologies of modification of material properties by decreasing expenditures of energy and time and extending possibilities for modification of the materials by creating and maintaining a metastable state, which is characterized by a change in the structure of the material. The invention belongs to the technological field of manufacturing materials with desired properties, and in part to the field of methods of defect generation in crystals, and it can be applied in industries that apply the process of material doping with impurities in order to manufacture materials having a desired concentration of defects and an increased concentration of charge carriers, to create a metastable structural state of the material, as well as to measure energy and doses of radio waves.

Abstract: A transistor in a display device is expected to have higher withstand voltage, and it is an object to improve the reliability of a transistor which is driven by high voltage or large current. A semiconductor device includes a transistor in which buffer layers are provided between a semiconductor layer forming a channel formation region and source and drain electrode layers. The buffer layers are provided between the semiconductor layer forming a channel formation region and the source and drain electrode layers in order to particularly relieve an electric field in the vicinity of a drain edge and improve the withstand voltage of the transistor.

Abstract: The invention belongs to the field of display technology, and particularly provides an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a base substrate, and a thin film transistor and driving electrodes provided on the base substrate, the thin film transistor includes a gate, a gate insulating layer, an active layer, a source and a drain, the driving electrodes include a slit-shaped electrode and a plate-shaped electrode which are located in different layers and at least partially overlap with each other in the orthographic projection direction, the source, the drain and the active layer are formed so that part of their bottom surfaces are located in the same plane, and a resin layer is further provided between the thin film transistor and the plate-shaped electrode.

Abstract: A method for mask process correction or forming a pattern on a reticle using charged particle beam lithography is disclosed, where the reticle is to be used in an optical lithographic process to form a pattern on a wafer, where sensitivity of the wafer pattern is calculated with respect to changes in dimension of the reticle pattern, and where pattern exposure information is modified to increase edge slope of the reticle pattern where sensitivity of the wafer pattern is high. A method for fracturing or mask data preparation is also disclosed, where pattern exposure information is determined that can form a pattern on a reticle using charged particle beam lithography, where the reticle is to be used in an optical lithographic process to form a pattern on a wafer, and where sensitivity of the wafer pattern is calculated with respect to changes in dimension of the reticle pattern.

Abstract: The invention relates to a substrate for producing a substrate-product substrate combination by aligning, bringing into contact, and bonding a contact side of the large-area substrate to a support surface of a carrier substrate, whereby the substrate has a diameter d1, which can be reduced during back-thinning.

Abstract: Provided is a method of manufacturing a stacked semiconductor device, which includes forming a stacked film on a semiconductor substrate, the stacked film including a plurality of silicon oxide films and a plurality of silicon nitride films, which are alternately arranged on top of each other, and the stacked film being obtained by repeatedly performing a series of operations of forming the silicon oxide film on the semiconductor substrate using one of triethoxysilane, octamethylcyclotetrasiloxane, hexamethyldisilazane and diethylsilane gases, and forming the silicon nitride film on the formed silicon oxide film; etching the silicon nitride films in the stacked film; removing carbons contained in the silicon oxide films, which are not removed in the etching, to reduce a concentration of the carbons; and forming electrodes in regions where the silicon nitride films are etched in the etching.

Abstract: A method for manufacturing a substrate is provided. The method includes irradiating a single crystal substrate with a beam of laser or charged particles while moving an irradiation point of the beam with respect to the single crystal substrate so that a trajectory of the irradiation point on a surface of the single crystal substrate describes a striped pattern of straight lines. Non-crystalline regions are formed in the single crystal substrate along the trajectory. The irradiation is repeated multiple times so that directions of the striped patterns are different from each other among the multiple times of irradiation. The repetition of the irradiation changes warpage of the single crystal substrate. All of directions of the straight lines described in the multiple times of irradiation are not parallel to any of directions of crystal axes of the single crystal substrate in a plane parallel to the surface.

Abstract: High density energy storage in semiconductor devices is provided. There are two main aspects of the present approach. The first aspect is to provide high density energy storage in semiconductor devices based on formation of a plasma in the semiconductor. The second aspect is to provide high density energy storage based on charge separation in a p-n junction.

Abstract: A thin film transistor includes a gate electrode, an active pattern overlapping with the gate electrode and including a semiconductive oxide, and a source metal pattern disposed on the active pattern and including a source electrode and a drain electrode spaced apart from the source electrode. The active pattern underlaps an entire portion of a lower surface of the source metal pattern and minimally protrudes beyond lateral ends of the source metal pattern due to the active pattern having sidewall taper angles that are substantially greater than corresponding and adjacent sidewall taper angles of the overlying source metal pattern. Thus parasitic capacitance may be reduced and performance enhanced.

Abstract: To provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and has high reliability. To provide a method for manufacturing the semiconductor device. The semiconductor device includes a gate electrode, a gate insulating film formed over the gate electrode, an oxide semiconductor film formed over the gate insulating film, a source electrode and a drain electrode formed over the oxide semiconductor film, and a protective film. The protective film includes a metal oxide film, and the metal oxide film has a film density of higher than or equal to 3.2 g/cm3.

Abstract: A substrate processing apparatus is provided. The substrate processing apparatus includes a vacuum chamber having a dome and a floor. A substrate support is disposed inside the vacuum chamber. A plurality of thermal lamps are arranged in a lamphead and positioned proximate the floor of the vacuum chamber. A reflector is disposed proximate the dome, where the reflector and the dome together define a thermal control space. The substrate processing apparatus further includes a plurality of power supplies coupled to the thermal lamps and a controller for adjusting the power supplies to control a temperature in the vacuum chamber.

Abstract: Methods and systems for high speed surface blackening and/or coloring are disclosed, including generating electromagnetic radiation from an ultrashort pulse laser (UPL); coupling the electromagnetic radiation from the UPL to a scanner comprising a scanning and focus range, wherein the scanner is configured to receive the electromagnetic radiation from the UPL and to scan and focus the electromagnetic radiation onto a sample; using a computer to adjust the pulse repetition rate and the energy of the UPL; using a five degree of freedom motorized stage to position the sample; using a dichroic filter positioned between the scanner and the sample; focusing an imager through the dichroic filter and onto the surface of the sample; using a processor to acquire and process images to monitor the surface blackening and/or coloring of the sample within the scanning and focus range of the electromagnetic radiation. Other embodiments are described and claimed.

Abstract: A device for cutting a structure including nanotubes, including: a mechanism to polarize linearly laser pulses emitted in a direction of the structure, wherein a duration of the laser pulses is roughly between 1 femtosecond and 300 femtoseconds; and a mechanism to focus the linearly polarized laser pulses on the structure.

Abstract: To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.

Abstract: Provided is a method of fabricating an image sensor device. The method includes providing a first substrate having a radiation-sensing region disposed therein. The method includes providing a second substrate having a hydrogen implant layer, the hydrogen implant layer dividing the second substrate into a first portion and a second portion. The method includes bonding the first portion of the second substrate to the first substrate. The method includes after the bonding, removing the second portion of the second substrate. The method includes after the removing, forming one or more microelectronic devices in the first portion of the second substrate. The method includes forming an interconnect structure over the first portion of the second substrate, the interconnect structure containing interconnect features that are electrically coupled to the microelectronic devices.