Abstract: A semiconductor manufacturing system or process, such as an ion implantation system, apparatus and method, including a component or step for heating a semiconductor workpiece are provided. An optical heat source emits light energy to heat the workpiece. The optical heat source is configured to provide minimal or reduced emission of non-visible wavelengths of light energy and emit light energy at a wavelength in a maximum energy light absorption range of the workpiece.

Abstract: A manufacturing method of a semiconductor device, which includes the steps of forming a gate electrode layer over a substrate having an insulating surface, forming a gate insulating layer over the gate electrode layer, forming an oxide semiconductor layer over the gate insulating layer, forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer, forming an insulating layer including oxygen over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and after formation of an insulating layer including hydrogen over the insulating layer including oxygen, performing heat treatment so that hydrogen in the insulating layer including hydrogen is supplied to at least the oxide semiconductor layer.

Abstract: A device is intended for a laser lift-off method to sever at least one layer from a carrier. The device includes a laser that generates pulsed laser radiation and at least one beam splitter. The laser radiation is divided into at least two partial beams by the at least one beam splitter. The partial beams are superimposed in an irradiation plane, the irradiation plane being provided such that a major side of the carrier remote from the layer is arranged therein. At the irradiation plane, an angle (?) between the at least two partial beams is at least 1.0°.

Abstract: In one embodiment of the invention, there is provided a tool for annealing a magnetic stack. The tool includes a housing defining a heating chamber; a holding mechanism to hold at least one wafer in a single line within the heating chamber, a heating mechanism to heat the at least one wafer; and a magnetic field generator to generate a magnetic field whose field lines pass through the single line of wafers during a magnetic annealing process; wherein the holding mechanism comprises a wafer support of holding the single line of wafers between the heating mechanism and the magnetic field generator. The tool may be a rapid thermal processor retrofitted with the magnetic field generator.

Abstract: Novel methods and apparatuses for annealing semiconductor devices in a high pressure gas environment. According to an embodiment, the annealing vessel has a dual chamber structure, and potentially toxic, flammable, or otherwise reactive gas is confined in an inner chamber which is protected by pressures of inert gas contained in the outer chamber. The incoming gas delivery system and exhaust gas venting system are likewise protected by various methods. Embodiments of the present invention can be used, for example, for high-K gate dielectric anneal, post metallization sintering anneal, and forming gas anneal in the semiconductor manufacturing process.

Abstract: A laser processing apparatus includes a laser beam generating device that generates a first pulse laser beam for temporarily increasing a light absorptance in a predetermined region of a processing object, and a second pulse laser beam to be absorbed in the predetermined region in which the light absorptance has temporarily increased, and a support portion that is provided on a downstream of the first pulse laser beam and the second laser beam generated by the laser beam generating device and has a placement surface for placing the processing object. The laser beam generating device emits the second pulse laser beam with a delay with respect to the first pulse laser beam by a delay time within a predetermined period of time before the light absorptance that has temporarily increased in the predetermined region returns to an original value.

Abstract: A method for performing a laser crystallization is provided. The method includes generating a laser beam, refracting the laser beam to uniformize an intensity of the laser beam at a focal plane of the laser beam. The laser beam whose intensity is uniformized is applied into an object substrate mounted with a stage.

Abstract: The present invention discloses a heating method for maintaining a stable thermal budget. By following the primary procedure with a virtual procedure in such a manner that the total duration of the whole heating process remains constant, it is beneficial to maintain a stable thermal budget and further to maintain a stable device performance.

Abstract: A method can be used for locally rendering a carbonic isolating layer conductive. In one embodiment, a laser beam is directed onto the carbonic isolating layer so as to convert amorphous carbon of the carbonic isolating layer into graphite-like carbon. In another embodiment, the carbonic layer is heated so as to form a conducting portion of the layer so that a lateral path through the conducting portion connects two circuit elements of the integrated circuit.

Abstract: The preferred embodiment of the present invention provides a novel method of forming MOS devices using hydrogen annealing. The method includes providing a semiconductor substrate including a first region and a second region, forming at least a portion of a first MOS device covering at least a portion of the first active region, performing a hydrogen annealing in an ambient containing substantially pure hydrogen on the semiconductor substrate. The hydrogen annealing is performed after the step of the at least a portion of the first MOS device is formed, and preferably after a pre-oxidation cleaning. The method further includes forming a second MOS device in the second active region after hydrogen annealing. The hydrogen annealing causes the surface of the second active region to be substantially rounded, while the surface of the first active region is substantially flat.

Abstract: A process for recycling a support substrate of a material substantially transparent to at least a wavelength of electromagnetic radiation. The process includes providing an initial substrate; forming an intermediate layer on a bonding face of the support substrate having an initial roughness, with the intermediate layer being of a material substantially transparent to at least a wavelength of electromagnetic radiation; forming an electromagnetic radiation absorbing layer either on the bonding face of the initial substrate or on the intermediate layer; bonding the initial substrate to the support substrate via the electromagnetic radiation absorbing layer; and irradiating the electromagnetic radiation absorbing layer through the support substrate and the intermediate layer to induce separation of the support substrate from the initial substrate.

Abstract: A processing system is disclosed, having a power transmission element with an interior cavity that propagates electromagnetic energy proximate to a continuous slit in the interior cavity. The continuous slit forms an opening between the interior cavity and a substrate processing chamber. The electromagnetic energy may generate an alternating charge in the continuous slit that enables the generation of an electric field that may propagate into the processing chamber. The electromagnetic energy may be conditioned prior to entering the interior cavity to improve uniformity or stability of the electric field. The conditioning may include, but is not limited to, phase angle, field angle, and number of feeds into the interior cavity.

Abstract: A method of making a lithography mask with a stress-relief treatment is disclosed. The method includes providing a substrate and depositing an opaque layer on the substrate. The opaque layer is patterned to form a patterned mask. A stress-relief treatment is applied to the patterned mask by using an radiation exposure.

Abstract: There is disclosed a method of preserving the integrity of a growth substrate in a epitaxial lift-off method, the method comprising providing a structure comprising a growth substrate, one or more protective layers, a sacrificial layer, and at least one epilayer, wherein the sacrificial layer and the one or more protective layers are positioned between the growth substrate and the at least one epilayer; releasing the at least one epilayer by etching the sacrificial layer with an etchant; and heat treating the growth substrate and/or at least one of the protective layers.

Abstract: A method of focus measurement of the embodiment irradiates exposure light from a first direction and projects first and second line-and-space patterns on a substrate. Further, exposure light is irradiated from a second direction and third and fourth line-and-space patterns are projected on the substrate. By measuring a distance between the first and third line-and-space patterns on the substrate, a sum of a dislocated amount caused by dislocation of focus and an overlap dislocation amount between the first and third line-and-space patterns is calculated as a first dislocated amount. Further, by measuring a distance between the second and fourth line-and-space patterns on the substrate, an overlap dislocation amount between the second and fourth line-and-space patterns is calculated as a second dislocation amount. Further, based on the first and second dislocation amounts, the focus dislocation amount is calculated.

Abstract: A method of fabricating a nanoimprint lithography template includes installing a reticle on a reticle stage of scanning lithography equipment having a light source, the reticle stage and a template stage, mounting a template substrate on the template stage, and scanning the template substrate with light from the light source in an exposure process in which the light passes through the reticle and impinges the template substrate at an oblique angle of incidence.

Abstract: A system for and method of processing an article such as a semiconductor wafer is disclosed. The wafer includes first and second surfaces which are segmented into a plurality of first and second zones. The first surface of the wafer, for example, on which devices or ICs are formed is processed by, for example, laser annealing while the second surface is heated with a backside heating source. Corresponding, or at least substantially corresponding, zones on the first and second surfaces are processed synchronously to reduce variations of post laser anneal thermal budget across the wafer.

Abstract: Systems and methods are disclosed for performing laser annealing in a manner that reduces or minimizes wafer surface temperature variations during the laser annealing process. The systems and methods include annealing the wafer surface with first and second laser beams that represent preheat and anneal laser beams having respective first and second intensities. The preheat laser beam brings the wafer surface temperate close to the annealing temperature and the anneal laser beam brings the wafer surface temperature up to the annealing temperature. The anneal laser beam can have a different wavelength, or the same wavelength but different orientation relative to the wafer surface. Reflectivity maps of the wafer surface at the preheat and anneal wavelengths are measured and used to select the first and second intensities that ensure good anneal temperature uniformity as a function of wafer position. The first and second intensities can also be selected to minimize edge damage or slip generation.

Abstract: A semiconductor device and a method for making a semiconductor device are disclosed. In an embodiment a semiconductor device includes a semiconductor chip and a fiber reinforced encapsulation layer at least partly covering the semiconductor chip.

Abstract: A method of forming a semiconductor device that includes forming a high-k gate dielectric layer on a semiconductor substrate, wherein an oxide containing interfacial layer can be present between the high-k gate dielectric layer and the semiconductor substrate. A scavenging metal stack may be formed on the high-k gate dielectric layer. An annealing process may be applied to the scavenging metal stack during which the scavenging metal stack removes oxide material from the oxide containing interfacial layer, wherein the oxide containing interfacial layer is thinned by removing of the oxide material. A gate conductor layer is formed on the high-k gate dielectric layer. The gate conductor layer and the high-k gate dielectric layer are then patterned to provide a gate structure. A source region and a drain region are then formed on opposing sides of the gate structure.

Abstract: A system for curing a low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The system comprises one or more process modules configured for exposing the low-k dielectric film to electromagnetic (EM) radiation, such as infrared (IR) radiation and ultraviolet (UV) radiation.

Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a method includes constructing a radiation sensitive component in and/or on a microelectronic device, placing a curable component in and/or on the microelectronic device, and forming a barrier in and/or on the microelectronic device to at least partially inhibit irradiation of the radiation sensitive component. The radiation sensitive component can be doped silicon, chalcogenide, polymeric random access memory, or any other component that is altered when irradiated with one or more specific frequencies of radiation. The curable component can be an adhesive, an underfill layer, an encapsulant, a stand-off, or any other feature constructed of a material that requires curing by irradiation.

Abstract: Systems and methods for semiconductor device PN junction fabrication are provided. In one embodiment, a method for fabricating an electrical device having a P-N junction comprises: depositing a layer of amorphous semiconductor material onto a crystalline semiconductor base, wherein the crystalline semiconductor base comprises a crystalline phase of a same semiconductor as the amorphous layer; and growing the layer of amorphous semiconductor material into a layer of crystalline semiconductor material that is epitaxially matched to the lattice structure of the crystalline semiconductor base by applying an optical energy that penetrates at least the amorphous semiconductor material.

Abstract: The disclosed systems and method for non-periodic pulse sequential lateral solidification relate to processing a thin film. The method for processing a thin film, while advancing a thin film in a selected direction, includes irradiating a first region of the thin film with a first laser pulse and a second laser pulse and irradiating a second region of the thin film with a third laser pulse and a fourth laser pulse, wherein the time interval between the first laser pulse and the second laser pulse is less than half the time interval between the first laser pulse and the third laser pulse. In some embodiments, each pulse provides a shaped beam and has a fluence that is sufficient to melt the thin film throughout its thickness to form molten zones that laterally crystallize upon cooling. In some embodiments, the first and second regions are adjacent to each other. In some embodiments, the first and second regions are spaced a distance apart.

Abstract: Embodiments of the present invention provide apparatus and method for improving gas distribution during thermal processing. One embodiment of the present invention provides an apparatus for processing a substrate comprising a chamber body defining a processing volume, a substrate support disposed in the processing volume, wherein the substrate support is configured to support and rotate the substrate, a gas inlet assembly coupled to an inlet of the chamber body and configured to provide a first gas flow to the processing volume, and an exhaust assembly coupled to an outlet of the chamber body, wherein the gas inlet assembly and the exhaust assembly are disposed on opposite sides of the chamber body, and the exhaust assembly defines an exhaust volume configured to extend the processing volume.

Abstract: A display device includes: a thin film transistor; and a wiring layer; the thin film transistor including a control electrode, a semiconductor layer facing the control electrode, a first electrode made of a light transmissive material and electrically connected to the semiconductor layer, and a second electrode including a metal film having resistance lower than that of the light transmissive material, the second electrode being electrically connected to each of the semiconductor layer and the wiring layer, wherein a difference in ionization tendency between a material configuring the metal film and a conductive material configuring a part or whole of the wiring layer is smaller than a difference in ionization tendency between the light transmissive material and the conductive material.

Abstract: A method for processing a dielectric film on a substrate comprises: depositing a porous dielectric film on a substrate; removing the porogen; stuffing the film with a protective polymeric material; performing at least one intermediate processing step on the stuffed dielectric film; placing the film in a microwave applicator cavity and heating to a first temperature to partially burn out the polymeric material; introducing a controlled amount of a polar solvent into the porosity created by the partial burn out; applying microwave energy to heat the film to a second selected temperature below the boiling point of the solvent to clean away remaining polymeric material; and applying microwave energy to heat the film to a third temperature above the boiling point of the solvent to completely burnout the residues of polymeric material. The interaction of the polar solvent with the microwaves enhances the efficiency of the cleaning process.

Abstract: The present disclosure discloses a method of laser annealing process, wherein the surface of the semiconductor structure on a substrate is scanned by a laser annealing device, and the said laser annealing device comprises a laser source and the optical instruments. The invention comprises the following steps: generating a laser beam by the laser source, and the laser beam is irradiating on a mirror, the route thereof changed by 90 degrees and converging the laser beam by the optical instrument thereafter. By this method, an improved annealing process which saved the chamber, reduced the likelihood of the oxidation of silicon film in the annealing process, improved the electrical property of silicon substrate, reduced the weight of machine and further simplified the maintenance machine.

Abstract: Provided is a method of manufacturing a semiconductor device using a heating device capable of suppressing shearing of a holder due to thermal deformation of the heating element included in the heating device. The method includes: loading a substrate into a process chamber surrounded by a heating device including a heating element; and increasing temperature of the heating element including a mountain part and a valley part alternately connected in plurality to form a meander shape with both ends thereof being fixed to an insulating body installed at an outer circumference of the heating element wherein the heating element is fixed to the insulating body by a holding body disposed in a holding body receiving part installed at end of the valley part having a cutout part having a width larger than that of the valley part to heat the substrate in the process chamber.

Abstract: Techniques for forming a smooth silicide without the use of a cap layer are provided. In one aspect, a FET device is provided. The FET device includes a SOI wafer having a SOI layer over a BOX and at least one active area formed in the wafer; a gate stack over a portion of the at least one active area which serves as a channel of the device; source and drain regions of the device adjacent to the gate stack, wherein the source and drain regions of the device include a semiconductor material selected from: silicon and silicon germanium; and silicide contacts to the source and drain regions of the device, wherein an interface is present between the silicide contacts and the semiconductor material, and wherein the interface has an interface roughness of less than about 5 nanometers.

Abstract: Laser annealing systems and methods for annealing a semiconductor wafer with ultra-short dwell times are disclosed. The laser annealing systems can include one or two laser beams that at least partially overlap. One of the laser beams is a pre-heat laser beam and the other laser beam is the annealing laser beam. The annealing laser beam scans sufficiently fast so that the dwell time is in the range from about 1 ?s to about 100 ?s. These ultra-short dwell times are useful for annealing product wafers formed from thin device wafers because they prevent the device side of the device wafer from being damaged by heating during the annealing process. Embodiments of single-laser-beam annealing systems and methods are also disclosed.

Abstract: The object of the present invention is to provide a method of fabricating a thermoelectric material and a thermoelectric material fabricated thereby. According to the present invention, since carbon nanotubes with no surface treatment are dispersed in the alloy, electrical resistivity decreases and electrical conductivity increases in comparison to surface-treated carbon nanotubes and an amount of thermal conductivity decreased is the same as that in the case of using surface-treated carbon nanotubes, and thus, a ZT value, a thermoelectric figure of merit, is improved. A separate reducing agent is not used and an organic solvent having reducing powder is used to improve economic factors related to material costs and process steps, and carbon nanotubes may be dispersed in the thermoelectric material without mechanical milling.

Abstract: A semiconductor device manufacturing method includes loading a substrate, on which a high-k film is formed, into a processing chamber, performing a reforming process by heating the high-k film through irradiation of a microwave on the substrate, and unloading the substrate from the processing chamber.

Abstract: Embodiments of the invention generally relate to a support ring to support a substrate in a process chamber. In one embodiment, the support ring comprises an inner ring, an outer ring connecting to an outer perimeter of the inner ring through a flat portion, an edge lip extending radially inwardly from an inner perimeter of the inner ring to form a supporting ledge to support the substrate, and a substrate support formed on a top surface of the edge lip. The substrate support may include multiple projections extending upwardly and perpendicularly from a top surface of the edge lip, or multiple U-shaped clips securable to an edge portion of the edge lip. The substrate support thermally disconnects the substrate from the edge lip to prevent heat loss through the edge lip, resulting in an improved temperature profile across the substrate with a minimum edge temperature gradient.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed. In one preferred arrangement, a method includes the steps of generating a sequence of excimer laser pulses, controllably modulating each excimer laser pulse in the sequence to a predetermined fluence, masking portions of each fluence controlled laser pulse in the sequence with a two dimensional pattern of slits to generate a sequence of fluence controlled pulses of line patterned beamlets, irradiating an amorphous silicon thin film sample with the sequence of fluence controlled slit patterned beamlets to effect melting of portions thereof, and controllably sequentially translating a relative position of the sample with respect to each of the fluence controlled pulse of slit patterned beamlets to thereby process the amorphous silicon thin film sample into a single or polycrystalline silicon thin film.

Abstract: A method of manufacturing a silicon wafer, an oxygen concentration in a surface layer to be maintained more than a predetermined value while promoting a defect-free layer. Strength of the surface layer can be made higher than that of an ordinary annealed sample as a COP free zone is secured. A method of manufacturing a silicon wafer doped with nitrogen and oxygen, includes growing a single crystal silicon doped with the nitrogen by Czochralski method, slicing the grown single crystal silicon to obtain a single crystal silicon wafer; heat treating the sliced single crystal silicon wafer in an ambient gas including a hydrogen gas and/or an inert gas; polishing the heat treated single crystal silicon wafer, after the heat treatment, such that an obtained surface layer from which COP defects have been removed by the heat treatment is polished away until an outermost surface has a predetermined oxygen concentration.

Abstract: A method of thermally treating a wafer includes loading a wafer into a process chamber having one or more regions of uniform temperature gradient and one or more regions of non-uniform temperature gradient. A defect is detected in the wafer. The wafer is aligned to position the defect within one of the one or more regions of uniform temperature gradient. A rapid thermal process is performed on the wafer in the process chamber while the defect is positioned within one of the one or more regions of uniform temperature gradient.

Abstract: A semiconductor wafer, on the surface of which a silicon dioxide base material and an amorphous silicon thin film are formed in this order, is carried into a chamber. An insulated gate bipolar transistor (IGBT) is connected with a power supply circuit to a flash lamp, and the IGBT makes an energization period to the flash lamp to be 0.01 millisecond or more and 1 millisecond or less, consequently making a flash light irradiation time to be 0.01 millisecond or more and 1 millisecond or less. Since a flash heat treatment is performed with a remarkably short flash light irradiation time, the excessive heating of the thin film of amorphous silicon is suppressed and harmful influence such as the exfoliation of the film is prevented.

Abstract: Embodiments disclosed herein generally relate to an apparatus and a method for placing a substrate substantially flush against a substrate support in a processing chamber. When a large area substrate is placed onto a substrate support, the substrate may not be perfectly flush against the substrate support due to gas pockets that may be present between the substrate and the substrate support. The gas pockets can lead to uneven deposition on the substrate. Therefore, pulling the gas from between the substrate and the support may pull the substrate substantially flush against the support. During deposition, an electrostatic charge can build up and cause the substrate to stick to the substrate support. By introducing a gas between the substrate and the substrate support, the electrostatic forces may be overcome so that the substrate can be separated from the susceptor with less or no plasma support which takes extra time and gas.

Abstract: A device for irradiating a laser beam onto an amorphous silicon thin film formed on a substrate. The device includes: a stage mounting the substrate; a laser oscillator for generating a laser beam; a projection lens for focusing and guiding the laser beam onto the thin film; a reflector for reflecting the laser beam guided onto the thin film; a controller for controlling a position of the reflector; and an absorber for absorbing the laser beam reflected by the reflector.

Abstract: A laser crystallization device includes a first light source providing a first light and a second light source providing a second light. The device further includes a first lens set receiving the first light to generate a first transmitted light, the first transmitted light having a first profile, the first profile having a first profile error portion and a first non-error portion. The device further includes a second lens set receiving the second light to generate a second transmitted light, the second transmitted light having a second profile, the second profile having a second profile error portion and a second non-error portion, the second profile error portion corresponding to the first non-error portion, the second non-error portion corresponding to the first profile error portion. The device further includes an optical system combining the first transmitted light with the second transmitted light.

Abstract: An improved insulated gate field effect device is obtained by providing a substrate desirably comprising a III-V semiconductor, having a further semiconductor layer on the substrate adapted to contain the channel of the device between spaced apart source-drain electrodes formed on the semiconductor layer. A dielectric layer is formed on the semiconductor layer. A sealing layer is formed on the dielectric layer and exposed to an oxygen plasma. A gate electrode is formed on the dielectric layer between the source-drain electrodes. The dielectric layer preferably comprises gallium-oxide and/or gadolinium-gallium oxide, and the oxygen plasma is preferably an inductively coupled plasma. A further sealing layer of, for example, silicon nitride is desirably provided above the sealing layer. Surface states and gate dielectric traps that otherwise adversely affect leakage and channel sheet resistance are much reduced.

Abstract: The surface of a material is textured and by exposing the surface to pulses from an ultrafast laser. The laser treatment causes pillars to form on the treated surface. These pillars provide for greater light absorption. Texturing and crystallization can be carried out as a single step process. The crystallization of the material provides for higher electric conductivity and changes in optical and electronic properties of the material. The method may be performed in vacuum or a gaseous environment. The gaseous environment may aid in texturing and/or modifying physical and chemical properties of the surfaces. This method may be used on various material surfaces, such as semiconductors, metals and their alloys, ceramics, polymers, glasses, composites, as well as crystalline, nanocrystalline, polycrystalline, microcrystalline, and amorphous phases.

Abstract: Provided are a substrate processing apparatus, a process container and a method of manufacturing a semiconductor device capable of improving the quality of a thin film by stabilizing conditions of heating a substrate when the thin film is formed on the substrate heated using a heating unit installed outside the process container. The substrate processing apparatus includes a process container in which processing to a substrate is performed; a heating unit disposed outside the process container and configured to emit a radiant heat so as to heat the substrate in the process container; and a source gas supply system configured to supply a source gas into the process container, wherein the process container includes a heat absorbing layer disposed on at least a portion of an outer wall of the process container and configured to absorb the radiant heat and cause a saturation of absorption of the radiant heat.

Abstract: A heat insulation structure, which has a cylindrical side wall part formed in a multilayer structure, includes: a cooling gas supply port provided in an upper portion of a side wall outer layer disposed in an outer side of the side wall part; a cooling gas passage provided between a side wall inner layer disposed in an inner side of the side wall part and the side wall outer layer; a space provided in an inner side of the side wall inner layer; a plurality of blowout holes provided in the side wall inner layer for distributing cooling gas from the cooling gas passage to the space; a buffer area continuously provided in the cooling gas supply port and the cooling gas passage; and a throttle part configured to reduce a cross-sectional area of a boundary surface between the buffer area and the cooling gas passage.

Abstract: A method for manufacturing an interposer equipped with a plurality of through-hole electrodes comprises a laser light converging step of converging a laser light at a sheet-like object to be processed made of silicon so as to form a modified region in the object; an etching step of anisotropically etching the object after the laser light converging step so as to advance etching selectively along the modified region and form a plurality of through holes in the object, each through hole being tilted with respect to a thickness direction of the object and having a rectangular cross section; an insulating film forming step of forming an insulating film on an inner wall of each through hole after the etching step; and a through-hole electrode forming step of inserting a conductor into the through holes so as to form the through-hole electrodes after the insulating film forming step; wherein the plurality of through holes are arranged such that the through holes aligning in the tilted direction are staggered in a d

Abstract: A semiconductor annealing method and system uses a vacuum pump to produce a vacuum environment in the annealing chamber to thereby remove undesired gas element influences. A control system obtains pressure and temperature measurements from the annealing chamber to control operation of the heating elements and vacuum pump to thereby maintain process integrity.

Abstract: The surface of a material is textured and crystallized in a single step by exposing the surface to pulses from an ultrafast laser. The laser treatment causes pillars to form on the treated surface. These pillars provide for greater light absorption. The crystallization of the material provides for higher electric conductivity and changes in optical properties of the material. The method may be performed in a gaseous environment, so that laser assisted chemical etching will aid in the texturing of the surface. This method may be used on various material surfaces, such as semiconductors, metals, ceramics, polymers, and glasses.

Abstract: A pattern for use in the manufacture of semiconductor devices is provided which, according to an example embodiment, may comprise at least one second field region comprising a main array of dies, each having a height of Y1 and a width of X1, and the main array having a height of Y3. The pattern according to the example embodiment may further include at least one first field region comprising a monitoring region having a height of Y2 and a width of X2 and an auxiliary die region having a height of Y2 and comprising an auxiliary array of dies. The dimensions of the various regions may be proportional to one another, such that X2=n1×X1+adjustment1, Y2=n3×Y1+adjustment3, and Y3=n4×Y2+adjustment4, n1, n3, and n4 being integers.

Abstract: A method for reducing light point defects of a semiconductor-on-insulator structure and a method for reducing the surface roughness of a semiconductor-on-insulator structure are disclosed. The methods can include a combination of thermally annealing the structure followed by a non-contact smoothing process.