Having Metal Oxide Or Copper Sulfide Compound Semiconductive Component Patents (Class 438/85)
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Publication number: 20090065832Abstract: It is an object of the present invention to provide an image sensor having a high ratio of a surface area of a light receiving element to a surface area of one pixel. The above-described object is achieved by an inventive solid-state imaging device unit comprising solid-state imaging devices arranged on a substrate according to the present invention. The solid-state imaging device comprises a signal line formed on the substrate, an island shaped semiconductor placed over the signal line, and a pixel selection line connected to an upper portion of the island shaped semiconductor.Type: ApplicationFiled: November 10, 2008Publication date: March 12, 2009Applicant: Unisantis Electronics (Japan) Ltd.Inventors: Fujio MASUOKA, Hiroki Nakamura
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Patent number: 7501293Abstract: A semiconductor device having excellent crystallinity and excellent electric characteristics includes a ZnO thin film having excellent surface smoothness. ZnO-based thin films (an n-type contact layer, an n-type clad layer, an active layer, a p-type clad layer, and a p-type contact layer) primarily including ZnO are formed sequentially by an ECR sputtering method or other suitable method on a zinc-polar surface of a ZnO substrate. A transparent electrode and a p-side electrode are formed by an evaporation method or other suitable method on a surface of the p-type contact layer, and an n-side electrode is formed on an oxygen-polar surface of the ZnO substrate.Type: GrantFiled: June 4, 2003Date of Patent: March 10, 2009Assignee: Murata Manufacturing Co., Ltd.Inventors: Yoshihiro Ito, Michio Kadota
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Patent number: 7494840Abstract: An optical device with an iridium oxide (IrOx) electrode neural interface, and a corresponding fabrication method are provided. The method provides a substrate and forms a first conductive electrode overlying the substrate. A photovoltaic device having a first electrical interface is connected to the first electrode. A second electrical interface of the photovoltaic device is connected to a second conductive electrode formed overlying the photovoltaic device. An array of neural interface single-crystal IrOx nanostructures are formed overlying the second electrode, where x?4. The IrOx nanostructures can be partially coated with an electrical insulator, such as SiO2, SiN, TiO2, or spin on glass (SOG), leaving the IrOx distal ends exposed. In one aspect, a buffer layer is formed overlying the second electrode surface, made from a material such as LiNbO3, LiTaO3, or SA, for the purpose of orienting the growth direction of the IrOx nanostructures.Type: GrantFiled: July 31, 2006Date of Patent: February 24, 2009Assignee: Sharp Laboratories of America, Inc.Inventors: Fengyan Zhang, Sheng Teng Hsu
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Publication number: 20090042333Abstract: A semiconductor device has a heterostructure including a first layer of semiconductor oxide material. A second layer of semiconductor oxide material is formed on the first layer of semiconductor oxide material such that a two dimensional electron gas builds up at an interface between the first and second materials. A passivation layer on the outer surface stabilizes the structure. The device also has a source contact and a drain contact.Type: ApplicationFiled: August 27, 2008Publication date: February 12, 2009Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Christian G. Van de Walle, Peter Kiesel, Oliver Schmidt
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Publication number: 20090011536Abstract: An optical device with an iridium oxide (IrOx) electrode neural interface, and a corresponding fabrication method are provided. The method provides a substrate and forms a first conductive electrode overlying the substrate. A photovoltaic device having a first electrical interface is connected to the first electrode. A second electrical interface of the photovoltaic device is connected to a second conductive electrode formed overlying the photovoltaic device. An array of neural interface single-crystal IrOx nanostructures are formed overlying the second electrode, where x?4. The IrOx nanostructures can be partially coated with an electrical insulator, such as SiO2, SiN, TiO2, or spin on glass (SOG), leaving the IrOx distal ends exposed. In one aspect, a buffer layer is formed overlying the second electrode surface, made from a material such as LiNbO3, LiTaO3, or SA, for the purpose of orienting the growth direction of the IrOx nanostructures.Type: ApplicationFiled: July 31, 2006Publication date: January 8, 2009Inventors: Fengyan Zhang, Sheng Teng Hsu
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Publication number: 20080274582Abstract: The invention relates to a method for producing solar cells comprising at least one p-i-n layer sequence containing micro-crystalline layers with the aid of a PECVD method. Said method is characterised in that all layers of the p-i-n layer sequence are deposited in a single-chamber process. The electrodes are interspaced at a distance of between 5 and 15 mm and the gas is distributed by means of a shower-head gas inlet, which guarantees a homogeneous distribution of the gas over the substrate. SiH4 gas streams with values of between 0.01 and 3 sccm/cm2 are added with a process pressure of between 8 and 50 hPa. The heater temperature is set at between 50 and 280° C. and the HF output is between 0.2 and 2 watt/cm2. The H2 gas streams have values of between 0.3 and 30 sccm/cm2, in particular between 0.3 and 10 sccm/cm2.Type: ApplicationFiled: December 16, 2004Publication date: November 6, 2008Inventors: Tobias Repmann, Bernd Rech
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Patent number: 7432526Abstract: A semiconductor device has a heterostructure including a first layer of semiconductor oxide material. A second layer of semiconductor oxide material is formed on the first layer of semiconductor oxide material such that a two dimensional electron gas builds up at an interface between the first and second materials. A passivation layer on the outer surface stabilizes the structure. The device also has a source contact and a drain contact.Type: GrantFiled: December 20, 2005Date of Patent: October 7, 2008Assignee: Palo Alto Research Center IncorporatedInventors: Christian G. Van de Walle, Peter Kiesel, Oliver Schmidt
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Publication number: 20080202383Abstract: A semiconductor nanocrystal composition that is stable and has high luminescent quantum yield. The semiconductor nanocrystal composition has a semiconductor nanocrystal core of a group II alloyed I-III-VI semiconductor nanocrystal material. A method of making a semiconductor nanocrystal composition is also provides which includes synthesizing a semiconductor nanocrystal core of a group II alloyed I-III-VI semiconductor material.Type: ApplicationFiled: February 27, 2007Publication date: August 28, 2008Applicant: EVIDENT TECHNOLOGIES, INC.Inventor: Weili SHI
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Patent number: 7390715Abstract: A method of fabricating an active layer thin film by a metal-chalcogenide precursor solution is provided, including the steps of: synthesizing a metal-chalcogenide precursor containing benzyl or benzyl derivative; dissolving the precursor in a solvent to produce a precursor solution, wherein a chalcogen element or compound can be added to the precursor solution to adjust the molar ratio of metal ion to chalcogen; and then applying the precursor solution onto a substrate in a specific coating manner, to form a film of the metal-chalcogenide after a curing process. Thereby, the existing method wherein an amorphous silicon active layer film is fabricated by plasma enhanced chemical vapor deposition (PECVD) is replaced.Type: GrantFiled: June 5, 2006Date of Patent: June 24, 2008Assignees: Taiwan TFT LCD Association, Chunghwa Picture Tubes, Ltd., Au Optronics Corp., Quanta Display Inc., Hannstar Display Corp., Chi Mei Optoelectronics Corp., Industrial Technology Research Institute, Toppoly Optoelectronics Corp.Inventors: Chun-Yao Ou, Hua-Chi Cheng, Ming-Nan Hsiao, Bor-Chuan Chuang, Chao-Jen Wang
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Patent number: 7378286Abstract: The present invention discloses a novel transistor structure employing semiconductive metal oxide as the transistor conductive channel. By replacing the silicon conductive channel with a semiconductive metal oxide channel, the transistors can achieve simpler fabrication process and could realize 3D structure to increase circuit density. The disclosed semiconductive metal oxide transistor can have great potential in ferroelectric non volatile memory device with the further advantages of good interfacial properties with the ferroelectric materials, possible lattice matching with the ferroelectric layer, reducing or eliminating the oxygen diffusion problem to improve the reliability of the ferroelectric memory transistor. The semiconductive metal oxide film is preferably a metal oxide exhibiting semiconducting properties at the transistor operating conditions, for example, In2O3 or RuO2.Type: GrantFiled: August 20, 2004Date of Patent: May 27, 2008Assignee: Sharp Laboratories of America, Inc.Inventors: Sheng Teng Hsu, Tingkai Li, Jong-Jan Lee
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Patent number: 7378310Abstract: A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. A layer of metal oxide having a first heat of formation is formed on the first layer of dielectric material. A metal layer having a second heat of formation is formed on the metal oxide layer. The second heat of formation is greater than the first heat of formation. The metal oxide layer and the metal layer are annealed which causes the metal layer to reduce the metal oxide layer to metallic form, which then agglomerates to form metal islands. The metal layer becomes oxidized thereby embedding the metal islands within an oxide layer to form a nanocrystal layer. A control oxide is formed over the nanocrystal layer and a gate electrode is formed on the control oxide.Type: GrantFiled: April 27, 2005Date of Patent: May 27, 2008Assignees: Spansion LLC, Advanced Micro Devices, Inc.Inventors: Connie Pin-Chin Wang, Zoran Krivokapic, Suzette Keefe Pangrle, Robert Chiu, Lu You
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Patent number: 7344912Abstract: Disclosed are methods of fabricating a memory cell structure. More specifically, a copper substrate, including but not limited to copper contacts and/or bit lines, can be formed within a metal-containing layer, for example. Optionally, one or more via openings can then be formed in an overlying dielectric layer to expose one or more of the copper contacts and/or bit lines. Copper sulfide material can be formed thereon. Alternatively, a portion of the exposed copper can be converted to copper sulfide (e.g., Cu2S2 or Cu2S). The copper sulfide material can then be exposed to a vapor phase monomer to facilitate selective growth of a conducting polymer.Type: GrantFiled: March 1, 2005Date of Patent: March 18, 2008Assignee: Spansion LLCInventor: Uzodinma Okoronyanwu
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Patent number: 7323356Abstract: Disclosed is a method of producing an LnCuOX single-crystal thin film (wherein Ln is at least one selected from the group consisting of lanthanide elements and yttrium, and X is at least one selected from the group consisting of S, Se and Te), which comprises the steps of growing a base thin film on a single-crystal substrate, depositing an amorphous or polycrystalline LnCuOX thin film on the base thin film to form a laminated film, and then annealing the laminated film at a high temperature of 500° C. or more.Type: GrantFiled: February 19, 2003Date of Patent: January 29, 2008Assignee: Japan Science and Technology AgencyInventors: Hideo Hosono, Masahiro Hirano, Hiromichi Ota, Masahiro Orita, Hidenori Hiramatsu, Kazushige Ueda
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Publication number: 20070269923Abstract: Disclosed herein is a semiconductor electrode with improved power conversion efficiency through inhibition of recombination reactions of electrons. The semiconductor electrode comprises a transparent electrode consisting of a substrate and a conductive material coated on the substrate, and a metal oxide layer formed on the transparent electrode wherein the metal oxide layer contains a phosphate. Further disclosed is a solar cell employing the semiconductor electrode.Type: ApplicationFiled: October 6, 2006Publication date: November 22, 2007Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Eun Sung LEE, Young Jun PARK, Sang Cheol PARK, Jung Gyu NAM, Ju Chul PARK
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Patent number: 7253017Abstract: Charge splitting networks for optoelectronic devices may be fabricated using a nanostructured porous film, e.g., of SiO2, as a template. The porous film may be fabricated using surfactant temptation techniques. Any of a variety of semiconducting materials including semiconducting metals and metal oxides (such as TiO2, CdSe, CdS, CdTe, or CuO) may be deposited into the pores of the porous template film. After deposition, the template film may be removed by controlled exposure to acid or base without disrupting the semiconducting material leaving behind a nanoscale network grid. Spaces in the network grid can then be filled with complementary semiconducting material, e.g., a semiconducting polymer or dye to create a exciton-splitting and charge transporting network with superior optoelectronic properties for an optoelectronic devices, particularly photovoltaic devices.Type: GrantFiled: November 22, 2002Date of Patent: August 7, 2007Assignee: Nanosolar, Inc.Inventors: Martin R. Roscheisen, Brian M. Sager, Jacqueline Fidanza, Klaus Petritsch, Gregory A. Miller, Dong Yu
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Patent number: 7189656Abstract: Although an Ag—CdO-based material has excellent electric properties such as deposition resistance, arc resistance and low contact resistance, which are required for an electric contact, the discharge standard provision in Japan, EC Directive on Waste from Electrical and Electronic Equipment (WEEE) and the like have been directed toward disuse of Cd, as already known. Thus, the present invention is characterized in that after an atmosphere in a pressured oxidation furnace is replaced with oxygen, the temperature of an internal-oxidative Ag alloy prepared under a condition of a cold roll rate of 50 to 95% is gradually raised from a temperature of 200° C. or less in a pressured oxygen atmosphere with an oxygen pressure of 5 to 50 kg/cm2 and internal oxidation processing is performed with an upper limit temperature of 700° C.Type: GrantFiled: August 15, 2002Date of Patent: March 13, 2007Assignee: Tokuriki Honten Co. Ltd.Inventors: Sadao Sato, Hideo Kumita, Kohei Tsuda, Mitsuo Yamasita, Kunio Shiokawa, Kenichi Kamiura, Kiyoshi Sekiguchi
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Patent number: 7157641Abstract: A bi-layer photovoltaic cell, and method (100) of making same, with an electric field applied at the p-n heterojunction interface. The cell includes a first semiconductor layer including a binder, nanocrystals of an n-type semiconductor, and spatially bound cations and a second semiconductor layer contacting the first semiconductor layer that includes a binder, nanocrystals of a p-type semiconductor, and spatially bound anions. The cell further includes a p-n heterojunction at the contacting interface between the first and second semiconductor layers. An electric field is created by the spatially bound cations and anions that are located in the layers proximal to the p-n heterojunction. The nanocrystals are single crystals of organic semiconductors that are less than 50 nanometers in size and that comprise a majority of the volume of their respective layers. The binder is a polymer matrix, such as an epoxy. The cell includes electrical contacts abutting the semiconductor layers.Type: GrantFiled: September 16, 2004Date of Patent: January 2, 2007Assignee: Midwest Research InstituteInventor: Brian A Gregg
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Patent number: 7094441Abstract: A polymeric linking agent enables the manufacture of photovoltaic cells on flexible substrates, including, for example, polymeric substrates. Photovoltaic cells may be fabricated by a relatively simple continuous manufacturing process, for example, a roll-to-roll process, instead of a batch process.Type: GrantFiled: August 13, 2004Date of Patent: August 22, 2006Assignee: Konarka Technologies, Inc.Inventors: Kethinni G. Chittibabu, Russell Gaudiana, Bill Beckenbaugh, Lian Li, Michael Lee
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Patent number: 7087833Abstract: Nanocomposite photovoltaic devices are provided that generally include semiconductor nanocrystals as at least a portion of a photoactive layer. Photovoltaic devices and other layered devices that comprise core-shell nanostructures and/or two populations of nanostructures, where the nanostructures are not necessarily part of a nanocomposite, are also features of the invention. Varied architectures for such devices are also provided including flexible and rigid architectures, planar and non-planar architectures and the like, as are systems incorporating such devices, and methods and systems for fabricating such devices. Compositions comprising two populations of nanostructures of different materials are also a feature of the invention.Type: GrantFiled: December 9, 2004Date of Patent: August 8, 2006Assignee: Nanosys, Inc.Inventors: Erik C. Scher, Mihai Buretea, Stephen A. Empedocles
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Patent number: 7084002Abstract: The present invention relates to a method for manufacturing a nano-structured metal oxide electrode, and in particular, to a method for manufacturing a metal oxide electrode having a few tens or hundreds of nanometers in diameter that is well adapted to an electrode of a supercapacitor using an alumina or polymer membrane having nano-sized pores as a template.Type: GrantFiled: October 20, 2004Date of Patent: August 1, 2006Assignees: Hyundai Motor Company, Kia Motors CorporationInventors: Kwang Bum Kim, Kyung Wan Nam, Il Hwan Kim, Jin Ho Park
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Patent number: 6967119Abstract: There is provided a semiconductor laser device having on a single substrate a plurality of laser portions each oscillating laser light of a different wavelength, the plurality of laser portions containing different types, respectively, of dopant. There is also provided a method of fabricating a semiconductor laser device, forming on a single substrate a plurality of laser portions each oscillating laser light of a different wavelength, initially forming a laser portion in a crystal growth method and subsequently forming another laser portion in a different crystal growth method.Type: GrantFiled: October 31, 2003Date of Patent: November 22, 2005Assignee: Sharp Kabushiki KaishaInventors: Taiji Morimoto, Keisuke Miyazaki, Masaki Tatsumi, Kazuhiko Wada, Yoshiaki Ueda
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Patent number: 6960718Abstract: In a photovoltaic element according to the present invention, a first transparent conductive film, a second transparent conductive film, a p-type semiconductor film, an intrinsic semiconductor layer, a n-type semiconductor layer and a backside electrode are stacked in turn on a transparent substrate. Then, an intermediate layer is provided between the second transparent conductive film and the p-type semiconductor layer so as to cover the first transparent conductive film and the second transparent conductive film.Type: GrantFiled: March 28, 2003Date of Patent: November 1, 2005Assignees: TDK Corporation, Semiconductor Energy Laboratory Co., Ltd.Inventors: Tatsuji Sano, Hisao Morooka, Kazuo Nishi
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Patent number: 6951771Abstract: A method of forming a laminate and a method of manufacturing a photovoltaic device using the laminate are provided. The laminate forming method includes a first step of forming an intermediate layer on a base member, and a second step of forming a metal layer on the intermediate layer, the adhesion of the metal layer to the base member being lower than that of the intermediate layer, the reflectance of the metal layer being higher than that of the intermediate layer. The rate of formation of the metal layer is increased at an intermediate stage in the second step. The laminate thereby formed has improved characteristics and is capable of maintaining improved reflection characteristics and adhesion even under high-temperature and high-humidity conditions or during long-term use.Type: GrantFiled: July 11, 2003Date of Patent: October 4, 2005Assignee: Canon Kabushiki KaishaInventors: Takaharu Kondo, Hideo Tamura, Atsushi Yasuno, Noboru Toyama, Yuichi Sonoda, Masumitsu Iwata, Akiya Nakayama, Yusuke Miyamoto
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Patent number: 6933553Abstract: Provided is a field effect transistor. The field effect transistor includes an insulating vanadium dioxide (VO2) thin film used as a channel material, a source electrode and a drain electrode disposed on the insulating VO2 thin film to be spaced apart from each other by a channel length, a dielectric layer disposed on the source electrode, the drain electrode, and the insulating VO2 thin film, and a gate electrode for applying a predetermined voltage to the dielectric layer.Type: GrantFiled: December 30, 2003Date of Patent: August 23, 2005Assignee: Electronics and Telecommunications Research InstituteInventors: Hyun Tak Kim, Kwang Yong Kang, Doo Hyeb Youn, Byung Gyu Chae
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Patent number: 6929970Abstract: A process for preparing a layer of a nano-porous metal oxide semiconductor comprising the steps of: (i) providing metal oxide semiconductor nano-particles prepared by a wet precipitation process, (ii) heating said nano-particles at a temperature in the range of 250 to 600° C., (iii) preparing a dispersion of said heat-treated nano-particles from step (ii), (iv) applying said dispersion prepared in step (iii) to a support to produce a coating; and (v) subjecting said coating to a pressure in the range of 100 to 1000 bar at a temperature below 250° C.; a layer of a nano-porous metal oxide semiconductor obtained by this process; and a photovoltaic device comprising a layer of a nano-porous metal oxide semiconductor obtained by this process.Type: GrantFiled: September 11, 2003Date of Patent: August 16, 2005Assignee: Agfa-GevaertInventors: Hieronymus Andriessen, Joop Van Deelen, Jan Kroon
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Patent number: 6924159Abstract: To provide a semiconductor substrate of a group III nitride with low defect density and little warp, this invention provides a process comprising such steps of: forming a GaN layer 2 on a sapphire substrate 1 of the C face ((0001) face); forming a titanium film 3 thereon; heat-treating the substrate in an atmosphere containing hydrogen gas or a gas of a compound containing hydrogen to form voids in the GaN layer 2; and thereafter forming a GaN layer 4 on the GaN layer 2?.Type: GrantFiled: March 26, 2002Date of Patent: August 2, 2005Assignees: NEC Corporation, Hitachi Cable, Ltd.Inventors: Akira Usui, Masatomo Shibata, Yuichi Oshima
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Patent number: 6916981Abstract: The objects of the present invention are to provide semiconductor layers for obtaining solar cells having a relatively high energy conversion efficiency, solar cells using the same, and their production methods and uses; all of which are solved by providing semiconductor layers that are used in solar cells and constructed by semiconductor particle groups having a plurality of peaks in particle size distribution, solar cells using the same, and their production methods and uses.Type: GrantFiled: March 22, 2001Date of Patent: July 12, 2005Assignee: Kabushiki Kaisha Hayashibara Seibutsu Kagaku KenkyujoInventors: Fumio Matsui, Hirofumi Mitekura, Kentaro Yano, Toshiki Koyama, Yoshio Taniguchi
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Patent number: 6908782Abstract: A p-type transparent conducting oxide film is provided which is consisting essentially of, the transparent conducting oxide and a molecular doping source, the oxide and doping source grown under conditions sufficient to deliver the doping source intact onto the oxide.Type: GrantFiled: August 17, 2001Date of Patent: June 21, 2005Assignee: Midwest Research InstittueInventors: Yanfa Yan, Shengbai Zhang
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Patent number: 6900382Abstract: Replacing liquid electrolytes with solid or quasi-solid electrolytes facilitates the production of photovoltaic cells using continuous manufacturing processes, such as roll-to-roll or web processes, thus creating inexpensive, lightweight photovoltaic cells using flexible plastic substrates.Type: GrantFiled: January 24, 2003Date of Patent: May 31, 2005Assignee: Konarka Technologies, Inc.Inventors: Kethinni Chittibabu, Savvas Hadjikyriacou
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Publication number: 20040232413Abstract: (Object)Type: ApplicationFiled: October 29, 2003Publication date: November 25, 2004Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
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Publication number: 20040221888Abstract: A dye-sensitized solar cell comprising a transparent conductive layer, a porous semiconductor layer on which a dye sensitizer is adsorbed, a carrier transport layer and an counter electrode which are formed in this order on a transparent substrate,Type: ApplicationFiled: April 2, 2004Publication date: November 11, 2004Applicant: Sharp Kabushiki KaishaInventors: Atsushi Fukui, Liyuan Han
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Patent number: 6800504Abstract: Methods of forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of the chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.Type: GrantFiled: November 1, 2002Date of Patent: October 5, 2004Assignee: Micron Technology, Inc.Inventors: Jiutao Li, Allen McTeer
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Publication number: 20040168718Abstract: Method for producing a hybrid organic solar cell having the general structureType: ApplicationFiled: March 12, 2004Publication date: September 2, 2004Inventors: Gabrielle Nelles, Akio Yasuda, Hans-Werner Schmidt, Mukundan Thelakkat, Christoph Schmitz
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Patent number: 6720202Abstract: Improved photovoltaic cells utilizing for a semiconductor layer, titanium dioxide powders, consisting of porous particles, ranging in size from 0.1 to 10 microns (10−6 meters), and possess relatively high bulk density combined with high surface area.Type: GrantFiled: July 17, 2002Date of Patent: April 13, 2004Inventor: Ying Wang
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Publication number: 20040067321Abstract: A method of forming a laminate and a method of manufacturing a photovoltaic device using the laminate are provided. The laminate forming method includes a first step of forming an intermediate layer on a base member, and a second step of forming a metal layer on the intermediate layer, the adhesion of the metal layer to the base member being lower than that of the intermediate layer, the reflectance of the metal layer being higher than that of the intermediate layer. The rate of formation of the metal layer is increased at an intermediate stage in the second step. The laminate thereby formed has improved characteristics and is capable of maintaining improved reflection characteristics and adhesion even under high-temperature and high-humidity conditions or during long-term use.Type: ApplicationFiled: July 11, 2003Publication date: April 8, 2004Applicant: CANON KABUSHIKI KAISHAInventors: Takaharu Kondo, Hideo Tamura, Atsushi Yasuno, Noboru Toyama, Yuichi Sonoda, Masumitsu Iwata, Akiya Nakayama, Yusuke Miyamoto
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Patent number: 6709958Abstract: Methods of forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of the chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.Type: GrantFiled: August 30, 2001Date of Patent: March 23, 2004Assignee: Micron Technology, Inc.Inventors: Jiutao Li, Allen McTeer
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Patent number: 6706962Abstract: Method for producing a hybrid organic solar cell having the general structure Substrate+EM/HTM/dye/SOL/EM, or Substrate+EM/SOL/dye/HTM/EM, or Substrate+EM/HTM/SOL/EM, in which EM is the electrode material that may be a transparent conductive oxide (TCO) or metal, with at least one of the EM layer(s) of the cell being a TCO, HTM is the hole transport material, SOL is a semiconducting oxide layer, “dye” is a suitable dye, and the SOL layer is vapor deposited.Type: GrantFiled: November 21, 2001Date of Patent: March 16, 2004Assignee: Sony International (Europe) GmbHInventors: Gabrielle Nelles, Akio Yasuda, Hans-Werner Schmidt, Mukundan Thelakkat, Christoph Schmitz
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Patent number: 6700058Abstract: A photoelectric conversion device comprising a semiconductor and an organic electrically conducting agent, wherein the organic electrically conducting agent exhibits a melting temperature Tm which is lower than the operation temperature of the photoelectric conversion device.Type: GrantFiled: May 25, 2001Date of Patent: March 2, 2004Assignee: Sony International (Europe) GmbHInventors: Gabriele Nelles, Akio Yasuda, Hans-Werner Schmidt, Thelakkat Mukundan, Haridas R. Karickal, Donal Lupo
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Patent number: 6696700Abstract: This invention provides a transparent Cu—Al—O semi-conducting film having a p-type conductivity greater than 0.95×10−1 S·cm−1. This invention also relates to a process for preparing a Cu—Al—O film having p-type conductivity, comprising: a) controllably vaporizing organo-copper and organo-aluminum precursors and carrying the vapors into a chemical vapor deposition chamber with an inert gas flow; b)reacting and depositing the vapors on a substrate, preferably a light-transmitting substrate, through a chemical vapor deposition process.Type: GrantFiled: March 8, 2002Date of Patent: February 24, 2004Assignee: National University of SingaporeInventors: Hao Gong, Yue Wang, Lei Huang
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Publication number: 20040031520Abstract: The invention, in one embodiment, is directed to a method of scoring the coating of a first coated base material at a temperature sufficiently elevated to part the coating and melt at least a portion of the first base material. In a further embodiment, the invention is directed to a method of forming a photovoltaic module by scoring a coating of a first coated base material at a temperature sufficiently elevated to part the coating and melt at least a portion of the first base material; scoring a coating of a second coated base material at a temperature sufficiently elevated to part the coating and at least a portion of the second base material; and joining the first and second base materials to form a photovoltaic module.Type: ApplicationFiled: January 24, 2003Publication date: February 19, 2004Applicant: Konarka Technologies, Inc.Inventor: James Ryan
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Publication number: 20040025934Abstract: A polymeric linking agent enables the manufacture of photovoltaic cells on flexible substrates, including, for example, polymeric substrates. Photovoltaic cells may be fabricated by a relatively simple continuous manufacturing process, for example, a roll-to-roll process, instead of a batch process.Type: ApplicationFiled: January 24, 2003Publication date: February 12, 2004Applicant: Konarka Technologies, Inc.Inventors: Kethinni Chittibabu, Russell Gaudiana
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Patent number: 6677516Abstract: A dye-sensitized photovoltaic cell comprising an electroconductive support, a porous photovoltaic layer constituted with a porous semiconductor layer containing a photosensitizing dye, a hole transporting layer, and a support on a counter electrode side, the porous photovoltaic layer having a multi-layer structure, and the semiconductor layer having a haze ratio at a wavelength in a visible light region of 60% or more.Type: GrantFiled: January 29, 2002Date of Patent: January 13, 2004Assignee: Sharp Kabushiki KaishaInventors: Yasuo Chiba, Masafumi Shimizu, Liyuan Han, Ryohsuke Yamanaka
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Patent number: 6673646Abstract: Compound semiconductor structures and devices can be grown on patterned oxide layers deposited on silicon. The deposition of Group II-VI and Group II-V compound semiconductors on patterned wafers results in an increase in the critical thickness for lattice mismatched layers and the relief of strain energy through side walls. As a result, high crystalline quality compound semiconductor material can be grown on less expensive and more accessible substrate to more cost effectively produce semiconductor components and devices having enhanced reliability.Type: GrantFiled: February 28, 2001Date of Patent: January 6, 2004Assignee: Motorola, Inc.Inventor: Ravindranath Droopad
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Patent number: 6664565Abstract: A ZnO crystal growing method having the steps of: growing a low temperature growth ZnO layer on a sapphire substrate at a temperature lower than a single crystal ZnO growth temperature; thermally processing the low temperature growth ZnO layer at a temperature near to a growth temperature of a high temperature growth single crystal ZnO layer higher than the growth temperature low temperature growth ZnO layer; and growing a high temperature growth single crystal ZnO layer on the low temperature growth ZnO layer at a temperature higher than the growth temperature of the of the low temperature growth ZnO layer. ZnO crystal of good quality with a reduced number of crystal defects can be grown on a sapphire substrate.Type: GrantFiled: August 25, 2000Date of Patent: December 16, 2003Assignees: Stanley Electric Co., Ltd.Inventors: Michihiro Sano, Takafumi Yao
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Patent number: 6660931Abstract: A substrate for a solar cell is provided which comprises a support having a metal surface and a zinc oxide film formed on the metal surface and having a water content of 7.5×10−3 mol/cm3 or less, preferably 4.0×10−4 mol/cm3 or more. Thereby, the increase of series resistance and the generation of shunt are prevented and the efficiency such as Jsc and the chemical stability are improved, thus obtaining a solar cell with a zinc oxide film having optimal overall characteristics.Type: GrantFiled: August 1, 2002Date of Patent: December 9, 2003Assignee: Canon Kabushiki KaishaInventors: Noboru Toyama, Yuichi Sonoda, Yusuke Miyamoto
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Patent number: 6657119Abstract: An electrolytic cell assembly, e.g. for use in solar panels, is formed by placing coated metal wires (7,9) between the conducting layers (3,6) of two conducting glasses (1,4), respectively. A pressure force (F) is applied to press the metal wires between the conducting layers and to break the coating of the wires, thereby bringing the metal wires in electrical contact with the conducting layers. The coating protects the wires from harmful contact with an electrolyte inside the cell.Type: GrantFiled: December 14, 2001Date of Patent: December 2, 2003Assignee: Forskarpatent I Uppsala ABInventors: Sten-Eric Lindquist, Anders Hagfeldt, Henrik Lindstrom, Sven Södergren
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Patent number: 6653701Abstract: A semiconductor device having laminated successively a porous semiconductor layer, an inorganic semiconductor layer, and optionally an organic substance layer formed therebetween is disclosed. The semiconductor device is produced by immersing a porous semiconductor layer or a semiconductor layer having an organic substance layer on the surface thereof in a solution containing the elements constituting an inorganic semiconductor or compounds of the elements and forming the inorganic semiconductor layer on the porous semiconductor layer or the organic substance layer in the solution.Type: GrantFiled: March 7, 2000Date of Patent: November 25, 2003Assignee: Fuji Xerox Co., Ltd.Inventors: Yoshihisa Yamazaki, Yoshiyuki Ono, Hokuto Takada, Katsuhiro Sato, Akira Imai, Hidekazu Hirose
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Patent number: 6652904Abstract: The present invention relates to manufacturing of regenerative photovolatic photoelectrochemical (RPEC) devices. The invention describes a method for manufacturing RPEC devices in a production line. The method comprises the steps of: dispensing a protective film in a substantially continuous sheet; attaching at least one substrate to the protective film in such a way that predetermined areas of the substrate are protected from being coated during at least one subsequent manufacturing process; using the protective films as a means to transport the substrate, along the production line through the at least one subsequent manufacturing process.Type: GrantFiled: November 30, 2001Date of Patent: November 25, 2003Assignee: Sustainable Technologies International Pty. LimitedInventors: George Phani, Jason Andrew Hopkins, David Vittorio
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Patent number: 6649824Abstract: A photoelectric conversion device comprising at least an electron acceptive charge transfer layer, an electron donative charge transfer layer, and a light absorption layer existing between the charge transfer layers, wherein either one of the charge transfer layers comprises a semiconductor acicular crystal layer comprising an aggregate of acicular crystals or a mixture of an acicular crystal and another crystal, and a method of producing the device are disclosed. Consequently, a photoelectric conversion device being capable of smoothly carrying out transfer of electrons and having high photoelectric conversion efficiency is provided.Type: GrantFiled: September 20, 2000Date of Patent: November 18, 2003Assignee: Canon Kabushiki KaishaInventors: Tohru Den, Hiroshi Okura
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Publication number: 20030192585Abstract: The invention, in one aspect, provides a photovoltaic cell including a charge carrier material and a photosensitized interconnected nanoparticle material including nanoparticles linked by a polymeric linking agent, both disposed between first and second rigid, significantly light-transmitting substrates. In one embodiment, the charge carrier material and the photosensitized interconnected nanoparticle material are disposed between a first and second flexible, significantly light-transmitting substrate that are themselves disposed between the first and second rigid, significantly light-transmitting substrates.Type: ApplicationFiled: January 24, 2003Publication date: October 16, 2003Applicant: Konarka Technologies, Inc.Inventors: Bill Beckenbaugh, Russell Gaudiana