Abstract: Devices having voids are producible by employing an electrochemical corrosion process. For example, an electrically conductive region is formed to have a surrounding chemically distinct region. Such formation is possible through conventional semiconductor processing techniques such as a copper damascene process. The surrounded conducting material is configured to be in electrical communication with a charge separation structure. The electrically conducting region is contacted with a fluid electrolyte and electromagnetic radiation is made to illuminate the charge separation region to induce separation of electrons and holes. The resulting separated charges are used to drive an electrochemical corrosion process at the conductive material/electrolyte interface resulting in the removal of at least a portion of the electrically conducting material.

Abstract: A method is provided for controlling substrate thickness. At least one etchant is dispensed from at least one dispenser to a plurality of different locations on a surface of a spinning substrate to perform etching. A thickness of the spinning substrate is monitored at the plurality of locations, so that the thickness of the substrate is monitored at each individual location while dispensing the etchant at that location. A respective amount of etching performed at each individual location is controlled, based on the respective monitored thickness at that location.

Abstract: A method for forming identical isotropic etch patterns in an etch system is disclosed. The method comprises providing a wafer paddle, a wafer, a plurality of identical etch systems, utilizing identical etch recipes within each of the plurality of etch systems, providing a fixed temperature stability time FTST for each system so that the heat transfer from the paddle to the wafer is constant, wherein the FTST is the same on each of the plurality of etch systems; and utilizing the plurality of identical etch systems to produce identical etches on each of the wafers based upon the FTST, wherein a five-second preheat step in the etch process is not utilized.

Abstract: A virtual ground array structure uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities and smaller packaging.

Abstract: An insulating film is formed on a main surface of a substrate. A conductive film is formed on the insulating film. A lower layer resist film, an intermediate layer, an anti-reflection film and an upper layer resist film are formed on the conductive film. A focal point at a time of exposure is detected by detecting a height of the upper layer resist film. In detecting the focal point at the time of exposure, a focal point detection light is radiated on the upper layer resist film. After detecting the focal point, the upper layer resist film is exposed and developed thereby to form a resist pattern. With the resist pattern as a mask, the intermediate layer and the anti-reflection film are patterned, and the lower layer resist film is developed. With these patterns as a mask, the conductive film is etched thereby to form a gate electrode.

Abstract: The present invention provides a signal transmitting/receiving method comprising: disposing a ferromagnetic film between a semiconductor device having an inductor and an external device which includes an external inductor provided in a position corresponding to the inductor of the semiconductor device; disposing the inductor and the external inductor so as to face each other via the ferromagnetic film therebetween; and in a state in which the inductor and the external inductor face each other, transmitting and receiving the signals between the inductor and the external inductor by electromagnetic induction.

Abstract: A thermal treatment apparatus having a first light source emitting a first light having light diffusion property, a reflectance measuring unit irradiating a treatment target with the light from plural directions by the first light source and determining a light reflectance of the treatment target, a light irradiation controller adjusting an intensity of a second light of a second light source on the basis of the light reflectance, the second light has diffusion property, and a thermal treatment unit irradiating the treatment target with the second light having adjusted the intensity of the second light by the light irradiation controller.

Abstract: The present invention relates to methods and apparatus for providing composition control to thin compound semiconductor films for radiation detector and photovoltaic applications. In one aspect of the invention, there is provided a method in which the molar ratio of the elements in a plurality of layers are detected so that tuning of the multi-element layer can occur to obtain the multi-element layer that has a predetermined molar ratio range. In another aspect of the invention, there is provided a method in which the thickness of a sub-layer and layers thereover of Cu, In and/or Ga are detected and tuned in order to provide tuned thicknesses that are substantially the same as pre-determined thicknesses.

Abstract: A method of imaging and identifying materials, contamination, fabrication errors, and defects on and below the surface of an integrated circuit (IC) is described. The method may be used in areas smaller than one micron in diameter, and may remove IC layers, either selectively or non-selectively, until a desired depth is obtained. An energetic beam, such as an electron beam, is directed at a selected IC location. The IC has a layer of a solid, fluid or gaseous reactive material, such as a directed stream of a fluorocarbon, formed over the surface of the IC. The energetic beam disassociates the reactive material in or on the region into chemical radicals that chemically attack the surface. The surface may be examined as various layers are selectively removed in the controlled area spot etch, and SEM imaging may then be used to diagnose problems.

Abstract: A method for forming a semiconductor laser chip is provided that can suppress layer discontinuity and simultaneously reduce fabrication variations in the light radiation angle in the horizontal direction. The method includes a step of forming, on an n-type GaAs substrate, a semiconductor element layer composed of a plurality of semiconductor layers including an etching marker layer, a step of forming, in a contact layer in the semiconductor element layer, a depressed portion having a depth not reaching the etching marker layer, and a step of forming a ridge portion by etching the semiconductor element layer by dry etching while monitoring, with laser light, the etching depth in the bottom region of the depressed portion.

Abstract: A method of forming an isolated electrically conductive contact through a metal substrate by creating at least one via through the substrate. The at least one sidewall of the via is cleaned and coated with a non-conductive layer. In one example, the non-conductive layer is formed by anodizing the sidewall(s) of the via. In another example, the non-conductive layer may be formed by thin film deposition of a dielectric on the sidewall(s). An electrically conductive filler is then placed into the via. In the examples disclosed, the filler may be a conductive ink or a conductive epoxy.

Abstract: In a plasma reactor chamber a ceiling electrode and a workpiece support electrode, respective RF power sources of respective VHF frequencies f1 and f2 are coupled to either respective ones of the electrodes or to a common one of the electrodes, where f1 is sufficiently high to produce a center-high non-uniform plasma ion distribution and f2 is sufficiently low to produce a center-low non-uniform plasma ion distribution. Respective center ground return paths are provided for RF current passing directly between the ceiling electrode and the workpiece support electrode for the frequencies f1 and f2, and an edge ground return path is provided for each of the frequencies f1 and f2. The impedance of at least one of the ground return paths is adjusted so as to control the uniformity of the plasma ion density distribution.

Abstract: A method is provided for processing a workpiece in a plasma reactor chamber having electrodes including at least a ceiling electrode and a workpiece support electrode. The method includes coupling respective RF power sources of respective VHF frequencies f1 and f2 to either (a) respective ones of the electrodes or (b) a common one of the electrodes, where f1 is sufficiently high to produce a center-high non-uniform plasma ion distribution and f2 is sufficiently low to produce a center-low non-uniform plasma ion distribution. The method further includes adjusting a ratio of an RF parameter at the f1 frequency to the RF parameter at the f2 frequency so as to control plasma ion density distribution, the RF parameter being any one of RF power, RF voltage or RF current.

Abstract: A processing system and method for chemical oxide removal (COR) is presented, wherein the processing system comprises a first treatment chamber and a second treatment chamber, wherein the first and second treatment chambers are coupled to one another. The first treatment chamber comprises a chemical treatment chamber that provides a temperature controlled chamber, and an independently temperature controlled substrate holder for supporting a substrate for chemical treatment. The substrate is exposed to a gaseous chemistry, such as HF/NH3, under controlled conditions including surface temperature and gas pressure. The second treatment chamber comprises a heat treatment chamber that provides a temperature controlled chamber, thermally insulated from the chemical treatment chamber. The heat treatment chamber provides a substrate holder for controlling the temperature of the substrate to thermally process the chemically treated surfaces on the substrate.

Abstract: A method for forming a shallow trench isolation (STI) structure with a predetermined target height is provided. A substrate having a pad oxide layer formed on the substrate is provided. A nitride-containing layer with a thickness is formed on the pad oxide. A STI structure is formed and extends through the nitride-containing layer, the pad oxide layer, into the substrate. The thickness of the nitride-containing layer is measured to calculate the height of STI structure according to a correlation between the thickness of the nitride-containing layer and the height of STI structure. A thickness of the top portion STI structure to be removed is determined according to the difference between the height of the STI structure and the predetermined target height and is removed in a first etching process. The nitride-containing layer is removed without etching the STI structure or the pad oxide layer in a second etching process.

Abstract: A metal wiring forming method in a semiconductor device can include forming an interlayer insulating film on a lower metal wiring, the first interlayer insulating film having a non-planar upper surface; forming a stop layer on the interlayer insulating film and over the lower metal wiring; forming an interlayer insulating film pattern on the stop layer, wherein an upper surface of the interlayer insulating film pattern and an upper surface of the stop layer are substantially coplanar; removing a portion of the stop layer to form a stop layer pattern, wherein a portion of the interlayer insulating film over the lower metal wiring is exposed by the stop layer pattern; and etching the exposed portion of the interlayer insulating film to form a via hole therethrough, wherein the lower metal wiring is exposed by the via hole.

Abstract: Methods for monitoring process drift using plasma characteristics are provided. In one embodiment, a method for monitoring process drift using plasma characteristics includes obtaining metrics of current and voltage information of a first waveform coupled to a plasma during a plasma process formed on a substrate, obtaining metrics of current and voltage information of a second waveform coupled to the plasma during the plasma process formed on the substrate, the first and second waveforms having different frequencies, determining at least one characteristic of the plasma using the metrics obtained from each different frequency waveform, and adjusting the plasma process in response to the determined at least one characteristic of the plasma.

Abstract: A writing data processing control apparatus includes an assignment part configured to assign processing of a plurality of pieces of writing data of predetermined divided writing regions, stored in a storage device, one by one to one of a plurality of processing apparatuses in which processing is performed in parallel, and a separation part configured, when a processing error occurred as a result of processing of writing data read from the storage device by a first processing apparatus assigned, to separate the first processing apparatus in which the processing error occurred from assigning targets of subsequent writing data processing, wherein the assignment part reassigns the processing of the writing data in which the processing error occurred to a second processing apparatus being different from the first processing apparatus.

Abstract: In an embodiment of the present invention, a device includes a first etched feature located in a critical dimension scanning electron microscope (CD-SEM) characterization location, the first etched feature having an upper section, a middle section, and a lower section wherein the middle section is severely shrunk relative to a corresponding middle section of a second etched feature having similar dimensions and composition that is not located in a CD-SEM characterization location. In another embodiment of the present invention, the middle section of the first etched feature has a shrinkage carryover exceeding a threshold. In still another embodiment of the present invention, the middle section of the first etched feature exhibits a line edge roughness.

Abstract: When scribing a substrate, the precise location of the outer peripheral edge of the substrate on a stage is determined and movement of a scribe tool is controlled to first bring the scribe tool into engagement with the substrate at a location inwardly of the outer peripheral edge of the substrate. After a downwardly directed force of predetermined magnitude exerted by the scribe tool has been attained and stabilized, the scribe tool is moved along the substrate to form a scribe line.

Abstract: The invention involves a method of processing a workpiece on workpiece support pedestal in a plasma reactor chamber in accordance with user-selected values of plural (i.e., N) plasma parameters by controlling plural chamber parameters. The plasma parameters may be selected from of a group including ion density, wafer voltage, etch rate, wafer current and possibly other plasma parameters. The chamber parameters may be selected from a group including source power, bias power, chamber pressure, magnet coil current of different coils, gas flow rate in different gas injection zones, gas species composition in different gas injection zones, and possibly other chamber parameters. The method begins with a first step carried out for each one of the selected plasma parameters.

Abstract: A wet processing system detects a globule of a process solution in a drippy or dripping state from the tip of any one of process solution pouring nozzles being moved to a pouring position for pouring the process solution onto a substrate by obtaining image data on the process solution pouring nozzle, and takes proper measures to prevent the process solution from dripping. A wet processing system 1 pours a process solution, such as a resist solution, through one of process solution pouring nozzles 10 onto a surface of a substrate, such as a wafer W, held substantially horizontally by a substrate holding device 41 surrounded by a cup 5 to process the surface by a wet process. A nozzle carrying mechanism 10a carries the process solution pouring nozzles 10 between a home position on a nozzle bath 14 and a pouring position above the substrate held by the substrate holding device 41. An optical image of the tips of the process solution pouring nozzles 10 is obtained by an image pickup means, such as a camera 17.

Abstract: An apparatus includes a process chamber configured to perform an ion implantation process. A cooling platen or electrostatic chuck is provided within the process chamber. The cooling platen or electrostatic chuck is configured to support a semiconductor wafer. The cooling platen or electrostatic chuck has a plurality of temperature zones. Each temperature zone includes at least one fluid conduit within or adjacent to the cooling platen or electrostatic chuck. At least two coolant sources are provided, each fluidly coupled to a respective one of the fluid conduits and configured to supply a respectively different coolant to a respective one of the plurality of temperature zones during the ion implantation process. The coolant sources include respectively different chilling or refrigeration units.

Abstract: A method for fabricating a semiconductor laser device, by etching facets using a photoelectrochemical (PEC) etch, so that the facets are sufficiently smooth to support optical modes within a cavity bounded by the facets.

Abstract: Methods and apparatus for spectrum-based endpointing. An endpointing method includes selecting a reference spectrum. The reference spectrum is a spectrum of white light reflected from a film of interest on a first substrate and has a thickness greater than a target thickness. The reference spectrum is empirically selected for particular spectrum-based endpoint determination logic so that the target thickness is achieved when endpoint is called by applying the particular spectrum-based endpoint logic. The method includes obtaining a current spectrum. The current spectrum is a spectrum of white light reflected from a film of interest on a second substrate when the film of interest is being subjected to a polishing step and has a current thickness that is greater than the target thickness. The method includes determining, for the second substrate, when an endpoint of the polishing step has been achieved. The determining is based on the reference and current spectra.

Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.

Abstract: A failure alarm device includes: an operation instruction capturing unit; an operation status signal capturing unit; and a timing and alarming unit for starting timing when the operation instruction capturing unit captures a start-operation instruction and the operation status signal capturing unit captures an operation status signal indicative of that the CMP apparatus is in the preset operation status, and for alarming if a duration of the operation status signal indicative times out. During operation of the CMP apparatus, when there occurs an unexpected failure in a computer or control software or the CMP apparatus is powered off, an alarm can be initiated in a timely way so as to inform an apparatus engineer to obviate the failure, and wafer rejects in the CMP apparatus can be avoided. A failure alarm method is also provided.

Abstract: A method for forming copper wirings in a semiconductor device may include depositing a lower insulating film over a semiconductor substrate; forming vias in the lower insulating film; depositing tungsten over the entire surface of upper portion of the lower insulating film so that the vias are gap-filled with the tungsten; forming tungsten plugs by performing a tungsten chemical mechanical polishing process to remove excess tungsten deposited over the upper portion of the lower insulating film; removing the tungsten remaining over the upper portion of the lower insulating film by performing a tungsten etchback process; depositing an upper insulating film over the upper portion of the lower insulating film; exposing upper portions of the tungsten plugs by forming trenches on the upper insulating film; depositing copper over the entire surface of the upper insulating film so that the trenches are gap-filled with the copper; and planarizing the copper over the upper portion of the trenches.

Abstract: An optical structure that reduces the effects of spontaneous emissions from the active region of a laser. An optical structure includes optimizations to reduce the effects of spontaneous emissions. The optical structure includes a VCSEL with top and bottom DBR mirrors and an active region connected to the mirrors. The optical structure further includes a photodiode connected to the VCSEL. One or more optimizations may be included in the optical structure including optically absorbing materials, varying the geometry of the structure to change reflective angles, using optical apertures, changing the reflectivity of one or more mirrors, changing the photodiode to be more impervious to spontaneous emissions, and using ion implants to reduce photoluminescence efficiency.

Abstract: A method for making transmission electron microscope gird is provided. An array of carbon nanotubes is provided and drawing a carbon nanotube film from the array of carbon nanotubes. A substrate has a plurality of spaced metal girds attached on the substrate. The metal girds are covered with the carbon nanotube film and treating the carbon nanotube film and the metal girds with organic solvent. A transmission electron microscope (TEM) grid is obtained by removing remaining CNT film.

Abstract: Methods for processing a substrate in a processing chamber using dual RF frequencies are provided herein. In some embodiments, a method of processing a substrate includes forming a plasma of a polymer forming chemistry to etch a feature into a substrate disposed on a substrate support in a process chamber while depositing a polymer on at least portions of the feature being etched. A low frequency and a high frequency RF signal are applied to an electrode disposed in the substrate support. The method further includes controlling the level of polymer formation on the substrate, wherein controlling the level of polymer formation comprises adjusting a power ratio of the high frequency to the low frequency RF signal.

Abstract: A method of controlling the polishing of a substrate includes polishing a substrate on a first platen using a first set of parameters, obtaining first and second sequences of measured spectra from first and second regions of the substrate with an in-situ optical monitoring system, generating first and second sequences of values from the first and second sequences of measured spectra, fitting first and second linear functions to the first and second sequences of values, determining a difference between the first linear function and the second linear function, adjusting at least one parameter of a second set of parameters based on the difference, and polishing the substrate on a second platen using the adjusted parameter.

Abstract: A wet-etch composition may include: peracetic acid (PAA); and a fluorinated acid; a relative amount of the PAA in the composition being sufficient to ensure an etch rate of (P-doped-SiGe):(P-doped-Si) that is substantially the same as an etch rate of (N-doped-SiGe):(N-doped-Si). Such a wet-etch composition is hereafter referred to as a PAA-based etchant and can be used to make, e.g., a CMOS MBCFET, an electrode of a capacitor, etc.

Abstract: During the patterning of respective contact etch stop layers having a different type of intrinsic stress, the deposition of an etch indicator layer between the first and the second contact etch stop layer may be omitted in order to avoid any undue effects of this layer during the subsequent processing. Local removal of the second stressed layer may be performed on the basis of an etch time controlled etch process, which in some aspects may include the provision of an etch indicator material, wherein feed forward and feed back measurement data may be used in an appropriately designed process controller.

Abstract: A microelectromechanical device and method of fabricating the same, including a layer of patterned and deposited metal or mechanical-quality, doped polysilicon inserted between the appropriate device element layers, which provides a conductive layer to prevent the microelectromechanical device's output from drifting. The conductive layer may encapsulate of the device's sensing or active elements, or may selectively cover only certain of the device's elements. Further, coupling the metal or mechanical-quality, doped polysilicon to the same voltage source as the device's substrate contact may place the conductive layer at the voltage of the substrate, which may function as a Faraday shield, attracting undesired, migrating ions from interfering with the output of the device.

Abstract: In a substrate processing control method, a first process acquires a first-reflectance-spectrum of a beam reflected from the first-fine-structure and a second-reflectance-spectrum of a beam reflected from the second-fine-structure for each of varying-pattern-dimensions of the first-fine-structure when the pattern-dimension of the first-fine-structure is varied. A second process acquires reference-spectrum-data for each of the varying-pattern-dimensions of the first-fine-structure by overlapping the first-reflectance-spectrum with the second-reflectance-spectrum. A third process actually measures beams reflected from the first and the second-fine-structure, respectively, after irradiating light beam on to the substrate and acquiring reflectance-spectrums of the actual-measured beams as actual-measured spectrum data.

Abstract: The present invention relates to a novel etching solution suitable for characterizing defects on semiconductor surfaces, including silicon germanium surfaces, as well as a method for treating semiconductor surfaces with an etching solution as disclosed herein. This novel etching solution is chromium-free and enables a highly sufficient etch rate and highly satisfactory etch results.

Abstract: A semiconductor wafer is produced by a method comprising a slicing step, an one-side polishing step and a chemical treating step, in which the kerf loss is reduced and the flatness is improved.

Abstract: Methods for controlling the profile of a trench of a semiconductor structure comprise the step of depositing a photoresist within a via and overlying a second dielectric layer. An image layer is deposited overlying the photoresist and is patterned to form a first trench having a first width and a second width that are not equal and a first angle. The photoresist is dry etched using dry etch parameters, at least one of which is selected based on the first angle and the first and the second widths of the first trench to form a second trench in the photoresist. The second dielectric layer is etched to form a third trench.

Abstract: A method for correcting a mask pattern used for dry-etching an object with higher accuracy, and for manufacturing an acceleration sensor and an angular velocity sensor. The object is first etched by a dry-etching process using an uncorrected reference mask pattern. Then, distribution of the size of expansion of a tapered portion formed in a surface of the object is measured. Thereafter, the measured distribution is approximated by using a quadratic curve (Y=AX2+B) so as to determine A and B. Consequently, an amount t of correction for the tapered portion, which is expressed by the following equation (1) and related to a width of an opening of the mask pattern in a position at a distance r from a center of the object to be etched, can be set. In this way, the correction for the tapered portion can be carried out.

Abstract: Process control monitors are disclosed that are produced using at least some of the same process steps used to manufacture a MEMS device. Analysis of the process control monitors can provide information regarding properties of the MEMS device and components or sub-components in the device. This information can be used to identify errors in processing or to optimize the MEMS device. In some embodiments, analysis of the process control monitors may utilize optical measurements.

Abstract: Methods for determining characteristics of a plasma are provided. In one embodiment, a method for determining characteristics of a plasma includes obtaining metrics of current and voltage information for first and second waveforms coupled to a plasma at different frequencies, determining at least one characteristic of the plasma using the metrics obtained from each different frequency waveform. In another embodiment, the method includes providing a plasma impedance model of a plasma as a function of frequency, and determining at least one characteristic of a plasma using model. In yet another embodiment, the method includes providing a plasma impedance model of a plasma as a function of frequency, measuring current and voltage for waveforms coupled to the plasma and having at least two different frequencies, and determining ion mass of a plasma from model and the measured current and voltage of the waveforms.

Abstract: In a dual stress liner approach, the surface conditions after the patterning of a first stress-inducing layer may be enhanced by appropriately designing an etch sequence for substantially completely removing an etch stop material, which may be used for the patterning of the second stress-inducing dielectric material, while, in other cases, the etch stop material may be selectively formed after the patterning of the first stress-inducing dielectric material. Hence, the dual stress liner approach may be efficiently applied to semiconductor devices of the 45 nm technology and beyond.

Abstract: A memory and method of making a memory is disclosed. In one embodiment, the memory includes a cap structure for a magnetoresistive random access memory device including an etch stop layer formed over an upper magnetic layer of a magnetoresistive junction (MTJ/MCJ) layered structure and a hardmask layer formed over said etch stop layer, wherein said etch stop layer is selected from a material such that an etch chemistry used for removing said hardmask layer has selectivity against etching said etch stop layer material. In a method of opening the hardmask layer, an etch process to remove exposed portions of the hardmask layer is implemented, where the etch process terminates on the etch stop layer.

Abstract: Methods of manufacturing a semiconductor device and an apparatus for the manufacturing of semiconductor devices are provided. An embodiment regards providing a process which changes the volume of at least one layer of a semiconductor substrate or of at least one layer deposited on the semiconductor substrate, and measuring a change in volume of such at least one layer using fluorescence. In another embodiment, a change in volume of such at least one layer is measured using reflection of electromagnetic waves.

Abstract: A method is provided for controlling substrate thickness. At least one etchant is dispensed from at least one dispenser to a plurality of different locations on a surface of a spinning substrate to perform etching. A thickness of the spinning substrate is monitored at the plurality of locations, so that the thickness of the substrate is monitored at each individual location while dispensing the etchant at that location. A respective amount of etching performed at each individual location is controlled, based on the respective monitored thickness at that location.

Abstract: A method for controlling a gap in an electrically conducting solid state structure provided with a gap. The structure is exposed to a fabrication process environment conditions of which are selected to alter an extent of the gap. During exposure of the structure to the process environment, a voltage bias is applied across the gap. Electron tunneling current across the gap is measured during the process environment exposure and the process environment is controlled during process environment exposure based on tunneling current measurement. A method for controlling the gap between electrically conducting electrodes provided on a support structure. Each electrode has an electrode tip separated from other electrode tips by a gap. The electrodes are exposed to a flux of ions causing transport of material of the electrodes to corresponding electrode tips, locally adding material of the electrodes to electrode tips in the gap.

Abstract: The present invention relates to a method for characterizing defects on silicon surfaces, such as silicon wafers, a method for treating silicon surfaces with an etching solution, and an etching solution to be employed in the treating and defect characterization of such silicon wafer surfaces.

Abstract: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (2) which is provided with at least one semiconductor element and the surface of which is provided with an aluminum layer (3) that is patterned by means of a chemical-mechanical polishing process, the side of the device (10) covered with the aluminum layer (3) being pressed against a polishing pad (5), the device (10) and the pad (5) being moved with respect to each other, a slurry (6) containing an abrasive and having a pH level lower than about 12 being applied between the device (10) and the pad (5), and the polishing process being continued till a sufficient amount of the aluminum layer (3) has been removed. According to the invention, the slurry (6) between the device (10) and the pad (5) is provided with a pH level lower than 5 and the pH level is created using merely an acid the aluminum salt of which dissolves well in the slurry (6).

Abstract: A method is provided, of manufacturing a material to be etched that can more preferably prevent a region to be etched from remaining as an un-etched region and reduce deviation of etched/un-etched regions. Patterning (a method of manufacturing a material to be etched) of a substrate 100, which is manufactured by performing etching through an opened region 10 by an etching mask M1, is performed by a first etching process and a second etching process that is performed after the first etching process. The second etching process is a process for etching a region including a region that is not etched by the first etching process. An un-etched region, which is the same as etched using a virtual etching mask M1?, is formed on the surface of an object to be etched by the first and second etching processes.