Compound Semiconductor Patents (Class 438/93)
  • Patent number: 12211948
    Abstract: A method of fabricating multijunction solar cell including an upper solar subcell and having an emitter of p conductivity type with a first band gap, and a base of n conductivity type with a second band gap greater than the first band gap; a lower solar subcell disposed below the upper solar subcell having an emitter of p conductivity type with a third band gap, and a base of n conductivity type with a fourth band gap greater than the third band gap; and an intermediate grading interlayer disposed between the upper and lower solar subcells and having a graded lattice constant that matches the upper first subcell on a first side and the second solar subcell on the second side opposite the first side, and having a fifth band gap that is greater than the second band gap of the upper solar subcell.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: January 28, 2025
    Assignee: SolAero Technologies Corp.
    Inventor: Daniel Derkacs
  • Patent number: 12176454
    Abstract: Described herein is a semiconductor structure, comprising: a drain region; a drift region comprised of a wide band gap material disposed over the drain region; and a channel structure disposed over the drift region. In some embodiments, the channel structure comprises: an optically active material disposed over the drift region, wherein the optically active material generates charge carriers in response to an optical signal; and a source region disposed over the optically active material, wherein in an off state charge carriers in the optically active material are depleted to turn off the semiconductor structure, and in an on state charge carriers in the optically active material conduct a current in the semiconductor structure when an electric field is applied across the source region and drain region, causing the current to substantially flow directly between the source region and the drain region.
    Type: Grant
    Filed: April 5, 2024
    Date of Patent: December 24, 2024
    Assignee: Massachusetts Institute of Technology
    Inventors: Tomas Palacios, Jung-Han Hsia
  • Patent number: 12120892
    Abstract: The application relates to organic-inorganic hybrid perovskites of formula (I): [(A)1?2.48p?b(B)3.48p+b](1+2p?y)/1+p)(Pb)1?p?m(M)m(X1)3?y?q(X2)q(I), and perovskite photovoltaic cells comprising the same.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: October 15, 2024
    Assignees: UNIVERSITÉ D'ANGERS, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS), CHIMIE PARISTECH
    Inventors: Nicolas Mercier, Antonin Leblanc, Thierry Pauporté
  • Patent number: 12080814
    Abstract: This application discloses a photoreceptor, a panel, and a method for manufacturing a photoreceptor. The photoreceptor includes a photosensitive layer. The photosensitive layer includes a subject entity including a plurality of holes, and an object entity including at least two photosensitive materials whose photosensitive wavelength bands are different. The holes of the subject entity are filled with the photosensitive materials.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: September 3, 2024
    Assignee: HKC CORPORATION LIMITED
    Inventors: En-Tsung Cho, Fengyun Yang
  • Patent number: 12057803
    Abstract: A device is provided. The device includes mechanically stacked layers. The mechanically stacked layers include a bottom layer and upper layers. Each upper layer includes a transmissive solar cell that converts light energy into electricity. Each upper layer transmits unconverted portions of the light energy towards the bottom layer. The bottom layer includes a solar cell that converts the unconverted portions of the light energy into electricity.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: August 6, 2024
    Assignee: CONTI INNOVATION CENTER, LLC
    Inventors: Kurt G. Conti, Cullin J. Wible
  • Patent number: 12040414
    Abstract: The present disclosure provides a solar cell module, comprising (a) a laminate substrate having a first surface and a second surface opposite the first surface, (b) a solar cell positioned on the first surface of the laminate substrate, (c) a first contact pad positioned on the first surface of the laminate substrate adjacent to the solar cell, (d) a second contact pad positioned on the second surface of the laminate substrate, (e) one or more vias positioned through the laminate substrate to electrically connect the first contact pad to the second contact pad, and (f) one or more interconnects extending from the solar cell and electrically coupling the solar cell to the first contact pad.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: July 16, 2024
    Assignee: The Boeing Company
    Inventor: Rina S. Bardfield
  • Patent number: 11970646
    Abstract: Disclosed are nanostructures comprising Ag, In, Ga, and S and a shell comprising Ag, Ga and S, wherein the nanostructures have a peak wavelength emission of 480-545 nm and wherein at least about 80% of the emission is band-edge emission. Also disclosed are methods of making the nanostructures.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: April 30, 2024
    Assignee: SHOEI CHEMICAL INC.
    Inventors: Ashenafi Damtew Mamuye, Christopher Sunderland, Ilan Jen-La Plante, Chunming Wang, John J. Curley, Nahyoung Kim, Ravisubhash Tangirala
  • Patent number: 11923470
    Abstract: A method includes forming an assembly of layers including an InP cap layer on an InGaAs absorption region layer, wherein the InGaAs layer is on an n-InP layer, and wherein an underlying substrate layer underlies the n-InP layer. The method includes removing a portion of the InP cap and n-InP layer by dry etching.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: March 5, 2024
    Assignee: Sensors Unlimited, Inc.
    Inventors: Wei Zhang, Douglas Stewart Malchow, Michael J. Evans, Paul L. Bereznycky, Sean T. Houlihan
  • Patent number: 11820670
    Abstract: The present invention relates to a semiconductor device comprising a semiconducting material, wherein the semiconducting material comprises a compound comprising: (i) one or more first monocations [A]; (ii) one or more second monocations [BI]; (iii) one or more trications [BIII]; and (iv) one or more halide anions [X]. The invention also relates to a process for producing a semiconductor device comprising said semiconducting material. Also described is a compound comprising: (i) one or more first monocations [A]; (ii) one or more second monocations [BI] selected from Cu+, Ag+ and Au+; (iii) one or more trications [BIII]; and (iv) one or more halide anions [X].
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: November 21, 2023
    Assignee: OXFORD UNIVERSITY INNOVATION LIMITED
    Inventors: Henry James Snaith, Amir Abbas Hagighirad, Feliciano Giustino, Marina Filip, George Volonakis
  • Patent number: 11769847
    Abstract: A solar panel includes a silicon cells submodule of silicon based cells, a front transparent plate and a backsheet. The backsheet is arranged with at least a first conductive pattern that is connected to rear surface electrical contacts on each of the silicon cells. A thin film photovoltaic submodule is arranged between the front transparent plate and the silicon cells, and includes thin film cells in an arrangement with two photovoltaic submodule contacts that connect to a second conductive pattern on the backsheet. The backsheet is arranged for four-terminal wiring with the first pattern for the silicon cells and the second pattern for the thin film cells. The thin film cells are disposed in a first group of cells and in at least a second group of cells, each connected in series. The first group is connected in parallel with the second group, between the photovoltaic submodule contacts.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: September 26, 2023
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO
    Inventors: Johannes Adrianus Maria van Roosmalen, Siegfried Christiaan Veenstra, Dong Zhang, Markus Johan Jansen
  • Patent number: 11728353
    Abstract: A photoelectric conversion device including a perovskite compound, a method of manufacturing the same and an imaging device including the same.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Yongchul Kim
  • Patent number: 11721780
    Abstract: Structures for an avalanche photodetector and methods of forming a structure for an avalanche photodetector. The structure includes a first semiconductor layer having a first portion and a second portion, and a second semiconductor layer stacked in a vertical direction with the first semiconductor layer. The first portion of the first semiconductor layer defines a multiplication region of the avalanche photodetector, and the second semiconductor layer defines an absorption region of the avalanche photodetector. The structure further includes a charge sheet in the second portion of the first semiconductor layer. The charge sheet has a thickness that varies with position in a horizontal plane, and the charge sheet is positioned in the vertical direction between the second semiconductor layer and the first portion of the first semiconductor layer.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: August 8, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Asif Chowdhury, Yusheng Bian
  • Patent number: 11616158
    Abstract: Methods are described that include contacting an alkyl ammonium metal halide film with an alkyl ammonium halide, where the alkyl ammonium metal halide film includes a first halogen and a metal, the alkyl ammonium halide includes a second halogen, such that the contacting forms an alkyl ammonium metal mixed-halide film that interfaces with the alkyl ammonium metal halide film, where the alkyl ammonium metal mixed-halide film includes the first halogen, the second halogen, and the metal.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: March 28, 2023
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Kai Zhu, Yixin Zhao, Mengjin Yang, Taiyang Zhang
  • Patent number: 11569091
    Abstract: Disclosed herein are techniques for bonding components of LEDs. According to certain embodiments, a device includes a first component and a second component. The first component includes a semiconductor layer stack having an n-side semiconductor layer, an active light emitting layer, and a p-side semiconductor layer. The semiconductor layer stack includes a III-V semiconductor material. The second component includes a passive or an active matrix integrated circuit within a Si layer. A first dielectric material of the first component is bonded to a second dielectric material of the second component. First contacts of the first component are aligned with and bonded to second contacts of the second component. The first contacts of the first component form a first pattern within the first dielectric material of the first component, and the second contacts of the second component form a second pattern within the second dielectric material of the second component.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: January 31, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Stephan Lutgen, Thomas Lauermann
  • Patent number: 11528442
    Abstract: A photodetector device is provided that includes a ROIC having a top surface with a plurality of electrically conductive first electrodes within a pattern of surface areas on the top surface each surface area having a border, and an electrically conductive electrode grid having a portion on the border of each of the surface areas; and a photodetector film overlying the surface area. The electrode grid can be configured to surround each surface area to define the borders of the surface areas as pixels. The photodetector film can be a colloidal quantum dot film. The ROIC has circuit elements signal-connected to the plurality of first electrodes. Methods for forming the photodetector device include photolithography and deposition methods.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: December 13, 2022
    Assignee: Sivananthan Laboratories, Inc.
    Inventors: Richard Edward Pimpinella, Anthony Joseph Ciani, Christoph H. Grein
  • Patent number: 11037839
    Abstract: A method for fabricating an integrated structure, using a fabrication system having a CMOS line and a photonics line, includes the steps of: in the photonics line, fabricating a first photonics component in a silicon wafer; transferring the wafer from the photonics line to the CMOS line; and in the CMOS line, fabricating a CMOS component in the silicon wafer. Additionally, a monolithic integrated structure includes a silicon wafer with a waveguide and a CMOS component formed therein, wherein the waveguide structure includes a ridge extending away from the upper surface of the silicon wafer. A monolithic integrated structure is also provided which has a photonics component and a CMOS component formed therein, the photonics component including a waveguide having a width of 0.5 ?m to 13 ?m.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: June 15, 2021
    Assignee: Rockley Photonics Limited
    Inventors: Aaron Zilkie, Andrew Rickman, Damiana Lerose
  • Patent number: 10541134
    Abstract: Halometallate-capped semiconductor nanocrystals and methods for making the halometallate-capped semiconductor nanocrystals are provided. Also provided are methods of using solutions of the halometallate-capped semiconductor nanocrystals as precursors for semiconductor film formation. When solutions of the halometallate ligand-capped semiconductor nanocrystals are annealed, the halometallate ligands can act as grain growth promoters during the sintering of the semiconductor nanocrystals.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: January 21, 2020
    Assignee: The University of Chicago
    Inventors: James Kurley, Hao Zhang, Dmitri V. Talapin, Jake Russell, Margaret Hervey Hudson
  • Patent number: 10319594
    Abstract: Disclosed herein is a wafer thinning method for thinning a wafer formed from an SiC substrate having a first surface and a second surface opposite to the first surface. The wafer thinning method includes a separation start point forming step of applying the laser beam to the second surface as relatively moving the focal point and the SiC substrate to thereby form a modified layer parallel to the first surface and cracks inside the SiC substrate at the predetermined depth, thus forming a separation start point, and a wafer thinning step of applying an external force to the wafer, thereby separating the wafer into a first wafer having the first surface of the SiC substrate and a second wafer having the second surface of the SiC substrate at the separation start point.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: June 11, 2019
    Assignee: DISCO CORPORATION
    Inventor: Kazuya Hirata
  • Patent number: 10121952
    Abstract: Disclosed herein is an isolable colloidal particle comprising a nanoparticle and an inorganic capping agent bound to the surface of the nanoparticle, a solution of the same, a method for making the same from a biphasic solvent mixture, and the formation of structures and solids from the isolable colloidal particle. The process can yield photovoltaic cells, piezoelectric crystals, thermoelectric layers, optoelectronic layers, light emitting diodes, ferroelectric layers, thin film transistors, floating gate memory devices, imaging devices, phase change layers, and sensor devices.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: November 6, 2018
    Assignee: THE UNIVERSITY OF CHICAGO
    Inventors: Dmitri V. Talapin, Maksym V. Kovalenko, Jong-Soo Lee, Chengyang Jiang
  • Patent number: 10103185
    Abstract: A method of image sensor fabrication includes growing a semiconductor material having an illuminated surface and a non-illuminated surface, where the semiconductor material includes silicon and germanium and a germanium concentration increases in a direction of the non-illuminated surface. The method further includes forming a plurality of photodiodes, including a doped region and a heavily doped region, in the semiconductor material, where the doped region is of an opposite majority charge carrier type as the heavily doped region. A plurality of isolation regions are formed and disposed between individual photodiodes in the plurality of photodiodes, where the plurality of isolation regions surround, at least in part, the individual photodiodes and electrically isolate the individual photodiodes.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: October 16, 2018
    Assignee: OmniVision Technologies, Inc.
    Inventors: Dajiang Yang, Gang Chen, Duli Mao, Dyson H. Tai
  • Patent number: 10068762
    Abstract: Providing a manufacture method of a gate insulating film formed on an SiC substrate having thereon an SiON film, achieving both of the maintenance of an SiON film structure and the formation of a high-quality insulating film. A manufacture method of a gate insulating film for an SiC semiconductor device comprises preparing a transfer plate comprising a transfer substrate and an insulating film formed thereon; preparing a surface-processed substrate comprising an SiC substrate and an epitaxial silicon oxynitride film as an atomic monolayer formed thereon; and transferring the insulating film from the transfer plate onto the silicon oxynitride film of the surface-processed substrate to produce the surface-processed substrate having a transferred insulating film.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: September 4, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takuro Inamoto, Takeshi Fujii, Mariko Sato
  • Patent number: 9691955
    Abstract: Solid state lighting (“SSL”) devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device also includes a first contact on the first semiconductor material and a second contact on the second semiconductor material, where the first and second contacts define the current flow path through the SSL structure. The first or second contact is configured to provide a current density profile in the SSL structure based on a target current density profile.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: June 27, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Martin F. Schubert
  • Patent number: 9673167
    Abstract: This invention relates to a method for bonding of a first contact area of a first at least largely transparent substrate to a second contact area of a second at least largely transparent substrate, on at least one of the contact areas an oxide being used for bonding, from which an at least largely transparent interconnection layer is formed with an electrical conductivity of at least 10e1 S/cm2 (measurement: four point method, relative to temperature of 300K) and an optical transmittance greater than 0.8 (for a wavelength range from 400 nm to 1500 nm) on the first and second contact area.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: June 6, 2017
    Assignee: EV GROUP E. THALLNER GMBH
    Inventor: Markus Wimplinger
  • Patent number: 9450153
    Abstract: Disclosed herein are a light emitting diode including a plurality of protrusions including zinc oxide and a method for manufacturing the same. According to an exemplary embodiment of the present disclosure, the light emitting diode includes: a substrate; a nitride light emitting structure disposed on the substrate; and a transparent electrode layer disposed on the nitride light emitting structure, wherein the transparent electrode layer includes a plurality of protrusions, the plurality of protrusions each have a lower portion and an upper portion, and a side of the lower portion and a side of the upper portion have different gradients.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: September 20, 2016
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Hyoung Jin Lim, Chan Seob Shin, Kyu Ho Lee, Tae Gyun Kim, Sung Won Tae
  • Patent number: 9356183
    Abstract: A compound III/V optoelectronic device and method associated with such a device is disclosed. In one aspect, a method for an improved III/V compound optoelectronic device is disclosed. The method comprises applying a sulfur surfactant on the III/V compound optoelectronic device to improve passivation of the III/V compound optoelectronic device. In a second aspect, a III/V compound optoelectronic device is disclosed. The III/V compound optoelectronic device comprises a thin film device with a III/V compound semiconductor absorbing material, and a sulfur surfactant on the III/V compound thin film device to improve passivation of the III/V compound optoelectronic device.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: May 31, 2016
    Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Matthew Sheldon, Carissa N. Eisler, Harry A. Atwater
  • Patent number: 9287435
    Abstract: The present invention uses a treatment that involves an etching treatment that forms a pnictogen-rich region on the surface of a pnictide semiconductor film The region is very thin in many modes of practice, often being on the order of only 2 to 3 nm thick in many embodiments. Previous investigators have left the region in place without appreciating the fact of its presence and/or that its presence, if known, can compromise electronic performance of resultant devices. The present invention appreciates that the formation and removal of the region advantageously renders the pnictide film surface highly smooth with reduced electronic defects. The surface is well-prepared for further device fabrication.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: March 15, 2016
    Assignees: Dow Global Technologies LLC, California Institute of Technology
    Inventors: Gregory M. Kimball, Harry A. Atwater, Nathan S. Lewis, Jeffrey P. Bosco, Rebekah K. Feist
  • Patent number: 9146157
    Abstract: A dual band detector includes a substrate, a composite barrier, a first absorber on the substrate and on a light incident side of the composite barrier, the first absorber for detecting first infrared light wavelengths, a second absorber on the composite barrier on a side opposite the light incident side, the second absorber for detecting second infrared light wavelengths, wherein a bandgap of the first absorber is larger than that of the second absorber, wherein the composite barrier includes a first secondary barrier, a primary barrier, and a second secondary barrier, wherein the first and second secondary barriers may have a lower bandgap energy than the primary barrier, wherein the first or the second secondary barrier may have a doping level and type different from that of the primary barrier, and wherein at least the primary barrier blocks majority carriers and allows minority carrier flow.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: September 29, 2015
    Assignee: HRL Laboratories, LLC
    Inventors: Rajesh Rajavel, Hasan Sharifi, Terence De Lyon, Brett Nosho, Daniel Yap
  • Patent number: 9059353
    Abstract: An optoelectronic device having an active layer that includes a multiplicity of structural elements spaced apart from one another laterally, wherein the structural elements each have a quantum well structure including at least one barrier layer composed of Inx1Aly1Ga1-x1-y1N, wherein 0?x1?1, 0?y1?1 and x1+y1?1, and at least one quantum well layer composed of Inx2Aly2Ga1-x2-y2N, wherein 0?x2?1, 0?y2?1 and x2+y2?1.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: June 16, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Simeon Katz, Bastian Galler, Martin Strassburg, Matthias Sabathil, Philipp Drechsel, Werner Bergbauer, Martin Mandl
  • Patent number: 9040812
    Abstract: A photovoltaic device including a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: May 26, 2015
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Publication number: 20150136230
    Abstract: A solar cell according to an example embodiment includes: a substrate; a first electrode formed on the substrate; a photoactive layer formed on the first electrode and including sodium and potassium; a buffer layer formed on the photoactive layer; and a second electrode formed on the buffer layer. The photoactive layer includes an area where a content of sodium is greater than a content of potassium.
    Type: Application
    Filed: October 14, 2014
    Publication date: May 21, 2015
    Inventors: Young-Su Kim, Jung-Gyu Nam, Ji-Won Lee
  • Patent number: 9034685
    Abstract: The present invention provides methods for making pnictide compositions, particularly photoactive and/or semiconductive pnictides. In many embodiments, these compositions are in the form of thin films grown on a wide range of suitable substrates to be incorporated into a wide range of microelectronic devices, including photovoltaic devices, photodetectors, light emitting diodes, betavoltaic devices, thermoelectric devices, transistors, other optoelectronic devices, and the like. As an overview, the present invention prepares these compositions from suitable source compounds in which a vapor flux is derived from a source compound in a first processing zone, the vapor flux is treated in a second processing zone distinct from the first processing zone, and then the treated vapor flux, optionally in combination with one or more other ingredients, is used to grow pnictide films on a suitable substrate.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: May 19, 2015
    Assignees: Dow Global Technologies LLC, California Institute of Technology
    Inventors: Gregory M. Kimball, Jeffrey P. Bosco, Harry A. Atwater, Nathan S. Lewis, Marty W. Degroot, James C. Stevens
  • Patent number: 9029688
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: May 12, 2015
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Publication number: 20150114455
    Abstract: A solar cell according to embodiments of the present invention includes: a substrate; a first electrode formed on the substrate; a photoactive layer formed on the first electrode and including group I and III elements; and a second electrode formed on the photoactive layer. The first electrode includes first and second parts respectively having different, resistivity, and group I to group III element composition ratios of the photoactive layer respectively corresponding to the first and second parts are different from each other.
    Type: Application
    Filed: April 1, 2014
    Publication date: April 30, 2015
    Applicant: SAMSUNG SDI CO., LTD.
    Inventor: Seung-Jae Jung
  • Publication number: 20150114458
    Abstract: A method includes depositing spacers at a plurality of locations directly on a back contact layer over a solar cell substrate. An absorber layer is formed over the back contact layer and the spacers. The absorber layer is partially in contact with the spacers and partially in direct contact with the back contact layer. The solar cell substrate is heated to form voids between the absorber layer and the back contact layer at the locations of the spacers.
    Type: Application
    Filed: October 24, 2013
    Publication date: April 30, 2015
    Applicant: TSMC Solar Ltd.
    Inventors: Tzu-Huan CHENG, Chia-Hung TSAI
  • Patent number: 9011763
    Abstract: The present invention is generally directed to nanocomposite thermoelectric materials that exhibit enhanced thermoelectric properties. The nanocomposite materials include two or more components, with at least one of the components forming nano-sized structures within the composite material. The components are chosen such that thermal conductivity of the composite is decreased without substantially diminishing the composite's electrical conductivity. Suitable component materials exhibit similar electronic band structures. For example, a band-edge gap between at least one of a conduction band or a valence band of one component material and a corresponding band of the other component material at interfaces between the components can be less than about 5kBT, wherein kB is the Boltzman constant and T is an average temperature of said nanocomposite composition.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: April 21, 2015
    Assignees: Massachusetts Institute of Technology, Trustees of Boston College
    Inventors: Gang Chen, Mildred Dresselhaus, Zhifeng Ren
  • Publication number: 20150084151
    Abstract: A photoelectric conversion element includes a first electrode, a ferroelectric layer provided on the first electrode, and a second electrode provided on the ferroelectric layer, the second electrode being a transparent electrode, and a pn junction being formed between the ferroelectric layer and the first electrode or the second electrode.
    Type: Application
    Filed: September 25, 2014
    Publication date: March 26, 2015
    Inventors: Takayuki YONEMURA, Yoshihiko YOKOYAMA, Yasuaki HAMADA
  • Publication number: 20150083225
    Abstract: A photovoltaic dye cell including a cell housing having an at least partially transparent cell wall; an electrolyte, disposed within the housing, and containing a charge transfer species; an at least partially transparent electrically conductive layer disposed on a first interior surface of the cell wall, within the photovoltaic cell; an anode disposed on the electrically conductive layer, the anode including: (i) a sintered porous film containing sintered titania, the film disposed on a broad face of the electrically conductive layer, and adapted to make intimate contact with the electrolyte, and (ii) a dye, absorbed on a surface of the porous film, the dye and the porous film adapted to convert photons to electrons, by means of the charge transfer species; and a cathode disposed substantially opposite the anode, and including a catalytic surface disposed to contact the electrolyte; wherein the film has an overall average pore size (d50) falling within a range of 25 to 45 nanometers, contains less than 700 p
    Type: Application
    Filed: June 30, 2014
    Publication date: March 26, 2015
    Inventors: Barry Breen, Izhak Barzilay, Boris Brudnik, Jonathan R. Goldstein
  • Patent number: 8987042
    Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; and forming a contact composed of a sequence of layers over the first subcell at a temperature of 280° C. or less and having a contact resistance of less than 5×10?4 ohms-cm2.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: March 24, 2015
    Assignee: SolAero Technologies Corp.
    Inventors: Tansen Varghese, Arthur Cornfeld
  • Patent number: 8987129
    Abstract: Methods for improving the performance and lifetime of irradiated photovoltaic cells are disclosed, whereby Group-V elements, and preferably nitrogen, are used to dope semiconductor GaAs-based subcell alloys.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: March 24, 2015
    Assignee: The Boeing Company
    Inventors: Joseph C. Boisvert, Christopher M. Fetzer
  • Patent number: 8987856
    Abstract: A photodiode, a light sensor and a fabricating method thereof are disclosed. An n-type semiconductor layer and an intrinsic semiconductor layer of the photodiode respectively comprise n-type amorphous indium gallium zinc oxide (IGZO) and intrinsic IGZO. The oxygen content of the intrinsic amorphous IGZO is greater than the oxygen content of the n-type amorphous IGZO. A light sensor comprise the photodiode is also disclosed.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: March 24, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Fang-An Shu, Yao-Chou Tsai, Ted-Hong Shinn
  • Patent number: 8980681
    Abstract: The disclosure provides a method for fabricating a solar cell, including: providing a first substrate; forming a light absorption precursor layer on the first substrate; conducting a thermal process to the light absorption precursor layer to form a light absorption layer, wherein the light absorption layer includes a first light absorption layer and a second light absorption layer, and the first absorption layer is formed on the first substrate; forming a second substrate on the second light absorption layer; removing the first substrate to expose a surface of the first light absorption layer; forming a zinc sulfide (ZnS) layer on the surface of the first light absorption layer; and forming a transparent conducting oxide (TCO) layer on the zinc sulfide (ZnS) layer.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: March 17, 2015
    Assignee: Industrial Technology Research Institute
    Inventor: Wei-Tse Hsu
  • Publication number: 20150064838
    Abstract: Self-assembled monolayer hybrid materials having a modified carboxylic acid deposited from the gas-phase onto a metal oxide substrate, methods of using targeted ?-carbon modified carboxylic acids to rapidly deposit activated organic molecules into a self-assembled monolayer on metal oxide substrates, and the self-assembled monolayer hybrid materials capable of being used in various industries, such as optoelectronics and separation science.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 5, 2015
    Inventors: Brian A. Logue, Mahdi Farrakh Baroughi, Venkataiah Mallam
  • Publication number: 20150063543
    Abstract: A radiation detector may include: a first photoconductor layer including a plurality of photosensitive particles; and/or a second photoconductor layer on the first photoconductor layer, and including a plurality of crystals obtained by crystal-growing photosensitive material. At least some of the plurality of photosensitive particles of the first photoconductor layer may fill gaps between the plurality of crystals of the second photoconductor layer. A method of manufacturing a radiation detector may include: forming a first photoconductor layer by applying paste, including solvent mixed with a plurality of photosensitive particles, to a first substrate; forming a second photoconductor layer by crystal-growing photosensitive material on a second substrate; pressing the crystal-grown second photoconductor layer on the first photoconductor layer that is applied to the first substrate; and/or removing the solvent in the first photoconductor layer via a drying process.
    Type: Application
    Filed: September 1, 2014
    Publication date: March 5, 2015
    Inventors: Seung-hyup LEE, Sun-il KIM, Young KIM, Chang-jung KIM
  • Patent number: 8962379
    Abstract: A CIGS film production method is provided which ensures that a CIGS film having a higher conversion efficiency can be produced at lower costs at higher reproducibility even for production of a large-area device. A CIGS solar cell production method is also provided for producing a CIGS solar cell including the CIGS film. The CIGS film production method includes: a stacking step of stacking a layer (A) containing indium, gallium and selenium and a layer (B) containing copper and selenium in a solid phase in this order over a substrate; and a heating step of heating a stacked structure including the layer (A) and the layer (B) to melt a compound of copper and selenium of the layer (B) into a liquid phase to thereby diffuse copper from the layer (B) into the layer (A) to permit crystal growth to provide a CIGS film.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: February 24, 2015
    Assignee: Nitto Denko Corporation
    Inventors: Hiroto Nishii, Shigenori Morita, Seiki Teraji, Kazuhito Hosokawa, Takashi Minemoto
  • Patent number: 8946838
    Abstract: A radiation converter includes a directly converting semiconductor layer having grains whose interfaces predominantly run parallel to a drift direction—constrained by an electric field—of electrons liberated in the semiconductor layer. Charge carriers liberated by incident radiation quanta are accelerated in the electric field in the direction of the radiation incidence direction and on account of the columnar or pillar-like texture of the semiconductor layer, in comparison with the known radiation detectors, cross significantly fewer interfaces of the grains that are occupied by defect sites. This increases the charge carrier lifetime/mobility product in the direction of charge carrier transport. Consequently, it is possible to realize significantly thicker semiconductor layers for the counting and/or energy-selective detection of radiation quanta. This increases the absorptivity of the radiation converter which in turn makes it possible to reduce a radiation dose applied to the patient.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: February 3, 2015
    Assignee: Siemens Aktiengesellschaft
    Inventor: Christian Schröter
  • Patent number: 8945975
    Abstract: In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: February 3, 2015
    Assignees: Koninklijke Philips N.V., Philips Lumileds Lighting Company LLC
    Inventors: Andrew Y. Kim, Patrick N. Grillot
  • Patent number: 8946545
    Abstract: Disclosed is a photovoltaic device. The photovoltaic device includes: a substrate; a first electrode placed on the substrate; a second electrode which is placed opposite to the first electrode and which light is incident on; a first unit cell being placed between the first electrode and the second electrode, and including an intrinsic semiconductor layer including crystalline silicon grains making the surface of the intrinsic semiconductor layer toward the second electrode textured; and a second unit cell placed between the first unit cell and the second electrode.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 3, 2015
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Seung-Yeop Myong
  • Publication number: 20150027543
    Abstract: The invention relates to a coating composition consisting of an oxide compound. The invention also relates to a method for producing a coating composition consisting of an oxide compound and to a method for coating substrates composed of metal, semiconductor, alloy, ceramic, quartz, glass or glass-type materials with coating compositions of this type. The invention further relates to the use of a coating composition according to the invention for coating metal, semiconductor, alloy, ceramic, quartz, glass and/or glass-type substrates.
    Type: Application
    Filed: October 14, 2014
    Publication date: January 29, 2015
    Inventors: Oral Cenk Aktas, Michael Veith, Sener Albayrak, Benny Siegert, Yann Patrick Wolf
  • Publication number: 20150027529
    Abstract: The present invention generally relates to electrodes formed by oxidative chemical vapor deposition and related methods and devices.
    Type: Application
    Filed: February 13, 2013
    Publication date: January 29, 2015
    Applicant: Massachusetts Institute of Technology
    Inventors: Miles C. Barr, Rachel M. Howden, Karen K. Gleason, Vladimir Bulovic
  • Patent number: 8940624
    Abstract: A method of manufacturing a p type nitride semiconductor layer doped with carbon in a highly reproducible manner with an increased productivity is provided. The method includes supplying an III-group material gas for a predetermined time period T1, supplying a V-group material gas containing a carbon source for a predetermined time period T2 when a predetermined time period t1 (t1+T2>T1) elapses after the supply of the III-group material gas begins, repeating the step of supplying the III-group material gas and the step of supplying the V-group material gas when a predetermined time period t2 (t1+T2?t2>T1) elapses after the supply of the V-group material gas begins, and thus forming an AlxGa1-xN semiconductor layer (0<x?1) at a growth temperature of 1190° C.˜1370° C. or a growth temperature at which a substrate temperature is 1070° C.˜1250° C. using a chemical vapor deposition method or a vacuum evaporation method. Nitrogen sites within the semiconductor layer are doped with carbon.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: January 27, 2015
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventor: Hideo Kawanishi