Compound Semiconductor Patents (Class 438/93)
  • Publication number: 20140352772
    Abstract: A solar cell includes a substrate, a barrier layer on the substrate, a back electrode layer on the barrier layer, a light absorption layer on the back electrode layer, a buffer layer on the light absorption layer, and a transparent electrode layer on the buffer layer. The barrier layer is selectively formed on the substrate. Accordingly, since alkali elements may be uniformly distributed in the light absorption layer, the efficiency of the solar cell may be improved.
    Type: Application
    Filed: December 23, 2013
    Publication date: December 4, 2014
    Applicant: SAMSUNG SDI CO., LTD.
    Inventor: Dong-Jin KIM
  • Patent number: 8901533
    Abstract: Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-moon Lee, Young-jin Cho
  • Publication number: 20140345673
    Abstract: Photovoltaic sub-cell interconnect systems and methods are provided. In one embodiment, a photovoltaic device comprises a thin film stack of layers deposited upon a substrate, wherein the thin film stack layers are subdivided into a plurality of sub-cells interconnected in series by a plurality of electrical interconnection structures; and wherein the plurality of electrical interconnection structures each comprise no more than two scribes that penetrate into the thin film stack layers.
    Type: Application
    Filed: May 21, 2014
    Publication date: November 27, 2014
    Applicant: Alliance for Sustainable Energy, LLC
    Inventors: Marinus Franciscus Antonius Maria van Hest, Heather Anne Swinger Platt
  • Publication number: 20140339561
    Abstract: A detecting device includes a conversion device having a substrate, a pixel electrode formed of a transparent conductive oxide, a impurity semiconductor portion, and a semiconductor portion, the pixel electrode, impurity semiconductor portion, and semiconductor portion having been formed upon the substrate in that order from the substrate side. The impurity semiconductor portion includes a first region including a place in contact with the pixel electrode, and a second region situated nearer to the semiconductor portion than the first region. Concentration of dopant in the second region is higher than concentration of dopant in the first region.
    Type: Application
    Filed: May 13, 2014
    Publication date: November 20, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Keigo Yokoyama, Minoru Watanabe, Masato Ofuji, Jun Kawanabe, Kentaro Fujiyoshi, Hiroshi Wayama
  • Patent number: 8889466
    Abstract: A method for forming a photovoltaic device includes forming an absorber layer with a granular structure on a conductive layer; conformally depositing an insulating protection layer over the absorber layer to fill in between grains of the absorber layer; and planarizing the protection layer and the absorber layer. A buffer layer is formed on the absorber layer, and a top transparent conductor layer is deposited over the buffer layer.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Talia S. Gershon, Supratik Guha, Jeehwan Kim, Mahadevaiyer Krishnan, Byungha Shin
  • Patent number: 8889468
    Abstract: A tandem photovoltaic cell. The tandem photovoltaic cell includes a bifacial top cell and a bottom cell. The top bifacial cell includes a top first transparent conductive oxide material. A top window material underlies the top first transparent conductive oxide material. A first interface region is disposed between the top window material and the top first transparent conductive oxide material. The first interface region is substantially free from one or more entities from the top first transparent conductive oxide material diffused into the top window material. A top absorber material comprising a copper species, an indium species, and a sulfur species underlies the top window material. A top second transparent conductive oxide material underlies the top absorber material. A second interface region is disposed between the top second transparent conductive oxide material and the top absorber material. The bottom cell includes a bottom first transparent conductive oxide material.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: November 18, 2014
    Assignee: Stion Corporation
    Inventor: Howard W. H. Lee
  • Patent number: 8889467
    Abstract: The present invention relates to a semiconductor compound having the general formula AxB1-xCy, to a method of optimizing positions of a conduction band and a valence band of a semiconductor material using said semiconductor compound, and to a photoactive device comprising said semiconductor compound.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: November 18, 2014
    Assignee: Sony Deutschland GmbH
    Inventors: Michael Duerr, Silvia Rosselli, Gabriele Nelles, Akio Yasuda
  • Publication number: 20140332730
    Abstract: The present invention relates to polymers (I), or (II), and their use as organic semiconductor in organic devices, especially in organic photovoltaics (solar cells) and photodiodes, or in a device containing a diode and/or an organic field effect transistor. The polymers according to the invention have excellent solubility in organic solvents and excellent film-forming properties. In addition, high efficiency of energy conversion, excellent field-effect mobility, good on/off current ratios and/or excellent stability can be observed, when the polymers according to the invention are used in organic field effect transistors, organic photovoltaics (solar cells) and photodiodes.
    Type: Application
    Filed: December 3, 2012
    Publication date: November 13, 2014
    Applicant: BASF SE
    Inventors: Pascal Hayoz, Patrice Bujard
  • Patent number: 8883617
    Abstract: One aspect in the present disclosure relates to a method for manufacturing an amorphous metal oxide semiconductor. In an exemplary embodiment, a film is deposited on a substrate from a mixed solution as a starting element. For example, the mixed solution includes at least an indium alkoxide and a zinc alkoxide in a solvent. The film made from the mixed solution on the substrate is cured by thermal-annealing in a water vapor atmosphere, at a temperature range of, for example, 210 to 275 degrees Celsius, inclusive.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: November 11, 2014
    Assignees: Panasonic Corporation, Cambridge Enterprise Ltd.
    Inventors: Yoshihisa Yamashita, Kulbinder Kumar Banger, Henning Sirringhaus
  • Publication number: 20140327037
    Abstract: A method of manufacturing at least one semiconducting micro- or nano-wire used for formation of an optoelectric structure, optoelectronic structures including the micro- or nano-wires, and a method enabling manufacture of the photoelectronic structures. The method includes providing a semiconducting substrate, forming a crystalline buffer layer on the substrate, the buffer layer having a first zone over at least part of its thickness composed mainly of magnesium nitride in a form MgxNy, and forming at least one semiconducting micro- or nano-wire on the buffer layer.
    Type: Application
    Filed: December 19, 2012
    Publication date: November 6, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Amelie Dussaigne, Philippe Gilet, Francois Martin
  • Publication number: 20140326316
    Abstract: Thin films comprising crystalline Fe2XY4, wherein X is Si or Ge and Y is S or Se, are obtained by coating an ink comprised of nanoparticle precursors of Fe2XY4 and/or a non-particulate amorphous substance comprised of Fe, X and Y on a substrate surface and annealing the coating. The coated substrate thereby obtained has utility as a solar absorber material in thin film photovoltaic devices.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 6, 2014
    Applicant: Delaware State University
    Inventors: Daniela Rodica Radu, Cheng-Yu Lai
  • Publication number: 20140329355
    Abstract: Techniques for improving energy conversion efficiency in photovoltaic devices are provided. In one aspect, an antimony (Sb)-doped film represented by the formula, Cu1-yIn1-xGaxSbzSe2-wSw, provided, wherein: 0?x?1, and ranges therebetween; 0?y?0.2, and ranges therebetween; 0.001?z?0.02, and ranges therebetween; and 0?w?2, and ranges therebetween. A photovoltaic device incorporating the Sb-doped CIGS film and a method for fabrication thereof are also provided.
    Type: Application
    Filed: July 16, 2014
    Publication date: November 6, 2014
    Inventors: Min Yuan, David B. Mitzi, Wei Liu
  • Patent number: 8871552
    Abstract: Although Cl (chlorine) is no longer supplied in the course of a first process in which a detecting layer formed by a polycrystalline film or a polycrystalline lamination film by vapor deposition or sublimation is formed, an additional source (e.g., HCl of Cl-containing gas) other than a source is supplied at the start or in the course of the first process. Thus, the detecting layer as the polycrystalline film or the polycrystalline lamination film of CdTe, ZnTe, or CdZnTe can be doped with Cl uniformly in a thickness direction from the start until the end of the first process in film formation. As a result, uniform crystal particles and uniform detection characteristics can be achieved.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: October 28, 2014
    Assignees: Shimadzu Corporation, Institute of National Colleges of Technology, Japan
    Inventors: Satoshi Tokuda, Koichi Tanabe, Toshinori Yoshimuta, Hiroyuki Kishihara, Masatomo Kaino, Akina Yoshimatsu, Toshiyuki Sato, Shoji Kuwabara
  • Publication number: 20140315346
    Abstract: The invention relates to a method of manufacturing a I-III-VI2 layer with photovoltaic properties, comprising: deposition of a metal on a substrate to form a contact layer, deposition of a precursor of the photovoltaic layer, on the contact layer, and heat treatment of the precursor with an addition of element VI to form the layer. The element VI usually diffuses into the contact layer (MO) during the heat treatment and combines with the metal to form a superficial layer (SUP) on the contact layer. In the method of the invention, the metal deposition comprises a step during which an additional element is added to the metal to form a compound (MO-EA), in the contact layer, acting as a barrier to the diffusion of the element VI, which allows precisely controlling the properties of the superficial layer, particularly its thickness.
    Type: Application
    Filed: November 22, 2012
    Publication date: October 23, 2014
    Applicant: NEXCIS
    Inventors: Stephanie Angle, Ludovic Parissi
  • Patent number: 8865513
    Abstract: Provided is a manufacturing method of a semiconductor quantum dot-sensitized solar cell. More particularly, the manufacturing method according to the present invention includes: a quantum dot forming step of forming a semiconductor layer containing a group 4 element and InP on a substrate and then performing heat-treatment on the substrate including the semiconductor layer formed thereon to remove indium (In) therefrom, thereby forming an n-type semiconductor quantum dot, which is a group 4 element quantum dot doped with phosphorus (P).
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: October 21, 2014
    Assignee: Korea Research Institute of Standards and Science
    Inventors: Kyung Joong Kim, Seung Hui Hong, Jae Hee Park, Woo Lee
  • Patent number: 8859323
    Abstract: A method for high temperature selenization of Cu—In—Ga metal precursor films comprises ramping the precursor film to a temperature between about 300 C and about 400 C in a Se containing atmosphere and at a pressure between about 600 torr and 800 torr. A partial selenization is performed at a temperature between about 300 C and about 400 C in a Se-containing atmosphere. The film is then ramped to a temperature between about 400 C and about 550 C in a Se containing atmosphere and at a pressure between about 600 torr and 800 torr. The film is then annealed at a temperature between about 550 C and about 650 C in an inert gas.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: October 14, 2014
    Assignee: Intermolecular, Inc.
    Inventor: Haifan Liang
  • Publication number: 20140299858
    Abstract: Use of certain materials in hole injection layer and/or hole transport layer can improve operational lifetimes in organic devices. Polymers having fused aromatic side groups such as polyvinylnaphthol polymers can be used in conjunction with conjugated polymers. Inks can be formulated and cast as films in organic electronic devices including OLEDs, SMOLEDs, and PLEDs. One embodiment provides a composition comprising: at least one conjugated polymer, and at least one second polymer different from the conjugated polymer comprising at least one optionally substituted fused aromatic hydrocarbon side group. The substituent can be hydroxyl. Aqueous-based inks can be formulated.
    Type: Application
    Filed: April 11, 2014
    Publication date: October 9, 2014
    Inventors: Christopher T. BROWN, Venkataramanan SESHADRI
  • Publication number: 20140299855
    Abstract: A polymer including a structural unit represented by the following formula (A). In the formula (A), P is independently a group represented by the following formula (P), a is an integer of 2 to 5, and b is an integer of 0 to 5. In the formula (P), A is independently a nitrogen atom or CR; X is a single bond, O, S, C(R)2 or NR. R is independently a hydrogen atom, a substituted or unsubstituted alkyl group including 1 to 20 carbon atoms or the like, or a single bond used for bonding to another P or L, provided that at least one R contained in (P)a is represented by any one of the following formulas (3) to (7).
    Type: Application
    Filed: October 16, 2012
    Publication date: October 9, 2014
    Inventors: Akinori Yomogita, Hironori Kawakami, Masami Watanabe, Kiyoshi Ikeda, Masahiro Kawamura, Nobuhiro Yabunouchi, Tomoki Kato
  • Patent number: 8852991
    Abstract: Provided is a method of manufacturing a solar cell. The method includes: preparing a substrate with a rear electrode; and forming a copper indium gallium selenide (CIGS) based light absorbing layer on the rear electrode at a substrate temperature of room temperature to about 350° C., wherein the forming of the CIGS based light absorbing layer includes projecting an electron beam on the CIGS based light absorbing layer.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: October 7, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Yong-Duck Chung
  • Patent number: 8852994
    Abstract: A method of fabricating on a semiconductor substrate bifacial tandem solar cells with semiconductor subcells having a lower bandgap than the substrate bandgap on one side of the substrate and with subcells having a higher bandgap than the substrate on the other including, first, growing a lower bandgap subcell on one substrate side that uses only the same periodic table group V material in the dislocation-reducing grading layers and bottom subcells as is present in the substrate and after the initial growth is complete and then flipping the substrate and growing the higher bandgap subcells on the opposite substrate side which can be of different group V material.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: October 7, 2014
    Assignee: Masimo Semiconductor, Inc.
    Inventors: Steven J. Wojtczuk, Philip T. Chiu, Xuebing Zhang, Edward Gagnon, Michael Timmons
  • Publication number: 20140290737
    Abstract: A composition comprising a substrate, a polycrystalline III-V semiconductor layer, and an oxide layer disposed above the polycrystalline III-V semiconductor layer is described. A growth method that enables fabrication of continuous thin films of polycrystalline indium phosphide (InP) directly on metal foils is described. The method describes the deposition of an indium (In) thin film (up to 20 microns thick) directly on molybedenum (Mo) foil, followed by the deposition of a thin oxide capping layer (up to 1 micron thick). This capping layer prevents dewetting of the In from the substrate during subsequent high temperature processing steps. The Mo/In/Capping Layer stack is then heated in the presence of phosphorous precursors, causing supersaturation of the liquid indium with phosphorous, followed by precipitation of InP. These polycrystalline III-V films have grain sizes 100-200 microns, minority carrier lifetimes >2 ns and hall mobilities of 500 cm?2/V-s.
    Type: Application
    Filed: April 2, 2014
    Publication date: October 2, 2014
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Ali Javey, Zhibin Yu, Rehan Kapadia
  • Patent number: 8841182
    Abstract: Methods of treating metal-containing thin films, such as films comprising titanium carbide, with a silane/borane agent are provided. In some embodiments a film including titanium carbide is deposited on a substrate by an atomic layer deposition (ALD) process. The process may include a plurality of deposition cycles involving alternating and sequential pulses of a first source chemical that includes titanium and at least one halide ligand, a second source chemical that includes metal and carbon, where the metal and the carbon from the second source chemical are incorporated into the thin film, and a third source chemical, where the third source chemical is a silane or borane that at least partially reduces oxidized portions of the titanium carbide layer formed by the first and second source chemicals. The treatment can form a capping layer on the metal carbide film.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: September 23, 2014
    Assignee: ASM IP Holding B.V.
    Inventors: Jerry Chen, Vladimir Machkaoutsan, Brennan Milligan, Jan Willem Maes, Suvi Haukka, Eric Shero, Tom E. Blomberg, Dong Li
  • Publication number: 20140261690
    Abstract: A single junction solar cell may be manufactured with a material having multiple bands. That is, a single semiconductor with several absorption edges that absorb photons from different parts of the solar spectrum may be constructed. The different absorption edges may be created by splitting a conduction band of the solar cell material into multiple intermediate sub-bands. The solar cell may include a photovoltaic material deposited on a substrate, in which the photovoltaic material is a III-V semiconductor alloy, such as AlGaNAs, AlGaAsNSb, or AlInGaNAsBi.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: Ernest Orlando Lawrence Berkeley National Laboratory
    Inventors: Wladyslaw Walukiewicz, Kin Man Yu
  • Publication number: 20140273311
    Abstract: Optical absorbers and methods are disclosed. The methods comprise depositing a plurality of precursor layers comprising one or more of Cu, Ga, and In on a substrate, and heating the layers in a chalcogenizing atmosphere. The plurality of precursor layers can be one or more sets of layers comprising at least two layers, wherein each layer in each set of layers comprises one or more of Cu, Ga, and In exhibiting a single phase. The layers can be deposited using two or three targets selected from Ag and In containing less than 21% In by weight, Cu and Ga where the Cu and Ga target comprises less than 45% Ga by weight, Cu(In,Ga), wherein the Cu(In,Ga) target has an atomic ratio of Cu to (In+Ga) greater than 2 and an atomic ratio of Ga to (Ga+In) greater than 0.5, elemental In, elemental Cu, and In2Se3 and In2S3.
    Type: Application
    Filed: December 13, 2013
    Publication date: September 18, 2014
    Applicant: Intermolecular, Inc.
    Inventors: Haifan Liang, Jessica Eid, Minh Huu Le, Jeroen Van Duren
  • Publication number: 20140264363
    Abstract: Oxygen controlled PVD AlN buffers for GaN-based optoelectronic and electronic devices is described. Methods of forming a PVD AlN buffer for GaN-based optoelectronic and electronic devices in an oxygen controlled manner are also described. In an example, a method of forming an aluminum nitride (AlN) buffer layer for GaN-based optoelectronic or electronic devices involves reactive sputtering an AlN layer above a substrate, the reactive sputtering involving reacting an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-containing gas or a plasma based on a nitrogen-containing gas. The method further involves incorporating oxygen into the AlN layer.
    Type: Application
    Filed: July 22, 2013
    Publication date: September 18, 2014
    Inventors: Mingwei Zhu, Nag B. Patibandla, Rongjun Wang, Daniel Lee Diehl, Vivek Agrawal, Anantha Subramani
  • Publication number: 20140273335
    Abstract: An apparatus for deposition of a plurality of elements onto a solar cell substrate comprising: a housing; a transporting apparatus to transport said substrate in and out of said housing; a first tubing apparatus to deliver powders of a first elements to said housing wherein said first tubing apparatus is comprised of a first feeder tube located outside of said housing and joined to said housing; a first source material tube located outside of said housing and joined to said feeder tube; a valves located inside of said first source material tube sufficient to block access between said first source material tube and said first feeder tube; a first heating tube located inside of said housing and connected to said first feeder tube; a second tubing apparatus to deliver powders of a second elements to said housing wherein said second tubing apparatus is comprised of a second feeder tube located outside of said housing and joined to said housing; a second source material tube located outside of said housing and joi
    Type: Application
    Filed: February 18, 2014
    Publication date: September 18, 2014
    Inventor: Jehad A. Abushama
  • Publication number: 20140264307
    Abstract: There is provided a process for forming a layer of electroactive material having a substantially flat profile. The process includes: providing a workpiece having at least one active area; depositing a liquid composition including the electroactive material onto the workpiece in the active area, to form a wet layer; treating the wet layer on the workpiece at a controlled temperature in the range of ?25 to 80° C. and under a vacuum in the range of 10?6 to 1,000 Torr, for a first period of 1-100 minutes, to form a partially dried layer; heating the partially dried layer to a temperature above 100° C. for a second period of 1-50 minutes to form a dried layer.
    Type: Application
    Filed: June 2, 2014
    Publication date: September 18, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventors: REID JOHN CHESTERFIELD, JUSTIN BUTLER, PAUL ANTHONY SANT
  • Patent number: 8835979
    Abstract: Using a multiple layer, varied composition barrier layer in place of the typical single layer barrier layer of an infrared photodetector results in a device with increased sensitivity and reduced dark current. A first barrier is adjacent the semiconductor contact; a second barrier layer is between the first barrier layer and the absorber layer. The barrier layers may be doped N type or P type with Beryllium, Carbon, Silicon or Tellurium. The energy bandgap is designed to facilitate minority carrier current flow in the contact region and block minority current flow outside the contact region.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: September 16, 2014
    Assignee: HRL Laboratories, LLC
    Inventors: Terence J De Lyon, Rajesh D Rajavel, Hasan Sharifi
  • Patent number: 8828784
    Abstract: Methods and structures for extracting at least one electric parametric value from a back contact solar cell having dual level metallization are provided.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: September 9, 2014
    Assignee: Solexel, Inc.
    Inventors: Swaroop Kommera, Pawan Kapur, Mehrdad M. Moslehi
  • Patent number: 8829342
    Abstract: A photovoltaic cell structure is disclosed that includes a buffer/passivation layer at a CdTe/Back contact interface. The buffer/passivation layer is formed from the same material that forms the n-type semiconductor active layer. In one embodiment, the buffer layer and the n-type semiconductor active layer are formed from cadmium sulfide (CdS). A method of forming a photovoltaic cell includes the step of forming the semiconductor active layers and the buffer/passivation layer within the same deposition chamber and using the same material source.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: September 9, 2014
    Assignee: The University of Toledo
    Inventors: Alvin D. Compaan, Victor V. Plotnikov
  • Publication number: 20140246082
    Abstract: Disclosed is a stacked body for manufacturing a compound semiconductor solar battery, wherein a first etching stop layer (103) and a semiconductor stacked body (10) including at least one pn junction are arranged in this order on a semiconductor substrate (100), the semiconductor stacked body (10) has a contact layer (104) at a position in contact with the first etching stop layer, and the first etching stop layer (103) and the contact layer (104) contain a group V element of the same type.
    Type: Application
    Filed: August 29, 2012
    Publication date: September 4, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hiroyuki Juso, Naoki Takahashi
  • Patent number: 8822817
    Abstract: The disclosure provides for a direct wafer bonding method including providing a bonding layer upon a first and second wafer, and directly bonding the first and second wafers together under heat and pressure. The method may be used for directly bonding an GaAs-based, InP-based, GaP-based, GaSb-based, or Ga(In)N-based device to a GaAs device by introducing a highly doped (Al)(Ga)InP(As)(Sb) layer between the devices. The bonding layer material forms a bond having high bond strength, low electrical resistance, and high optical transmittance.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: September 2, 2014
    Assignee: The Boeing Company
    Inventors: Dhananjay M. Bhusari, Daniel C. Law
  • Patent number: 8822243
    Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: September 2, 2014
    Assignee: Manutius IP Inc.
    Inventors: Li Yan, Chao-kun Lin, Chih-Wei Chuang
  • Patent number: 8815632
    Abstract: A method of manufacturing an order vacancy compound (OVC) is provided. The method includes the following steps. A trivalent ion, a hexavalent ion and one of a univalent ion and a bivalent ion for an electrodeposition process are provided to form a solar energy absorbing film. The OVC is formed by performing an electrochemical etching process on the solar energy absorbing film.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: August 26, 2014
    Assignee: National Chen-Kung University
    Inventor: Wen-Hsi Lee
  • Patent number: 8815633
    Abstract: A method of fabricating a 3-dimensional structure on a copper-indium-gallium-diselenide material comprises steps: preparing a CIGS (Copper Indium Gallium Diselenide) substrate, and defining two types of regions complementary to each other on the CIGS substrate; providing a mold absorbing an etching solution that can etch the CIGS substrate instead of the mold; aligning the mold to the two types of regions, and allowing the etching solution to flow out from the mold and contact with the two types of regions to etch the two types of regions for generating a level drop between the two types of regions and forming a 3-dimensional (3D) structure on the CIGS substrate. As a result, the present invention can fabricate a large-area 3D structure on a CIGS substrate rapidly without using expensive equipments or complicated processes.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: August 26, 2014
    Assignee: National Tsing Hua University
    Inventors: Yu-Lun Chueh, Hsiang-Ying Cheng, Yi-Chung Wang, Yu-Ting Yen
  • Publication number: 20140230888
    Abstract: A solar cell including a light absorption layer including a p-type compound semiconductor; and a buffer layer including a first buffer layer and a second buffer layer on the light absorption layer, the second buffer layer being between the first buffer layer and light absorption layer, and a zinc sulfide (ZnS) concentration of the first buffer layer being greater than a ZnS concentration of the second buffer layer is disclosed. Methods of manufacturing the solar cell are also disclosed.
    Type: Application
    Filed: October 18, 2013
    Publication date: August 21, 2014
    Applicant: SAMSUNG SDI CO., LTD.
    Inventors: Jeong-Hoon Kim, Sang-Hyuck Ahn, Hyun-Chul Kim, Si-Young Cha, Nam-Seok Baik
  • Patent number: 8809101
    Abstract: According to one embodiment, a semiconductor light emitting device includes: first and second semiconductor layers, a light emitting part, and an In-containing layer. The first semiconductor layer is formed on a silicon substrate via a foundation layer. The light emitting part is provided on the first semiconductor layer, and includes barrier layers and a well layer provided between the barrier layers including Ga1?z1Inz1N (0<z1?1). The second semiconductor layer is provided on the light emitting part. The In-containing layer is provided at at least one of first and second positions. The first position is between the first semiconductor layer and the light emitting part. The second position is between the second semiconductor layer and the light emitting part. The In-containing layer includes In with a composition ratio different from the In composition ratio z1 and has a thickness 10 nm to 1000 nm.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: August 19, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Tomonari Shioda, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8809678
    Abstract: CIGS absorber layers fabricated using coated semiconducting nanoparticles and/or quantum dots are disclosed. Core nanoparticles and/or quantum dots containing one or more elements from group 13 and/or IIIA and/or VIA may be coated with one or more layers containing elements group IB, IIIA or VIA. Using nanoparticles with a defined surface area, a layer thickness could be tuned to give the proper stoichiometric ratio, and/or crystal phase, and/or size, and/or shape. The coated nanoparticles could then be placed in a dispersant for use as an ink, paste, or paint. By appropriate coating of the core nanoparticles, the resulting coated nanoparticles can have the desired elements intermixed within the size scale of the nanoparticle, while the phase can be controlled by tuning the stoichiometry, and the stoichiometry of the coated nanoparticle may be tuned by controlling the thickness of the coating(s).
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: August 19, 2014
    Assignee: aeris CAPITAL Sustainable IP Ltd.
    Inventors: Brian M. Sager, Dong Yu, Matthew R. Robinson
  • Publication number: 20140224317
    Abstract: The present invention provides optoelectronic devices containing at least one conforming, thin film barrier coating provided on a nonplanar surface comprising a plurality of junctures. The barrier coating has a hybrid morphology including crystalline domains distributed in an amorphous matrix. The conformal coatings protect the optoelectronic device with long-lasting, durable, high quality barrier protection even though the coatings have sufficient crystalline characteristics so that many embodiments are electrically conductive.
    Type: Application
    Filed: July 27, 2012
    Publication date: August 14, 2014
    Applicants: REGENTS OF THE UNIVERSITE OF MINNESOTA, DOW GLOBAL TECHNOLOGIES LLC
    Inventors: Rebekah K. Feist, Banu Tosun, Stephen A. Campbell, Eray Aydill
  • Patent number: 8802484
    Abstract: A method and device are provided for forming an integrated Ge or Ge/Si photo detector in the CMOS process by non-selective epitaxial growth of the Ge or Ge/Si. Embodiments include forming an N-well in a Si substrate; forming a transistor or resistor in the Si substrate; forming an ILD over the Si substrate and the transistor or resistor; forming a Si-based dielectric layer on the ILD; forming a poly-Si or a-Si layer on the Si-based dielectric layer; forming a trench in the poly-Si or a-Si layer, the Si-based dielectric layer, the ILD, and the N-well; forming Ge or Ge/Si in the trench; and removing the Ge or Ge/Si, the poly-Si or a-Si layer, and the Si-based dielectric layer down to an upper surface of the ILD. Further aspects include forming an in-situ doped Si cap epilayer or an ex-situ doped poly-Si or a-Si cap layer on the Ge or Ge/Si.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: August 12, 2014
    Assignee: GlobalFoundries Singapore Pte. Ltd.
    Inventors: Purakh Raj Verma, Guowei Zhang, Kah Wee Ang
  • Publication number: 20140217284
    Abstract: Photodetectors, methods of fabricating the same, and methods using the same to detect radiation are described. A photodetector can include a first electrode, a light sensitizing layer, an electron blocking/tunneling layer, and a second electrode. Infrared-to-visible upconversion devices, methods of fabricating the same, and methods using the same to detect radiation are also described. An Infrared-to-visible upconversion device can include a photodetector and an OLED coupled to the photodetector.
    Type: Application
    Filed: July 2, 2012
    Publication date: August 7, 2014
    Applicants: NANOHOLDINGS, LLC, University of Florida Research Foundation, Inc.
    Inventors: Franky So, Do Young Kim, Jae Woong Lee, Bhabendra K. Pradhan
  • Patent number: 8796677
    Abstract: An apparatus includes a substrate; and a photoactive layer disposed on the substrate. The photoactive layer includes an electron acceptor material; an electron donor material; and a material having dipoles.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: August 5, 2014
    Assignee: NUtech Ventures
    Inventors: Jinsong Huang, Bin Yang, Yongbo Yuan
  • Patent number: 8778708
    Abstract: There is provided a process for forming a layer of electroactive material having a substantially flat profile. The process includes: providing a workpiece having at least one active area; depositing a liquid composition including the electroactive material onto the workpiece in the active area, to form a wet layer; treating the wet layer on the workpiece at a controlled temperature in the range of ?25 to 80° C. and under a vacuum in the range of 10?6 to 1,000 Torr, for a first period of 1-100 minutes, to form a partially dried layer; heating the partially dried layer to a temperature above 100° C. for a second period of 1-50 minutes to form a dried layer.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: July 15, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: Reid John Chesterfield, Justin Butler, Paul Anthony Sant
  • Patent number: 8772623
    Abstract: Low bandgap, monolithic, multi-bandgap, optoelectronic devices (10), including PV converters, photodetectors, and LED's, have lattice-matched (LM), double-heterostructure (DH), low-bandgap GaInAs(P) subcells (22, 24) including those that are lattice-mismatched (LMM) to InP, grown on an InP substrate (26) by use of at least one graded lattice constant transition layer (20) of InAsP positioned somewhere between the InP substrate (26) and the LMM subcell(s) (22, 24). These devices are monofacial (10) or bifacial (80) and include monolithic, integrated, modules (MIMs) (190) with a plurality of voltage-matched subcell circuits (262, 264, 266, 270, 272) as well as other variations and embodiments.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: July 8, 2014
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Mark W. Wanlass, Jeffrey J. Carapella
  • Publication number: 20140182665
    Abstract: Optical absorbers, solar cells comprising the optical absorbers, and methods for making the absorbers are disclosed. The optical absorber comprises a layer comprising a semiconductor having a bandgap of between about 1.0 eV and about 1.6 eV on a substrate. The thickness of the layer is from about 1 to about 10 microns. The semiconductor comprises Fe, at least one Group IVA element, and at least one Group VIA element. The Group VIA element can be S, Se or Te. The Group IVA element can be Si or Ge. Typical compositions are Fe2(Si,Ge)(S,Se)4. The bandgap can be graded through the thickness of the absorber. High Productivity Combinatorial methods can be used to optimize the composition and grading.
    Type: Application
    Filed: December 27, 2012
    Publication date: July 3, 2014
    Applicant: INTERMOLECULAR, INC.
    Inventor: Haifan Liang
  • Patent number: 8765518
    Abstract: Improved chalcogenide solutions are provided. In one aspect, a method of forming an aqueous selenium-containing solution is provided. The method includes the following step. Water, ammonium hydroxide, elemental selenium, and elemental aluminum are contacted under conditions sufficient to form the aqueous selenium-containing solution. The conditions may include sonication for a period of time of from about 1 minute to about 10 minutes and/or stirring for a period of time of from about 10 minutes to about 72 hours at a temperature of from about 20° C. to about 25° C. A method of fabricating a photovoltaic device is also provided.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: July 1, 2014
    Assignee: International Business Machines Corporation
    Inventor: Teodor K. Todorov
  • Publication number: 20140179055
    Abstract: The method produces a photoelectric conversion element comprising a lower electrode, an electron blocking layer, a photoelectric conversion layer, an upper electrode, and a sealing layer which are laminated on one another in this order. The method includes a step of forming a transparent conductive oxide into a film at a deposition rate of 0.5 ?/s or higher by a sputtering method to form the upper electrode having a stress of ?50 MPa to ?500 MPa on the photoelectric conversion layer.
    Type: Application
    Filed: February 28, 2014
    Publication date: June 26, 2014
    Applicant: FUJIFILM CORPORATION
    Inventor: Hideyuki SUZUKI
  • Publication number: 20140175585
    Abstract: A method for manufacturing a light-receiving device includes the steps of forming a stacked semiconductor layer including a non-doped light-receiving layer, the light-receiving layer having an n-type conductivity; forming a selective growth mask made of an insulating film on the stacked semiconductor layer, the selective growth mask having a pattern including a plurality of openings; selectively growing a selective growth layer doped with a p-type impurity on a portion of the stacked semiconductor layer using the selective growth mask; and forming a p-n junction in a region of the light-receiving layer by diffusing the p-type impurity doped in the selective growth layer into the light-receiving layer during growing the selective growth layer. Each of the regions including the p-n junctions corresponds to one of the selective growth layers. The p-n junction in one of the regions is formed separately from the p-n junctions in the other regions.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 26, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Yasuhiro IGUCHI
  • Patent number: 8759670
    Abstract: A photovoltaic converter device includes a photovoltaic conversion layer containing a plurality of nanoparticles in a first material in a dispersed state, wherein the nanoparticles include a second material in particles and a third material that coats the second material, the third material having a band gap E3 that is greater than a band gap E1 of the first material, and greater than a band gap E2 of the second material.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: June 24, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Masahiro Furusawa
  • Patent number: 8759138
    Abstract: A solar cell receiver for use in a concentrating solar system which concentrates the solar energy onto a solar cell for converting solar energy to electricity. The solar cell receiver may include a solar cell mounted on a support and with one or more III-V compound semiconductor layers. An optical element may be positioned over the solar cell and have an optical channel with an inlet that faces away from the solar cell and an outlet that faces towards the solar cell. A frame may be positioned over the support and extend around the solar cell with the frame having an inner side that extends above the support and faces towards the optical element. An encapsulant may be positioned over the support and contained between the optical element and the frame. The encapsulant may have enlarged heights at contact points with the optical element and the frame and a reduced height between the contact points away from the optical element and the frame. The solar cell receiver may be used in a solar cell module.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: June 24, 2014
    Assignee: Suncore Photovoltaics, Inc.
    Inventors: Lei Yang, Sunil Vaid, Mikhail Kats, Gary Hering, Philip Blumenfeld, Damien Buie, John Nagyvary, James Foresi, Peter Allen Zawadzki