Compound Semiconductor Patents (Class 438/93)
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Patent number: 8390086Abstract: One embodiment in accordance with the invention is a solar cell comprising a non-single crystal substrate; a nanowire grown from a surface of the non-single crystal substrate; and an electrode coupled to the nanowire, wherein the nanowire is electrically conductive and is for absorbing electromagnetic wave and generating a current.Type: GrantFiled: July 19, 2010Date of Patent: March 5, 2013Assignee: Hewlett-Packard Development Company, L.P.Inventors: Shih-Yuan Wang, Nobuhiko Kobayashi
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Patent number: 8372684Abstract: The method and system for selenization in fabricating CIS and/or CIGS based thin film solar cell overlaying cylindrical glass substrates. The method includes providing a substrate, forming an electrode layer over the substrate and depositing a precursor layer of copper, indium, and/or gallium over the electrode layer. The method also includes disposing the substrate vertically in a furnace. Then a gas including a hydrogen species, a selenium species and a carrier gas are introduced into the furnace and heated to between about 350° C. and about 450° C. to at least initiate formation of a copper indium diselenide film from the precursor layer.Type: GrantFiled: May 7, 2010Date of Patent: February 12, 2013Assignee: Stion CorporationInventors: Robert D. Wieting, Steven Aragon, Chester A. Farris, III
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Patent number: 8372683Abstract: An RTP heating system and an RTP heating method, which can heat a photovoltaic-device intermediate product having a glass substrate, a Mo layer, and a light absorption layer in formation. The RTP heating system is composed of a chamber; a support member located in the chamber; a heating element mounted in the chamber for emitting infrared rays for heating; and a plurality of temperature sensors and a temperature control device for sensing and controlling thermal sources from the heating element and the support member. The infrared rays can be mostly reflected off the Mo layer to apply less direct heating to the glass substrate. Accordingly, the upper and lower surfaces of the photovoltaic-device intermediate product can be heated under different temperatures separately to prevent the glass substrate below the photovoltaic-device intermediate product from softening and deformation and to allow production of the light absorption layer on the Mo layer.Type: GrantFiled: January 11, 2011Date of Patent: February 12, 2013Assignee: ADPV Technology LimitedInventor: Shiezen Steven Huang
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Publication number: 20130034932Abstract: Methods and devices are provided for forming thin-films from solid group IIIA-based particles. In one embodiment of the present invention, a method is described comprising of providing a first material comprising an alloy of a) a group IIIA-based material and b) at least one other material. The material may be included in an amount sufficient so that no liquid phase of the alloy is present within the first material in a temperature range between room temperature and a deposition or pre-deposition temperature higher than room temperature, wherein the group IIIA-based material is otherwise liquid in that temperature range. The other material may be a group IA material. A precursor material may be formulated comprising a) particles of the first material and b) particles containing at least one element from the group consisting of: group IB, IIIA, VIA element, alloys containing any of the foregoing elements, or combinations thereof. The temperature range described above may be between about 20° C.Type: ApplicationFiled: August 10, 2012Publication date: February 7, 2013Applicant: NANOSOLAR, INC.Inventors: Matthew R. Robinson, Chris Eberspacher, Jeroen K.J. Van Duren
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Patent number: 8368143Abstract: A method of forming a strained, semiconductor-on-insulator substrate includes forming a second semiconductor layer on a first semiconductor substrate. The second semiconductor is lattice matched to the first semiconductor substrate such that the second semiconductor layer is subjected to a first directional stress. An active device semiconductor layer is formed over the second semiconductor layer such that the active device semiconductor layer is initially in a relaxed state. One or more trench isolation structures are formed through the active device layer and through the second semiconductor layer so as to relax the second semiconductor layer below the active device layer and impart a second directional stress on the active device layer opposite the first directional stress.Type: GrantFiled: November 21, 2011Date of Patent: February 5, 2013Assignee: International Business Machines CorporationInventors: Stephen W. Bedell, Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Pranita Kulkarni
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Publication number: 20130029454Abstract: A method for making a photovoltaic device is presented. The method includes steps of disposing a window layer on a substrate and disposing an absorber layer on the window layer. Disposing the window layer, the absorber layer, or both layers includes introducing a source material into a deposition zone, wherein the source material comprises oxygen and a constituent of the window layer, of the absorber layer or of both layers. The method further includes step of depositing a film that comprises the constituent and oxygen.Type: ApplicationFiled: July 28, 2011Publication date: January 31, 2013Applicant: GENERAL ELECTRIC COMPANYInventors: James Neil Johnson, David Scott Albin, Scott Feldman-Peabody, Mark Jeffrey Pavol, Robert Dwayne Gossman
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Publication number: 20130025655Abstract: A photovoltaic device and method include a doped germanium-containing substrate, an emitter contact coupled to the substrate on a first side and a back contact coupled to the substrate on a side opposite the first side. The emitter includes at least one doped layer of an opposite conductivity type as that of the substrate and the back contact includes at least one doped layer of the same conductivity type as that of the substrate. The at least one doped layer of the emitter contact or the at least one doped layer of the back contact is in direct contact with the substrate, and the at least one doped layer of the emitter contact or the back contact includes an n-type material having an electron affinity smaller than that of the substrate, or a p-type material having a hole affinity larger than that of the substrate.Type: ApplicationFiled: July 29, 2011Publication date: January 31, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: STEPHEN W. BEDELL, Keith E. Fogel, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
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Publication number: 20130029453Abstract: A method of manufacturing a semiconductor device suitable for optoelectronic switching in response to light of wavelengths in the range 1200 nm to 1600 nm, comprising forming an undoped InGaAs layer on an insulative semiconductor substrate and bonded on opposed sides to a pair of electrical contact layers adapted to constitute the electrodes of a switch, comprising forming the bulk point defects by irradiating the InGaAs layer with Nitrogen ions.Type: ApplicationFiled: July 27, 2012Publication date: January 31, 2013Applicant: THALES HOLDINGS UK PLCInventors: Chris S. GRAHAM, Alwyn SEEDS
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Publication number: 20130029452Abstract: A method of forming optoelectronic conversion layer includes the following steps. A first substrate is provided, and an electrode layer is formed on the first substrate. A first metal precursor layer including one or plural of metal components is formed on the electrode layer. A second substrate is provided, and a nonmetal precursor layer including at least one nonmetal component is formed on the second substrate. The first substrate and the second substrate are then stacked so that the nonmetal precursor layer and the first metal precursor layer are in contact. A thermal treatment is performed to have the first metal precursor layer react with the nonmetal precursor layer for forming an optoelectronic conversion layer.Type: ApplicationFiled: February 20, 2012Publication date: January 31, 2013Inventor: Yi-Jiunn Chien
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Publication number: 20130019944Abstract: A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.Type: ApplicationFiled: July 21, 2011Publication date: January 24, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bahman Hekmatshoar-Tabari, Marinus Hopstaken, Dae-Gyu Park, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
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Publication number: 20130015547Abstract: Provided are a photoelectric conversion device capable of controlling an absorbance of the red region at a wavelength of 600 nm or more, and an imaging device having an improved color reproduction by using the photoelectric device. Provided are a photoelectric conversion device that includes a pair of electrodes, and a photoelectric conversion layer disposed between the pair of electrodes, in which the photoelectric conversion layer contains a p-type semiconductor compound and two or more different kinds of unsubstituted fullerenes, and an imaging device that includes the photoelectric conversion device.Type: ApplicationFiled: March 24, 2011Publication date: January 17, 2013Applicant: FUJIFILM CORPORATIONInventor: Mitsumasa Hamano
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Patent number: 8343797Abstract: A process for preparing a solar cell comprising a support, a layer of cadmium sulfide (CdS), a layer of cadmium telluride (CdTe), a layer of a transparent conductive oxide (TCO), a conductive metallic layer and optionally a layer of buffer material, the CdS layer and the CdTe layer being deposited by means of a pulsed plasma deposition (PPD) method, a solar cell obtainable by means of the described process being also provided.Type: GrantFiled: September 17, 2008Date of Patent: January 1, 2013Inventors: Carlo Taliani, Petr Nozar
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INVERTED METAMORPHIC (IMM) SOLAR CELL SEMICONDUCTOR STRUCTURE AND LASER LIFT-OFF METHOD FOR THE SAME
Publication number: 20120325300Abstract: An inverted metamorphic (IMM) solar cell semiconductor structure for use of a laser lift-off (LLO) process using external laser is introduced. The IMM solar cell semiconductor structure includes a substrate layer, a sacrifice layer, a plurality of bandgap layers, and a handle layer. The sacrifice layer, formed on the substrate layer, is made of a material containing a III-V compound. The bandgap layers, formed on the sacrifice layer, are for producing movements of electronic holes according to an absorbed extrinsic light wavelength. The handle layer is formed on the bandgap layers. Laser penetrates the substrate layer to fall on the sacrifice layer, such that the bandgap layers are lifted off by the sacrifice layer, thereby resulting in a high-efficiency IMM solar cell. A LLO laser lift-off method for the IMM solar cell semiconductor is further provided.Type: ApplicationFiled: December 27, 2011Publication date: December 27, 2012Applicant: INSTITUTE OF NUCLEAR ENERGY RESEARCH, ATOMIC ENERGY COUNCIL, EXECUTIVE YUANInventors: Chan-Wei Yeh, Chih-Hung Wu, Min-De Yang, Yun-Heng Tseng -
Publication number: 20120325319Abstract: A photoelectric conversion element excellent in photoelectric conversion efficiency and stability of photoelectric conversion function, a method for producing the photoelectric conversion element, and a solar cell comprising the photoelectric conversion element are provided. The present invention relates to a photoelectric conversion element comprising a substrate, a first electrode, a photoelectric conversion layer containing a semiconductor and a sensitizing dye, and a hole transport layer, and a second electrode, wherein the hole transport layer comprises a polymer having a repeating unit represented by the general formula (1) or (2), and the sensitizing dye is represented by any of the general formulas (3A) to (3C).Type: ApplicationFiled: June 12, 2012Publication date: December 27, 2012Applicant: KONICA MINOLTA BUSINESS TECHNOLOGIES, INC.Inventors: Kazukuni NISHIMURA, Kenichi ONAKA, Kazuya ISOBE
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Patent number: 8329501Abstract: Methods and devices are provided for high-throughput printing of semiconductor precursor layer from microflake particles. In one embodiment, the method comprises of transforming non-planar or planar precursor materials in an appropriate vehicle under the appropriate conditions to create dispersions of planar particles with stoichiometric ratios of elements equal to that of the feedstock or precursor materials, even after settling. In particular, planar particles disperse more easily, form much denser coatings (or form coatings with more interparticle contact area), and anneal into fused, dense films at a lower temperature and/or time than their counterparts made from spherical nanoparticles. These planar particles may be microflakes that have a high aspect ratio. The resulting dense film formed from microflakes is particularly useful in forming photovoltaic devices.Type: GrantFiled: July 18, 2008Date of Patent: December 11, 2012Assignee: Nanosolar, Inc.Inventors: Matthew R. Robinson, Brian M. Sager, Jeoren K. J. Van Duren
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Publication number: 20120305049Abstract: A solar cell of a module type in which thin-film solar cells having a light absorbing layer made of a compound semiconductor are joined in series on a single substrate. The substrate includes a base made of a ferritic stainless steel, an aluminum layer formed on at least one surface of the base, and an insulation layer having a porous structure obtained by anodizing a surface of the aluminum layer. The insulation layer exhibits compressive stress at room temperature.Type: ApplicationFiled: January 18, 2011Publication date: December 6, 2012Applicant: FUJIFILM CORPORATIONInventors: Shigenori Yuya, Keigo Sato, Ryuichi Nakayama, Ryozo Kaito, Naoki Murakami
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Publication number: 20120302002Abstract: A method for processing a thin-film absorber material with enhanced photovoltaic efficiency includes forming a barrier layer on a soda lime glass substrate followed by formation of a stack structure of precursor layers. The method further includes subjecting the soda-lime glass substrate with the stack structure to a thermal treatment process with at least H2Se gas species at a temperature above 400° C. to cause formation of an absorber material. By positioning the substrates close together, during the process sodium from an adjoining substrate in the furnace also is incorporated into the absorber layer.Type: ApplicationFiled: November 30, 2011Publication date: November 29, 2012Applicant: Stion CorporationInventor: Robert D. Wieting
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Publication number: 20120298170Abstract: Methods and apparatuses are provided in connection with a transparent electrode on organic photovoltaic cells. A layer of dissolvable material is formed on a substrate. A solution having conductive nanowires suspended therein is deposited on the layer of dissolvable material. The solution is evaporated to form a nanowire mesh. The nanowire mesh is heated to sinter junctions between nanowires in the nanowire mesh. The nanowire mesh is affixed on a layer of one or more organic photovoltaic cells. The layer of dissolvable material is dissolved to deposit the nanowire mesh on the layer of one or more organic photovoltaic cells.Type: ApplicationFiled: January 13, 2012Publication date: November 29, 2012Inventors: Jung-Yong Lee, Peter Peumans
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Patent number: 8318531Abstract: thermal management for large scale processing of CIS and/or CIGS based thin film is described. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, to at least initiate formation of a copper indium diselenide film.Type: GrantFiled: November 9, 2011Date of Patent: November 27, 2012Assignee: Stion CorporationInventor: Robert D. Wieting
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Patent number: 8313968Abstract: Using a laser lift-off (LLO) nonbonding technique, freestanding 4-layer GaN/AlGaN heterostructure membranes have been formed. A 4×4 mm mask was attached to the area at the center of the most-upper AlGaN layer was attached using a nonbonding material such as vacuum grease. A microscopic slide attached by an adhesive provided support for the structure during the laser lift-off without bonding to the layers. The vacuum grease and the mask isolated the adhesive from the structure at the center. The microscopic slide served as a temporarily nonbonding handle substrate. Laser lift-off of the sapphire substrate from the heterostructures was performed. The remaining adhesive served as a supporting frame for the structure making a free-standing 4-layer GaN/AGaN heterostructure membrane. Other frameless freestanding membranes can be fabricated for a variety of applications including further III-nitride growth, heterogeneous integration, packaging of micro systems, and thin film patterns.Type: GrantFiled: August 20, 2008Date of Patent: November 20, 2012Inventor: Amal Elgawadi
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Publication number: 20120282718Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.Type: ApplicationFiled: July 20, 2012Publication date: November 8, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventor: Anthony J. Lochtefeld
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Publication number: 20120273038Abstract: A solar cell includes a graphite substrate, an amorphous carbon layer having a thickness of not less than 20 nm and not more than 60 nm formed on the graphite substrate, an AlN layer formed on the amorphous carbon layer, a n-type nitride semiconductor layer formed on the AlN layer; a light-absorption layer including a nitride semiconductor layer formed on the n-type nitride semiconductor layer; a p-type nitride semiconductor layer formed on the light-absorption layer; a p-side electrode electrically connected to the p-type nitride semiconductor layer; and an n-side electrode electrically connected to the n-type nitride semiconductor layer. The amorphous carbon layer is obtained by oxidizing the surface of the graphite substrate.Type: ApplicationFiled: July 12, 2012Publication date: November 1, 2012Applicant: Panasonic CorporationInventors: Nobuaki Nagao, Takahiro Hamada, Akihiro Itoh
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Publication number: 20120273042Abstract: A method of forming a tunnel junction in a solar cell structure alternates between depositing a Group III material and depositing a Group V material on the solar cell structure.Type: ApplicationFiled: April 29, 2011Publication date: November 1, 2012Inventors: Xing-Quan Liu, Christopher M. Fetzer, Daniel C. Law
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Patent number: 8298840Abstract: Thin freestanding nitride films are used as a growth substrate to enhance the optical, electrical, mechanical and mobility of nitride based devices and to enable the use of thick transparent conductive oxides. Optoelectronic devices such as LEDs, laser diodes, solar cells, biomedical devices, thermoelectrics, and other optoelectronic devices may be fabricated on the freestanding nitride films. The refractive index of the freestanding nitride films can be controlled via alloy composition. Light guiding or light extraction optical elements may be formed based on freestanding nitride films with or without layers. Dual sided processing is enabled by use of these freestanding nitride films. This enables more efficient output for light emitting devices and more efficient energy conversion for solar cells.Type: GrantFiled: May 6, 2011Date of Patent: October 30, 2012Assignee: Goldeneye, Inc.Inventors: Scott M. Zimmerman, Karl W. Beeson, William R. Livesay
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Patent number: 8298849Abstract: Methods for forming Cu—In—Ga—N (CIGN) layers for use in TFPV solar panels are described using reactive PVD deposition in a nitrogen containing atmosphere. In some embodiments, the CIGN layers can be used as an absorber layer and eliminate the need of a selenization step. In some embodiments, the CIGN layers can be used as a protective layer to decrease the sensitivity of the CIG layer to oxygen or moisture before the selenization step. In some embodiments, the CIGN layers can be used as an adhesion layer to improve the adhesion between the back contact layer and the absorber layer.Type: GrantFiled: October 10, 2011Date of Patent: October 30, 2012Assignee: Intermolecular, Inc.Inventors: Guowen Ding, Hien Minh Huu Le, Guizhen Zhang
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Publication number: 20120267737Abstract: A radiation detector includes a semiconductor substrate which contains front and rear major surfaces and at least one side surface, a guard ring and a plurality of anode electrode pixels located over the rear surface of the semiconductor substrate, where each anode electrode pixel is formed between adjacent pixel separation regions, a side insulating layer formed on the at least one side surface of the semiconductor substrate, a cathode electrode located over the front major surface of the semiconductor substrate, and an electrically conductive cathode extension formed over at least a portion of side insulating layer, where the cathode extension contacts an edge of the cathode electrode. Further embodiments include various methods of making such semiconductor radiation detector.Type: ApplicationFiled: April 20, 2012Publication date: October 25, 2012Applicant: Redlen TechnologiesInventors: Henry Chen, Salah Awadalla, Pramodha Marthandam
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Patent number: 8293566Abstract: An infrared focal plane array (FPA) is disclosed which utilizes a strained-layer superlattice (SLS) formed of alternating layers of InAs and InxGa1-xSb with 0?x?0.5 epitaxially grown on a GaSb substrate. The FPA avoids the use of a mesa structure to isolate each photodetector element and instead uses impurity-doped regions formed in or about each photodetector for electrical isolation. This results in a substantially-planar structure in which the SLS is unbroken across the entire width of a 2-D array of the photodetector elements which are capped with an epitaxially-grown passivation layer to reduce or eliminate surface recombination. The FPA has applications for use in the wavelength range of 3-25 ?m.Type: GrantFiled: June 15, 2010Date of Patent: October 23, 2012Assignee: Sandia CorporationInventors: Jin K. Kim, Malcolm S. Carroll, Aaron Gin, Phillip F. Marsh, Erik W. Young, Michael J. Cich
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Publication number: 20120252159Abstract: Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.Type: ApplicationFiled: April 19, 2012Publication date: October 4, 2012Applicant: ALTA DEVICES, INC.Inventors: Hui NIE, Brendan M. KAYES, Isik C. KIZILYALLI
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Patent number: 8278128Abstract: An off-axis cut of a nonpolar III-nitride wafer towards a polar (?c) orientation results in higher polarization ratios for light emission than wafers without such off-axis cuts. A 5° angle for an off-axis cut has been confirmed to provide the highest polarization ratio (0.9) than any other examined angles for off-axis cuts between 0° and 27°.Type: GrantFiled: February 2, 2009Date of Patent: October 2, 2012Assignee: The Regents of the University of CaliforniaInventors: Hisashi Masui, Hisashi Yamada, Kenji Iso, Asako Hirai, Makoto Saito, James S. Speck, Shuji Nakamura, Steven P. DenBaars
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Patent number: 8278133Abstract: A method for joining a film onto a substrate comprises: a step (A) of floating the film on an interface between an aqueous liquid and a water-insoluble liquid; a step (B) of immersing the substrate into the aqueous liquid; a step (C) of stacking the substrate onto said one surface of the film in the aqueous liquid; a step (D) of immersing the stacked substrate and film into the water-insoluble liquid with maintaining the substrate being stacked on the film to adhere the film to the substrate; and a step (E) of drawing up the stacked substrate and film from the water-insoluble liquid with maintaining the substrate being stacked on the film to join the film onto the substrate.Type: GrantFiled: October 19, 2011Date of Patent: October 2, 2012Assignee: Panasonic CorporationInventors: Tohru Nakagawa, Akihiro Itoh
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Publication number: 20120228731Abstract: A method is provided for fabricating a thin film semiconductor device. The method includes providing a plurality of raw semiconductor materials. The raw semiconductor materials undergo a pre-reacting process to form a homogeneous compound semiconductor target material. The compound semiconductor target material is deposited onto a substrate to form a thin film having a composition substantially the same as a composition of the compound semiconductor target material.Type: ApplicationFiled: May 23, 2012Publication date: September 13, 2012Applicant: SUNLIGHT PHOTONICS INC.Inventors: Allan James BRUCE, Sergey FROLOV, Michael CYRUS
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Patent number: 8263855Abstract: Apparatus and Method for Optimizing the Efficiency of a Bypass Diode in Solar Cells. In a preferred embodiment, a layer of TiAu is placed in an etch in a solar cell with a contact at a doped layer of GaAs. Electric current is conducted through a diode and away from the main cell by passing through the contact point at the GaAs and traversing a lateral conduction layer. These means of activating, or “turning on” the diode, and passing the current through the circuit results in greater efficiencies than in prior art devices. The diode is created during the manufacture of the other layers of the cell and does not require additional manufacturing.Type: GrantFiled: May 7, 2010Date of Patent: September 11, 2012Assignee: Emcore Solar Power, Inc.Inventors: Paul R. Sharps, Marvin Brad Clevenger, Mark A Stan
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Patent number: 8263857Abstract: A solar cell includes a substrate of a first conductive type having at least one via hole; an emitter layer of a second conductive type opposite to the first conductive type; and at least one first electrode positioned from a first surface of the substrate to the at least one via hole, and at least one first electrode current collector positioned from the at least one via hole to a second surface of the substrate, wherein the at least one via hole has a radius of about 10 ?m to about 40 ?m, and at least one of a portion of the at least one first electrode and a portion of the at least one electrode current collector, in the at least one via hole, includes at least one cavity.Type: GrantFiled: January 21, 2010Date of Patent: September 11, 2012Assignee: LG Electronics Inc.Inventors: Daehee Jang, Jihoon Ko, Juwan Kang, Jonghwan Kim
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Patent number: 8258001Abstract: A multilayer structure to form absorber layers for solar cells. The multilayer structure includes a base comprising a contact layer on a substrate layer, a first layer on the contact layer, and a metallic layer on the first layer. The first layer includes an indium-gallium-selenide film and the gallium to indium molar ratio of the indium-gallium-selenide film is in the range of 0 to 0.8. The metallic layer includes gallium and indium without selenium. Additional selenium is deposited onto the metallic layer before annealing the structure for forming an absorber.Type: GrantFiled: October 27, 2008Date of Patent: September 4, 2012Assignee: SoloPower, Inc.Inventor: Bulent M. Basol
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Patent number: 8257999Abstract: A growth method is proposed for high quality zinc oxide comprising the following steps: (1) growing a gallium nitride layer on a sapphire substrate around a temperature of 1000° C.; (2) patterning a SiO2 mask into stripes oriented in the gallium nitride <1 100> or <11 20> direction; (3) growing epitaxial lateral overgrowth of (ELO) gallium nitride layers by controlling the facet planes via choosing the growth temperature and the reactor; (4) depositing zinc oxide films on facets ELO gallium nitride templates by chemical vapor deposition (CVD). Zinc oxide crystal of high quality with a reduced number of crystal defects can be grown on a gallium nitride template. This method can be used to fabricate zinc oxide films with low dislocation density lower than 104/cm?2, which will find important applications in future electronic and optoelectronic devices.Type: GrantFiled: May 20, 2011Date of Patent: September 4, 2012Assignee: National University of SingaporeInventors: Soo Jin Chua, Hailong Zhou, Jianyi Lin, Hui Pan
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Patent number: 8252621Abstract: A method of forming a Group IBIIIAVIA solar cell absorber, which includes a top surface region of less than or equal to 300 nm depth. The Ga/(Ga+In) molar ratio within the top surface region is in the range of 0.1-0.3. The Group IBIIIAVIA solar cell absorber is formed by reacting the layers of a multilayer material structure which includes a metallic film including at least Cu and In formed on a base, a separator layer including Se is formed on the metallic film, a metallic source layer substantially including Ga formed on the separator layer, and a cap layer substantially including Se formed on the source layer.Type: GrantFiled: February 8, 2008Date of Patent: August 28, 2012Assignee: SoloPower, Inc.Inventor: Bulent M. Basol
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Publication number: 20120211073Abstract: A method of fabricating a solar cell includes steps of: forming an amorphous carbon layer, an AlN layer and a first n-type nitride semiconductor layer on the surface of the graphite substrate, forming a mask layer with a plurality of openings on the first n-type nitride semiconductor layer; forming a plurality of second n-type nitride semiconductor layers on the portions of the first n-type nitride semiconductor layer which are exposed by the plurality of openings; forming a plurality of light absorption layers on the plurality of second n-type nitride semiconductor layers; forming a plurality of p-side nitride semiconductor layers on the plurality of the light absorption layers; forming a p-side electrode; and forming an n-side electrode.Type: ApplicationFiled: April 30, 2012Publication date: August 23, 2012Applicant: PANASONIC CORPORATIONInventors: Nobuaki NAGAO, Takahiro HAMADA, Akio MATSUSHITA
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Publication number: 20120214274Abstract: The present invention discloses a solar cell having a multi-layered structure that is used to generate, transport, and collect electric charges. The multi-layered nanostructure comprises a cathode, a conducting metal layer, a photo-active layer, a hole-transport layer, and an anode. The photo-active layer comprises a tree-like nanostructure array and a conjugate polymer filler. The tree-like nanostructure array is used as an electron acceptor while the conjugate polymer filler is as an electron donor. The tree-like nanostructure array comprises a trunk part and a branch part. The trunk part is formed in-situ on the surface of the conducting metal layer and is used to provide a long straight transport pathway to transport electrons. The large contact area between the branch part and the conjugate polymer filler provides electron-hole separation.Type: ApplicationFiled: May 3, 2012Publication date: August 23, 2012Applicant: National Taiwan UniversityInventors: WEI-FANG SU, CHUN-WEI CHEN, JIH-JEN WU, YUN-YUE LIN
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Publication number: 20120214275Abstract: An optically active material is used to create power devices and circuits having significant performance advantages over conventional methods for affecting optical control of power electronics devices and circuits. A silicon-carbide optically active material is formed by compensating shallow donors with the boron related D-center. The resulting material can be n-type or p-type but it is distinguished from other materials by the ability to induce persistent photoconductivity in it when illuminated by electromagnetic radiation with a photon energy in excess of the threshold energy required to photoexcite electrons from the D-center to allowed states close to the conduction band edge, which varies from polytype to polytype.Type: ApplicationFiled: May 3, 2012Publication date: August 23, 2012Applicant: SS SC IP, LLCInventor: Michael S. MAZZOLA
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Publication number: 20120186648Abstract: A photovoltaic device (10) having a coaxial molecular stack (12) for transferring photocurrent is disclosed. The device (10) comprises a plurality of coaxial molecular stacks (12) located between and oriented substantially perpendicular to first (14) and second (16) electrodes to provide charge transport of photocurrent through each coaxial molecular stack (12) in the photovoltaic device (10). Each coaxial molecular stack (12) comprises a plurality of ?-conjugated planar supramolecules (18) stackable through columnar self assembly to form the coaxial molecular stack (12). Each supramolecule (18) is comprised of a ?-conjugated hub (20) covalently appended to multiple copies of an electron acceptor spoke (22) to form an outer n-channel with a coaxial inner p-channel.Type: ApplicationFiled: August 9, 2010Publication date: July 26, 2012Inventors: Ling Zang, Yanke Che
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Patent number: 8227359Abstract: A method for manufacturing a Group III nitride semiconductor layer according to the present invention includes a sputtering step of disposing a substrate and a target containing a Group III element in a chamber, introducing a gas for formation of a plasma in the chamber and forming a Group III nitride semiconductor layer added with Si as a dopant on the substrate by a reactive sputtering method, wherein a Si hydride is added in the gas for formation of a plasma.Type: GrantFiled: August 8, 2011Date of Patent: July 24, 2012Assignee: Showa Denko K.K.Inventors: Yasunori Yokoyama, Hisayuki Miki
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Patent number: 8227324Abstract: A GaN single crystal 20 is grown on a crystal growth surface of a seed crystal (GaN layer 13) through the flux method in a nitrogen (N2) atmosphere at 3.7 MPa and 870° C. employing a flux mixture including Ga, Na, and Li at about 870° C. Since the back surface of the template 10 is R-plane of the sapphire substrate 11, the template 10 is readily corroded or dissolved in the flux mixture from the back surface thereof. Therefore, the template 10 is gradually dissolved or corroded from the back surface thereof, resulting in separation from the semiconductor or dissolution in the flux. When the GaN single crystal 20 is grown to a sufficient thickness, for example, about 500 ?m or more, the temperature of the crucible is maintained at 850° C. to 880° C., whereby the entirety of the sapphire substrate 11 is dissolved in the flux mixture.Type: GrantFiled: December 10, 2007Date of Patent: July 24, 2012Assignees: Toyoda Gosei Co., Ltd., NGK Insulators, Ltd., Osaka UniversityInventors: Shiro Yamazaki, Makoto Iwai, Takanao Shimodaira, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura
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Patent number: 8227291Abstract: A method of manufacturing a stacked-layered thin film solar cell with a light-absorbing layer having a band gradient is provided. The stacked-layered thin film solar cell includes a substrate, a back electrode layer, a light-absorbing layer, a buffer layer, a window layer, and a top electrode layer stacked up sequentially. The light-absorbing layer has a band gradient structure and is essentially a group I-III-VI compound, wherein the group III elements at least include indium (In) and aluminum (Al). Moreover, the Al/In ratio in the upper half portion of the light-absorbing layer is greater than that in the lower half portion of the light-absorbing layer, wherein the upper half portion is proximate to a light incident surface.Type: GrantFiled: September 10, 2009Date of Patent: July 24, 2012Assignee: Nexpower Technology Corp.Inventor: Feng-Chien Hsieh
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Publication number: 20120180870Abstract: A photoelectric conversion device includes a layered structure formed on a substrate including a first electrode, a photoelectric conversion semiconductor layer and a second electrode, the photoelectric conversion semiconductor layer being mainly composed of a compound semiconductor containing group Ib, group IIIb and group VIb elements, and containing an alkaline(-earth) metal, wherein the alkaline(-earth) metal concentration distribution in the photoelectric conversion layer in the thickness direction includes a valley with the lowest alkaline(-earth) metal concentration and an area with an alkaline(-earth) metal concentration higher than that at the valley, the area being nearer to the substrate from the valley, and wherein Expressions (1) and (2) below are satisfied: 1.0×10?6?a [mol/cc]?2.0×10?5??(1) and 1.5?b/a?4.Type: ApplicationFiled: September 30, 2010Publication date: July 19, 2012Applicant: FUJIFILM CORPORATIONInventor: Kana Yamamoto
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Patent number: 8211727Abstract: According to the present invention, an AlN crystal film seed layer having high crystallinity is combined with selective/lateral growth, whereby a Group III nitride semiconductor multilayer structure more enhanced in crystallinity can be obtained. The Group III nitride semiconductor multilayer structure of the present invention is a Group III nitride semiconductor multilayer structure where an AlN crystal film having a crystal grain boundary interval of 200 nm or more is formed as a seed layer on a C-plane sapphire substrate surface by a sputtering method and an underlying layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, each composed of a Group III nitride semiconductor, are further stacked, wherein regions in which the seed layer is present and is absent are formed on the C-plane sapphire substrate surface and/or regions capable of epitaxial growth and incapable of epitaxial growth are formed in the underlying layer.Type: GrantFiled: July 30, 2009Date of Patent: July 3, 2012Assignee: Showa Denko K.K.Inventors: Kenzo Hanawa, Yasumasa Sasaki
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Patent number: 8193442Abstract: CIGS absorber layers fabricated using coated semiconducting nanoparticles and/or quantum dots are disclosed. Core nanoparticles and/or quantum dots containing one or more elements from group IB and/or IIIA and/or VIA may be coated with one or more layers containing elements group IB, IIIA or VIA. Using nanoparticles with a defined surface area, a layer thickness could be tuned to give the proper stoichiometric ratio, and/or crystal phase, and/or size, and/or shape. The coated nanoparticles could then be placed in a dispersant for use as an ink, paste, or paint. By appropriate coating of the core nanoparticles, the resulting coated nanoparticles can have the desired elements intermixed within the size scale of the nanoparticle, while the phase can be controlled by tuning the stochiometry, and the stoichiometry of the coated nanoparticle may be tuned by controlling the thickness of the coating(s).Type: GrantFiled: December 11, 2007Date of Patent: June 5, 2012Assignee: Nanosolar, Inc.Inventors: Brian M. Sager, Dong Yu, Matthew R. Robinson
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Patent number: 8187913Abstract: In a process for producing a photoelectric conversion device comprising a bottom electrode layer, a photoelectric conversion semiconductor layer, a buffer layer, and a transparent conductive layer, which are stacked in this order on a substrate, all film forming stages ranging from a stage of forming the buffer layer to a stage of forming the transparent conductive layer are performed with a liquid phase technique. The buffer layer is formed with a chemical bath deposition technique, and the transparent conductive layer is formed with an electrolytic deposition technique.Type: GrantFiled: January 31, 2011Date of Patent: May 29, 2012Assignee: FUJIFILM CorporationInventors: Tetsuo Kawano, Takashi Koike, Ryouko Agui
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Patent number: 8187904Abstract: A method and a system are provide for forming planar precursor structures which are subsequently converted into thin film solar cell absorber layers. A precursor structure is first formed on the front surface of the foil substrate and then planarized through application of force or pressure by a smooth surface to obtain a planar precursor structure. The precursor structure includes at least one of a Group IB material, Group IIIA material and Group VIA material. The planar precursor structures are reacted to form planar and compositionally uniform thin film absorber layers for solar cells.Type: GrantFiled: July 21, 2008Date of Patent: May 29, 2012Assignee: SoloPower, Inc.Inventor: Bulent M. Basol
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Publication number: 20120129294Abstract: A photoconductor comprising a layer stack with a semiconductor layer photoconductive for a predetermined wavelength range between two semiconductor boundary layers with a larger band gap than the photoconductive semiconductor layer on a substrate, wherein the semiconductor boundary layers comprise deep impurities for trapping and recombining free charge carriers from the photoconductive semiconductor layer, and two electrodes connected to the photoconductive semiconductor layer, for lateral current flow between the electrodes through the photoconductive semiconductor layer.Type: ApplicationFiled: January 27, 2012Publication date: May 24, 2012Inventors: Bernd SARTORIUS, Harald Kuenzel, Helmut Roehle
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Publication number: 20120125421Abstract: A reusable substrate and method for forming single crystal silicon solar cells are described. A method of forming a photovoltaic cell includes forming an intermediate layer on a monocrystalline silicon substrate, forming a monocrystalline silicon layer on the intermediate layer, and forming electrical features in the monocrystalline silicon layer. The method further includes forming openings in the monocrystalline silicon layer, and detaching the monocrystalline silicon layer from the substrate by selectively etching the intermediate layer through the openings.Type: ApplicationFiled: November 22, 2010Publication date: May 24, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brent A. ANDERSON, Edward J. NOWAK, Jed H. RANKIN