Abstract: Provided is a back side illuminated image sensor device. The image sensor device includes a substrate having a front side and a back side opposite the front side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a deep trench isolation feature that is disposed adjacent to the radiation-detection device. The image sensor device further includes a doped layer that at least partially surrounds the deep trench isolation feature in a conformal manner.

Abstract: This invention discloses a method for etching a see-through thin film solar module, comprising: printing ink paste which resists the etching of etching solutions in the protected area of the thin film solar module which is placed under a screen; drying and solidifying the ink paste; coating etching solutions on the thin film solar module; and removing the ink paste. The method of this invention can accurately position the see-through area, achieve various selections of see-through patterns, facilitate the realization of the see-through function in large-area thin film solar modules, and alleviate the problem that a short circuit easily occurs in a see-through thin film solar module.

Abstract: The invention pertains to a process for manufacturing a solar cell foil comprising the steps of: providing an etchable temporary substrate applying a front electrode of a transparent conductive oxide (TCO) onto the temporary substrate applying a photovoltaic layer onto the TCO layer applying a back electrode layer applying a permanent carrier ensuring that the front electrode and the back electrode are electrically connected in an interconnect to establish a series connection, the front and the back electrode each being interrupted by front and back groove, respectively, at different sides of the interconnect in any one of the preceding steps providing an etch resist on the non-TCO side of the temporary substrate at least at the location of the interconnect, and at least not at the entire location of the front groove selectively removing the temporary substrate where it is not covered with etch resist.

Abstract: The present invention discloses a method for fabricating a silicon heterojunction solar cell. The silicon heterojunction solar cell according to the present invention comprises a first conductive silicon substrate; a first intrinsic silicon layer and a second intrinsic silicon layer respectively formed on two sides of the first conductive silicon substrate and jointed with the first conductive silicon substrate to form silicon heterojunctions; a second conductive silicon layer and a first conductive heavily-doped silicon layer respectively formed on the first intrinsic silicon layer and the second intrinsic silicon layer, wherein the second conductive silicon layer and the first conductive heavily-doped silicon layer are formed via an ion implantation method, whereby is optimized the thickness and doped quality of the second conductive silicon layer and the first conductive heavily-doped silicon layer.

Abstract: A method for forming an amorphous semiconductor which contains an impurity element and has low resistivity and a method for manufacturing a semiconductor device with excellent electrical characteristics with high yield are provided. In the method for forming an amorphous semiconductor containing an impurity element, which utilizes a plasma CVD method, pulse-modulated discharge inception voltage is applied to electrodes under the pressure and electrode distance with which the minimum discharge inception voltage according to Paschen's Law can be obtained, whereby the amorphous semiconductor which contains an impurity element and has low resistivity is formed.

Abstract: A process for producing a photovoltaic device, wherein when providing an n-type amorphous silicon layer on an i-type amorphous silicon layer, a desired crystallization ratio can be achieved without reducing the deposition rate.

Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.

Abstract: A photovoltaic element comprising a transparent conductive film capable of improving weather resistance is obtained. This photovoltaic element includes a photoelectric conversion layer, and a transparent conductive film formed on a surface of the photoelectric conversion layer and including an indium oxide layer having (222) orientation and two X-ray diffraction peaks, in which the two X-ray diffraction peaks of the indium oxide layer is constituted by a first peak on a low angle side and a second peak on a high angle side having a peak intensity level lower than the first peak.

Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.

Abstract: Solar cells fabricated without gasification of metallurgical-grade silicon. The substrates are prepared by: melting metallurgical grade silicon in a furnace; solidifying the melted metallurgical grade silicon into an ingot; slicing the ingot to obtain a plurality of wafers; polishing and cleaning each wafer; depositing aluminum layer on backside of each wafer; depositing a layer of hydrogenated silicon nitride on front surface of each wafer; annealing the wafers at elevated temperature; removing the hydrogenated silicon nitride; and, removing the aluminum layer. The front surface may be textured prior to forming the solar cell. The solar cell structure comprises a metallurgical grade doped silicon substrate and a thin-film structure formed over the substrate to form a p-i-n junction with the substrate. The substrate may be doped p-type, and the thin film structure may be an intrinsic amorphous layer formed over the substrate and an n-type amorphous layer formed over the intrinsic layer.

Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.

Abstract: Open circuit voltage of a photovoltaic device including a p-i-n junction including amorphous silicon-containing semiconductor materials is increased by a high power plasma treatment on an amorphous p-doped silicon-containing semiconductor layer before depositing an amorphous intrinsic silicon-containing semiconductor layer. The high power plasma treatment deposits a thin layer of nanocrystalline silicon-containing semiconductor material or converts a surface layer of the amorphous p-doped silicon containing layer into a thin nanocrystalline silicon-containing semiconductor layer. After deposition of an intrinsic amorphous silicon layer, the thin nanocrystalline silicon-containing semiconductor layer functions as an interfacial nanocrystalline silicon-containing semiconductor layer located at a p-i junction.

Abstract: An image sensor may include a first substrate having circuitry including wires and a silicon layer formed on and/or over the first substrate to selectively contact the wires. The image sensor may include photodiodes bonded to the first substrate while contacting the silicon layer and electrically connected to the wires. Each unit pixel may be implemented having complicated circuitry without a reduction in photosensitivity. Additional on-chip circuitry may also be implanted in the design.

Abstract: A method of forming an electrode, by which the resistance of the electrode can be reduced, and a method of manufacturing a solar cell using the method of forming an electrode are provided. The electrode forming method includes coating conductive paste on a substrate, forming a metal layer by drying the conductive paste or heating the same at low temperature, and annealing the metal layer by Joule heating using the metal layer by applying an electric field to the metal layer.

Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.

Abstract: A thin silicon solar cell is described. Specifically, the solar cell may be fabricated from a crystalline silicon wafer having a thickness of approximately 50 micrometers to 500 micrometers. The solar cell comprises a first region having a p-n homojunction, a second region that creates heterojunction surface passivation, and a third region that creates heterojunction surface passivation. Amorphous silicon layers are deposited on both sides of the silicon wafer at temperatures below approximately 400 degrees Celsius to reduce the loss of passivation properties of the amorphous silicon. A final layer of transparent conductive oxide is formed on both sides at approximately 165 degrees Celsius. Metal contacts are applied to the transparent conductive oxide. The low temperatures and very thin material layers used to fabricate the outer layers of used to fabricate the outer layers of the solar cell protect the thin wafer from excessive stress that may lead to deforming the wafer.

Abstract: The invention relates to a hetero solar cell which comprises silicon, doped silicon layers and tunnel passivation layers. This is concluded by an indium-tin oxide layer on the front-side and by an aluminium layer on the rear-side. Furthermore, the invention relates to a method for producing hetero solar cells.

Abstract: A semiconductor device 700 includes a substrate and an optical sensor unit 700 formed on the substrate for sensing light and for generating a sensing signal, the optical sensor unit 700 including a first thin film diode 701A for detection of light in a first wavelength range, a second thin film diode 701B detecting light in a second wavelength range that contains wavelengths longer than the longest wavelength in the first wavelength range. The first thin film diode 701A and the second thin film diode 701B are connected in parallel to each other. The sensing signal is generated based on the output from one of the first thin film diode 701A and the second thin film diode 701B. By this means, the wavelength range that can be detected by the optical sensor unit can be expanded and the sensing sensitivity can be increased.

Abstract: A dielectric film stack of a solar cell is ablated using a laser. The dielectric film stack includes a layer that is absorptive in a wavelength of operation of the laser source. The laser source, which fires laser pulses at a pulse repetition rate, is configured to ablate the film stack to expose an underlying layer of material. The laser source may be configured to fire a burst of two laser pulses or a single temporally asymmetric laser pulse within a single pulse repetition to achieve complete ablation in a single step.

Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.

Abstract: The present invention provides a method and apparatus for edge film stack removal process for fabricating photovoltaic devices. In one embodiment, a method for manufacturing solar cell devices on a substrate includes providing a substrate into a chemical vapor deposition chamber, contacting a shadow frame disposed in the deposition chamber to a periphery region of the substrate, depositing a silicon-containing layer on the substrate through an aperture defined by the shadow frame, transferring the substrate to a physical vapor deposition chamber, depositing a transparent conductive layer on the silicon-containing layer, transferring the substrate to a laser edge removal tool, and laser scribing the layers formed on the periphery region of the substrate.

Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.

Abstract: One aspect of the present subject matter relates to a method for forming a transistor. According to an embodiment of the method, a pillar of amorphous semiconductor material is formed on a crystalline substrate, and a solid phase epitaxy process is performed to crystallize the amorphous semiconductor material using the crystalline substrate to seed the crystalline growth. The pillar has a sublithographic thickness. A transistor body is formed in the crystallized semiconductor pillar between a first source/drain region and a second source/drain region. A surrounding gate insulator is formed around the semiconductor pillar, and a surrounding gate is formed around and separated from the semiconductor pillar by the surrounding gate insulator. Other aspects are provided herein.

Abstract: One embodiment of the present invention provides a solar cell. The solar cell includes a photovoltaic structure, a transparent-conductive-oxide (TCO) layer situated above the photovoltaic structure, and a front-side metal grid situated above the TCO layer. The TCO layer is in contact with the front surface of the photovoltaic structure. The metal grid includes at least one of: Cu and Ni.

Abstract: One embodiment of the present invention provides a tunneling junction based solar cell. The solar cell includes a base layer; a quantum-tunneling-barrier (QTB) layer situated adjacent to the base layer; an emitter; a surface field layer; a front-side electrode; and a back-side electrode.

Abstract: A p type amorphous silicon layer is stacked, by a CVD method, on a main surface of an n type single-crystalline silicon substrate; an n type amorphous silicon layer is stacked, by the CVD method, on a surface opposite to the surface on which the p type amorphous silicon layer is stacked; and, by using a laser ablation processing method, through-holes are formed in the n type single-crystalline silicon substrate, the p type amorphous silicon layer, and the n type amorphous silicon layer. Subsequently, an insulating layer is formed on an inner wall surface of each of the through-holes, and then a conductive material is filled therein.

Abstract: The present disclosure presents a partially-transparent (see-through) three-dimensional thin film solar cell (3-D TFSC) substrate. The substrate includes a plurality of unit cells. Each unit cell structure has the shape of a truncated pyramid, and its parameters may be varied to allow a desired portion of sunlight to pass through.

Abstract: Reconfigurable devices and methods for the fabrication thereof are provided. In one aspect, a reconfigurable device is provided.

Abstract: A memory element for a magnetic RAM, having a first magnetic portion in a first recess of a first insulating layer; and a non-magnetic portion and a second magnetic portion in a second recess of a second insulating layer covering the first insulating layer, the second recess exposing the first magnetic portion and a portion of the first insulating layer around the first magnetic portion, the non-magnetic portion being interposed between the first and second magnetic portions.

Abstract: A method for manufacturing a printed circuit board with a capacitor embedded therein which has a dielectric film using laser lift off, and a capacitor manufactured thereby. In the method, a dielectric film is formed on a transparent substrate and heat-treated. A first conductive layer is formed on the heat-treated dielectric film. A laser beam is irradiated onto a stack formed, from below the transparent substrate, to separate the transparent substrate from the stack. After the transparent substrate is separated from the stack, a second conductive layer is formed with a predetermined pattern on the dielectric film. Also, an insulating layer and a third conductive layer are formed on the first and second conductive layers to alternate with each other in a predetermined number.

Abstract: A method of patterning a substrate includes providing a focusing plate adjacent to a plasma chamber containing a plasma, the focusing plate configured to extract ions from the plasma through at least one aperture that provides focused ions towards the substrate. The method further includes directing first ions through the at least one aperture to one or more first regions of the substrate so as to condense first gaseous species provided in ambient of the substrate on the one or more first regions of the substrate.

Abstract: Apparatus and methods for forming a silicon-containing i-layer on a substrate for a thin film photovoltaic cell are disclosed. The apparatus includes a chamber body defining a processing region containing the substrate, a hydrogen source and a silane source coupled to a plasma generation region, an RF power source that applies power at a power level in the plasma generation region to generate a plasma and deposit the silicon-containing i-layer at a selected deposition rate to a selected thickness and a controller. The controller controls the power level and the deposition rate of the i-layer on the substrate such that the thin film solar cell exhibits light induced damage that conforms to a linear fit of the product of the RF power, the deposition rate and the selected thickness of the i-layer.

Abstract: A method of manufacturing a semiconductor film capable of inhibiting the quality of a semiconductor film from destabilization is obtained. This method of manufacturing a semiconductor film includes steps of introducing source gas for a semiconductor, controlling the pressure of an atmosphere formed by the source gas to a prescribed level, heating a catalytic wire to at least a prescribed temperature after controlling the pressure of the atmosphere to the prescribed level and forming a semiconductor film by decomposing the source gas with the heated catalytic wire.

Abstract: A neutron sensing material detector includes an anode; a cathode; and a semiconductor material disposed between the anode and the cathode. An electric field is applied between the anode and cathode. The semiconductor material is composed of a ternary composition of stoichiometry LiM2+GV and exhibits an antifluorite-type ordering, where the stoichiometric fractions are Li=1, M2+=1, and GV=1. Electron-hole pairs are created by absorption of radiation, and the electron-hole pairs are detected by the current they generate between the anode and the cathode. The anode may include an array of pixels to provide improved spatial and energy resolution over the face of the anode. The signal value for each pixel can be mapped to a color or grey scale normalized to all the other pixel signal values for a particular moment in time. A guard ring or guard grid may be provided to reduce leakage current.

Abstract: A photoelectric conversion device includes a thin film transistor that is placed on a substrate, a photodiode that is connected to a drain electrode of the thin film transistor and includes an upper electrode, a lower electrode and a photoelectric conversion layer placed between the upper and lower electrodes, a first interlayer insulating film that covers at least the upper electrode, a second interlayer insulating film that is placed in an upper layer of the first interlayer insulating film and covers the thin film transistor and the photodiode, and a line that is connected to the upper electrode through a contact hole disposed in the first interlayer insulating film and the second interlayer insulating film.

Abstract: A method for manufacturing a printed circuit board with a capacitor embedded therein which has a dielectric film using laser lift off, and a capacitor manufactured thereby. In the method, a dielectric film is formed on a transparent substrate and heat-treated. A first conductive layer is formed on the heat-treated dielectric film. A laser beam is irradiated onto a stack formed, from below the transparent substrate, to separate the transparent substrate from the stack. After the transparent substrate is separated from the stack, a second conductive layer is formed with a predetermined pattern on the dielectric film. Also, an insulating layer and a third conductive layer are formed on the first and second conductive layers to alternate with each other in a predetermined number.

Abstract: Disclosed herein is a process for producing a photoelectric conversion device, including the steps of: coating the surface of a conductive substrate with a porous catalyst layer; coating the surface of the conductive substrate with a porous insulating layer in such a way as to cover the porous catalyst layer; coating the surface of the porous insulating layer with a current collecting layer; coating the surface of the porous insulating layer with a porous metal oxide semiconductor layer in such a way as to cover the current collecting layer; allowing the porous metal oxide semiconductor layer to support a dye; impregnating the porous metal oxide semiconductor layer, the porous insulating layer, and the porous catalyst layer with an electrolyte solution; and forming a transparent sealing layer in such a way as to cover at least the porous insulating layer and the porous metal oxide semiconductor layer.

Abstract: A method for maintaining a smooth surface of crystallizable material is disclosed. First, a substrate is provided. A target material layer is then formed on the substrate, with the target material being a crystallizable material. A protecting layer is subsequently formed on the target material layer. Next, an annealing treatment is implemented, with the surface of the target material layer, facing the protecting layer, being maintained in its original smooth state by the pressure and/or adhesion of the protecting layer. Finally, the protecting layer is removed to leave an open and smooth surface of the processed crystallizable material.

Abstract: A novel photovoltaic solar cell and method of making the same are disclosed. The solar cell includes: at least one absorber layer which could either be a lightly doped layer or an undoped layer, and at least a doped window-layers which comprise at least two sub-window-layers. The first sub-window-layer, which is next to the absorber-layer, is deposited to form desirable junction with the absorber-layer. The second sub-window-layer, which is next to the first sub-window-layer, but not in direct contact with the absorber-layer, is deposited in order to have transmission higher than the first-sub-window-layer.

Abstract: A method and apparatus for depositing a film on a substrate includes subjecting material to an energy beam.

Abstract: A method for fabricating a photovoltaic (PV) cell panel wherein all PV cells are formed simultaneously on a two-dimensional array of monocrystalline silicon mother wafers affixed to a susceptor is disclosed. Porous silicon separation layers are anodized in the surfaces of the mother wafers. The porous film is then smoothed to form a suitable surface for epitaxial film growth. An epitaxial reactor is used to grow n- and p-type films forming the PV cell structures. Contacts to the n- and p-layers are deposited, followed by gluing of a glass layer to the PV cell array. The porous silicon film is then separated by exfoliation in a peeling motion across all the cells attached together above, followed by attaching a strengthening layer on the PV cell array. The array of mother wafers may be reused multiple times, thereby reducing materials costs for the completed solar panels.

Abstract: Methods to form complementary implant regions in a workpiece are disclosed. A mask may be aligned with respect to implanted or doped regions on the workpiece. The mask also may be aligned with respect to surface modifications on the workpiece, such as deposits or etched regions. A masking material also may be deposited on the implanted regions using the mask. The workpiece may be a solar cell.

Abstract: Embodiments of the present invention are directed to apparatus and methods for depositing amorphous and microcrystalline silicon films during the formation of solar cells. Specifically, embodiments of the invention provide for a pre-heated hydrogen-containing gas to be introduced into a processing chamber separately from the silicon-containing gas. A plasma, struck from the heated hydrogen-containing gas, reacts with the silicon-containing gas to produce a silicon film on a substrate.

Abstract: The present invention provides novel strategies for mitigating the Staebler-Wronski Effect (SWE), that is, the light induced degradation in performance of photoconductivity in amorphous silicon. Materials according to the present invention include alloys or composites of amorphous silicon which affect the elasticity of the materials, amorphous silicon that has been grown on a flexed substrate, compression sandwiched comprising amorphous silicon, and amorphous silicon containing nanoscale features that allow stress to be relieved. The composites are formed with nanoparticles such as nanocrystals and nanotubes. Preferred are boron nitride nanotubes (BNNT) including those that have been surface modified.

Abstract: Disclosed is a pixel layout structure capable of increasing the capability of detecting amorphous silicon (a-Si) residue defects and a method for manufacturing the same. Wherein, an a-Si dummy layer is disposed on either one side or both sides of each data line. The design of such an a-Si dummy layer is utilized, so that in an existing testing conditions (by making use of an existing automatic array tester in carrying out the test), in case that there exists an a-Si residue in a pixel, the pixel having defects can be detected through an enhanced capacitance coupling effect and an electron conduction effect. Therefore, through the application of the above-mentioned design, the capability of an automatic array tester can effectively be increased in detecting a defective pixel having a-Si residues.

Abstract: A process for fabricating a silicon-based thin-film photovoltaic cell, applicable for example in the energy generation field. The fabrication process includes a) depositing a p-doped or n-doped amorphous silicon film, the X-ray diffraction spectrum of which has a line centered at 28° that has a mid-height width, denoted by a, such that 4.7°?a<6.0°, on a substrate.

Abstract: Photovoltaic coatings and methods of making photovoltaic coatings are provided. The photovoltaic coating contains a semiconductor layer containing semiconductor elements such as silicon particles between bottom metal-semiconductor compounds and upper metal-semiconductor compounds. The upper metal-semiconductor compounds can exist at uppermost boundary portions between semiconductor elements and not substantially over uppermost surfaces of the semiconductor elements. The method can involve forming a semiconductor layer comprising semiconductor elements such as silicon particles over a conductive layer; forming first metal-semiconductor compounds at a bottom surface of the semiconductor layer; and forming second metal-semiconductor compounds at uppermost boundary portions between the semiconductor elements.

Abstract: A first species selectively dopes a workpiece to form a first doped region. In one embodiment, a selective implant is performed using a mask with apertures. A soft mask is applied to the first doped region. A second species is implanted into the workpiece to form a second implanted region. The soft mask blocks a portion of the second species. Then the soft mask is removed. The first species and second species may be opposite conductivities such that one is p-type and the other is n-type.

Abstract: Nanostructures and photovoltaic structures are disclosed. Methods for creating nanostructures are also presented.

Abstract: A phase change memory device comprises a photolithographically formed phase change memory cell having first and second electrodes and a phase change element positioned between and electrically coupling the opposed contact elements of the electrodes to one another. The phase change element has a width, a length and a thickness. The length, the thickness and the width are less than a minimum photolithographic feature size of the process used to form the phase change memory cell. The size of the photoresist masks used in forming the memory cell may be reduced so that the length and the width of the phase change element are each less than the minimum photolithographic feature size.