Amorphous Semiconductor Patents (Class 438/96)
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Publication number: 20110203650Abstract: A photovoltaic converter device includes a first conductivity type substrate (a p-type single crystalline silicon substrate 100), a first intermediate layer (an i-type semiconductor layer 110 or a dielectric layer 160), and a second conductivity type semiconductor layer (an n-type semiconductor layer 120). The first intermediate layer (the i-type semiconductor layer 110 or the dielectric layer 160) includes quantum dots (nanoparticles) having at least cores. The first conductivity type substrate is formed from crystalline semiconductor such as single crystalline silicon.Type: ApplicationFiled: February 24, 2011Publication date: August 25, 2011Applicant: SEIKO EPSON CORPORATIONInventor: Masahiro FURUSAWA
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Patent number: 7998785Abstract: A method is described of forming a film of an amorphous material on a substrate (14) by deposition from a plasma. The substrate (14) is placed in an enclosure, a film precursor gas is introduced into the enclosure through pipes (20), and unreacted and dissociated gas is extracted from the enclosure through pipes (22) so as to provide a low pressure therein. Microwave energy—is introduced into the gas within the enclosure as a sequence of pulses at a given frequency and power level to produce a plasma therein by distributed electron cyclotron resonance (DECR) and cause material to be deposited from the plasma on the substrate. The frequency and/or power level of the pulses is altered during the course of deposition of material, so as to cause the bandgap to vary over the thickness of the deposited material.Type: GrantFiled: October 26, 2007Date of Patent: August 16, 2011Assignees: Dow Corning Corporation, Ecole PolytechniqueInventors: Pere Roca I Cabarrocas, Pavel Bulkin, Dmitri Daineka, Patrick Leempoel, Pierre Descamps, Thibault Kervyn De Meerendre
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Publication number: 20110192452Abstract: In a thin film photoelectric conversion deice fabricated by addition of a catalyst element with the use of a solid phase growth method, defects such as a short circuit or leakage of current are suppressed. A catalyst material which promotes crystallization of silicon is selectively added to a second silicon semiconductor layer formed over a first silicon semiconductor layer having one conductivity type, the second silicon semiconductor layer is partly crystallized by a heat treatment, a third silicon semiconductor layer having a conductivity type opposite to the one conductivity type is stacked, and element isolation is performed at a region in the second silicon semiconductor layer to which a catalyst material is not added, so that a left catalyst material is prevented from being diffused again, and defects such as a short circuit or leakage of current are suppressed.Type: ApplicationFiled: February 8, 2011Publication date: August 11, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Kazuo NISHI
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Patent number: 7993954Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.Type: GrantFiled: November 24, 2010Date of Patent: August 9, 2011Assignee: Stion CorporationInventor: Robert D. Wieting
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Patent number: 7994420Abstract: A photovoltaic solar cell including an upper electrode, a layer with light scattering and/or reflection properties, and a lower electrode. The layer with light scattering and/or reflection properties is located between the upper electrode and the lower electrode.Type: GrantFiled: July 5, 2005Date of Patent: August 9, 2011Assignee: Saint-Gobain Glass FranceInventors: Nils-Peter Harder, Paul Mogensen, Ulf Blieske
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Patent number: 7993955Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.Type: GrantFiled: November 24, 2010Date of Patent: August 9, 2011Assignee: Stion CorporationInventor: Robert D. Wieting
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Publication number: 20110189811Abstract: A photovoltaic device includes a supporting layer, a semiconductor layer stack, and a conductive and light transmissive layer. The supporting layer is proximate to a bottom surface of the device. The semiconductor layer stack includes first and second semiconductor sub-layers, with the second sub-layer having a crystalline fraction of at least approximately 85%. A conductive and light transmissive layer between the supporting layer and the semiconductor layer stack, where an Ohmic contact exists between the first semiconductor sub-layer and the conductive and light transmissive layer.Type: ApplicationFiled: April 8, 2011Publication date: August 4, 2011Applicant: THINSILICON CORPORATIONInventors: Jason M. Stephens, Kevin Michael Coakley, Guleid Hussen
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Publication number: 20110186120Abstract: Certain example embodiments of this invention relate to solar cell devices, and/or methods of making the same. More particularly, certain example embodiments relate to a front transparent conductive electrode for solar cell devices (e.g., micro-morph silicon thin-film solar cells), and/or methods of making the same. The electrode of certain example embodiments may include a textured transparent conductive oxide (TCO) layer. The textured layer and/or coating may include at least two feature sizes, wherein at least one type of feature is comparable in size to the wavelength of solar light absorbed by the amorphous portion of the micro-morph silicon solar cell, and the other feature size being comparable to that of micro-crystalline portion. Double-agent etchants may be used to produce such different features sizes. Using a textured TCO-based layer having different feature sizes may improve the efficiency of the solar cell.Type: ApplicationFiled: January 26, 2011Publication date: August 4, 2011Applicant: Guardian Industries Corp.Inventor: Alexey Krasnov
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Publication number: 20110180124Abstract: A photovoltaic cell comprises an electrode layer (1b) of a transparent, electrically conductive oxide which is deposited upon a transparent carrier substrate (7b). There follows a contact layer (11b) which is of first type doped amorphous silicon and has a thickness of at most 10 nm. There follows a layer (26) of first type doped amorphous silicon compound which has a bandgap which is larger than the bandgap of the material of the addressed contact layer (11b). Subsequently to the first type doped amorphous silicon compound layer (2b) there follows a layer of intrinsic type silicon compound (3b) and a layer of second type doped silicon compound (5b).Type: ApplicationFiled: July 8, 2009Publication date: July 28, 2011Applicant: OERLIKON SOLAR AG, TRUEBBACHInventors: Hanno Goldbach, Tobias Roschek, Stefano Benagli, Bogdan Mereu
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Publication number: 20110180142Abstract: The method for manufacturing a photovoltaic cell or a photovoltaic converter panel comprises depositing a layer of p-doped amorphous silicon using a gas mixture comprising silane, methane, hydrogen and trimethylboron in a ratio of 1:2:2:1.25. In particular, plasma-enhanced chemical vapor deposition is used for the deposition. The corresponding photovoltaic cells and photovoltaic converter panels are also described.Type: ApplicationFiled: August 6, 2009Publication date: July 28, 2011Applicant: OERLIKON SOLAR AG, TRUEBBACHInventors: Stefano Benagli, Johannes Meier, Ulrich Kroll
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Publication number: 20110174371Abstract: A method for limiting epitaxial growth in a photoelectric device with heterojunctions including a crystalline silicon substrate and at least one layer of amorphous or microcrystalline silicon, wherein the method is characterised in that it includes the step of texturing the crystalline silicon surface.Type: ApplicationFiled: August 31, 2009Publication date: July 21, 2011Applicant: UNIVERSITÉ DE NEUCHÂTELInventors: Sara Olibet, Christian Monachon, Jérôme Damon-Lacoste, Christophe Ballif
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Publication number: 20110171774Abstract: Embodiments of the present invention generally provide a method for forming a plurality of thin film single or multi-junction solar cell in a substrate processing chamber. In one embodiment, a method for processing a plurality of thin film solar cell substrates includes depositing sequentially a first undoped layer and a first doped layer over a surface of a first substrate and a chamber component in a single processing chamber, removing the substrate having the doped and undoped layers from the processing chamber, removing the second doped layer deposited on the chamber component to expose underlying first undoped layer which serves as a seasoning layer for a second substrate to be processed in the processing chamber, and depositing sequentially a second undoped layer and a second doped layer on the second substrate in the processing chamber. In one example, the first undoped layer is amorphous silicon or microcrystalline silicon.Type: ApplicationFiled: December 14, 2010Publication date: July 14, 2011Applicant: APPLIED MATERIALS, INC.Inventors: Francimar C. Schmitt, Zheng Yuan, Yi Zheng, Fan Yang, Lipan Li
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Publication number: 20110168256Abstract: A photonic device, a method of making the device and a nano-scale antireflector employ a bramble of nanowires. The photonic device and the method include a first layer of a microcrystalline material provided on a substrate surface and a second layer of a microcrystalline material provided on the substrate surface horizontally spaced from the first layer by a gap. The photonic device and the method further include, and the nano-scale antireflector includes, the bramble of nanowires formed between the first layer and the second layer. The nanowires have first ends integral to crystallites in each of the first layer and the second layer. The nanowires of the bramble extend into the gap from each of the first layer and the second layer.Type: ApplicationFiled: October 3, 2008Publication date: July 14, 2011Inventors: Shih-Yuan Wang, R. Stanley Williams, Nobuhiko Kabayashi
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Publication number: 20110162700Abstract: The present invention concerns methods for producing photovoltaic material and a device able to exploit high energy photons. The photovoltaic material is obtained from a conventional photovoltaic material having a top surface intended to be exposed to photonic radiation, having a built-in P-N junction delimiting an emitter part and a base part and comprising at least one area or region specifically designed, treated or adapted to absorb high energy or energetic photons, located adjacent or near at least one hetero-interface. According to the invention, this material is subjected to treatments resulting in the formation of at least one semiconductor based metamaterial field or region being created, as a transitional region of the or a hetero-interface, in an area located continuous or proximate to the or an absorption area or region for the energetic photons of the photonic radiation impacting said photovoltaic material.Type: ApplicationFiled: February 6, 2009Publication date: July 7, 2011Inventors: Zbigniew T. Kuznicki, Patrick Meyrueis
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Publication number: 20110155234Abstract: A method of forming thin film solar cell includes the following steps. A substrate is provided, and a plurality of first electrodes are formed on the substrate. A printing process is performed to print a light-absorbing material on the substrate and the first electrodes to form a plurality of light-absorbing patterns. Each of the light-absorbing patterns corresponds to two adjacent first electrodes, partially covers the two adjacent first electrodes, and partially exposes the two adjacent first electrodes. A plurality of second electrodes are formed on the light-absorbing patterns.Type: ApplicationFiled: March 25, 2010Publication date: June 30, 2011Inventors: Kuang-Ting Chou, Han-Tang Chou, Ming-Yuan Huang, Han-Tu Lin
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Publication number: 20110155204Abstract: Disclosed herein is a wire type thin film solar cell, including: a metal wire which is made of any one selected from the group consisting of aluminum (Al), titanium (Ti), chromium (Cr), molybdenum (Mo) and tungsten (W); an N-type layer which is deposited on a circumference of the metal wire and conducts electrons generated from the metal wire; a P-type layer which is deposited on the N-type layer and emits electrons excited by solar light; and a transparent electrode layer which is deposited on the P-type layer. The wire type thin film solar cell can exhibit high photoelectric conversion efficiency compared to conventional flat-plate type thin film solar cells and can be easily manufactured into a highly-dense solar cell module.Type: ApplicationFiled: February 4, 2010Publication date: June 30, 2011Inventors: Jun Sin Yi, Jin Joo Park, Young Kuk Kim
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Method for forming a film with a graded bandgap by deposition of an amorphous material from a plasma
Patent number: 7964438Abstract: A method is described of forming a film of an amorphous material on a substrate by deposition from a plasma. The substrate is placed in an enclosure, a film precursor gas is introduced into the enclosure, and unreacted and dissociated gas is extracted from the enclosure so as to provide a low pressure therein. Microwave energy is introduced into the gas within the enclosure to produce a plasma therein by distributed electron cyclotron resonance (DECR) and cause material to be deposited from the plasma on the substrate. The said flow rate of the film precursor gas is altered during the course of deposition of material, so as to cause the bandgap to vary over the thickness of the deposited material.Type: GrantFiled: October 26, 2007Date of Patent: June 21, 2011Assignees: Dow Corning Corporation, Ecole PolytechniqueInventors: Pere Roca I Cabarrocas, Pavel Bulkin, Dmitri Daineka, Patrick Leempoel, Pierre Descamps, Thibault Kervyn De Meerendre -
Patent number: 7964434Abstract: A method of processing a plurality of photovoltaic materials in a batch process includes providing at least one transparent substrate having an overlying first electrode layer and an overlying copper species based absorber precursor layer within an internal region of a furnace. The overlying copper species based absorber precursor layer has an exposed face. The method further includes disposing at least one soda lime glass comprising a soda lime glass face within the internal region of the furnace such that the soda lime glass face is adjacent by a spacing to the exposed face of the at least one transparent substrate. Furthermore, the method includes subjecting the at least one transparent substrate and the one soda lime glass to thermal energy to transfer one or more sodium bearing species from the soda lime glass face across the spacing into the copper species based absorber precursor layer via the exposed face.Type: GrantFiled: September 25, 2009Date of Patent: June 21, 2011Assignee: Stion CorporationInventor: Robert D. Wieting
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Publication number: 20110139216Abstract: A solar cell and a manufacturing method thereof are disclosed. The solar cell in accordance with the present invention includes a substrate 100; a lower electrode 111a formed on the substrate 100; a photoelectric element unit 200a including a polycrystalline photoelectric element 210 formed on the lower electrode 111a and formed by stacking a plurality of polycrystalline semiconductor layers 211a, 212a, and 213a, and a amorphous photoelectric element 220 formed on the polycrystalline photoelectric element 210 and formed by stacking a plurality of amorphous semiconductor layers 221, 222, and 223; and an upper electrode 400 formed on the photoelectric element unit 200a.Type: ApplicationFiled: August 10, 2009Publication date: June 16, 2011Applicant: TG Solar CorporationInventors: Yoo Jin Lee, In Goo Jang, Dong Jee Kim, Seok Pil Jang, Young Ho Lee, Byung Lee, II, Tack Yong Jang
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Publication number: 20110143496Abstract: A method of making a monolithic photovoltaic module having a flexible substrate is described. The method includes the following steps. First, a flexible substrate is provided, and a first adhesive layer, a metal layer, and a second adhesive layer are formed thereon. The second adhesive layer, the metal layer and the first adhesive layer are etched with at least one etching paste. In addition, a patterned semiconductor body layer patterned by an etching paste or a laser scribing is formed thereon. Furthermore, transparent top electrodes patterned by an etching paste or a cold laser scribing are formed on the patterned semiconductor body layer.Type: ApplicationFiled: December 8, 2010Publication date: June 16, 2011Applicant: Du Pont Apollo LimitedInventors: Chiou-Fu Wang, Huo-Hsien Chiang
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Patent number: 7960646Abstract: In order to improve photoelectric conversion properties of a silicon-based thin-film photoelectric converter to which a conductive SiOx layer is inserted to obtain an optical confinement effect, the silicon-based thin-film photoelectric converter according to the present invention includes an i-type photoelectric conversion layer of hydrogenated amorphous silicon or an alloy thereof, an i-type buffer layer made of hydrogenated amorphous silicon, and an n-type Si1-xOx layer (x is 0.25-0.6) stacked successively, wherein the buffer layer has a higher hydrogen concentration at its interface with and as compared with the photoelectric conversion layer and has a thickness of at least 5 nm and at most 50 nm. Accordingly, generation of silicon crystal phase parts and reduction of resistivity are promoted in the n-type Si1-xOx layer, contact resistance at the interface is reduced, and FF of the photoelectric converter is improved, so that the photoelectric converter achieves improved properties.Type: GrantFiled: July 25, 2006Date of Patent: June 14, 2011Assignee: Kaneka CorporationInventors: Toshiaki Sasaki, Kenji Yamamoto
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Patent number: 7960644Abstract: Methods for fabricating solar cells without the need to perform gasification of metallurgical-grade silicon are disclosed. Consequently, the costs and health and environmental hazards involved in fabricating the solar or silicon grade silicon are being avoided. A solar cell structure comprises a metallurgical grade doped silicon substrate and a thin-film structure formed over the substrate to form a p-i-n junction with the substrate. The substrate may be doped p-type, and the thin film structure may be an intrinsic amorphous layer formed over the substrate and an n-type amorphous layer formed over the intrinsic layer.Type: GrantFiled: November 7, 2008Date of Patent: June 14, 2011Assignee: Sunpreme, Ltd.Inventor: Ashok Sinha
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Publication number: 20110132441Abstract: In a solar cell comprising a semiconductor substrate 11 and a i-type amorphous semiconductor layer 12 formed on a back surface of the semiconductor substrate 11, the i-type amorphous semiconductor layer 12 includes an exposed portion 12A exposed in a planer view, and a covered portion 12B covered with each of the p-type semiconductor layer 13 and the n-type semiconductor layer 14. A thickness T1 of the exposed portion 12A is less than a thickness T2 of the covered portion 12B.Type: ApplicationFiled: June 29, 2009Publication date: June 9, 2011Applicant: SANYO ELECTRIC CO., LTD.Inventors: Toshio Asaumi, Hitoshi Sakata
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Patent number: 7955891Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.Type: GrantFiled: November 24, 2010Date of Patent: June 7, 2011Assignee: Stion CorporationInventor: Robert D. Wieting
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Patent number: 7955890Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.Type: GrantFiled: June 17, 2009Date of Patent: June 7, 2011Assignee: Applied Materials, Inc.Inventors: Soo Young Choi, Jriyan Jerry Chen, Tae Kyung Won, Dong-Kil Yim
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Patent number: 7956283Abstract: Methods for fabricating solar cells without the need to perform gasification of metallurgical-grade silicon are disclosed. Consequently, the costs and health and environmental hazards involved in fabricating the solar or silicon grade silicon are being avoided. A solar cell structure comprises a metallurgical grade doped silicon substrate and a thin-film structure formed over the substrate to form a p-i-n junction with the substrate. The substrate may be doped p-type, and the thin film structure may be an intrinsic amorphous layer formed over the substrate and an n-type amorphous layer formed over the intrinsic layer.Type: GrantFiled: November 7, 2008Date of Patent: June 7, 2011Assignee: Sunpreme, Ltd.Inventor: Ashok Sinha
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Publication number: 20110126898Abstract: The formation of solar cell contacts using a laser is described. A method of fabricating a back-contact solar cell includes forming a poly-crystalline material layer above a single-crystalline substrate. The method also includes forming a dielectric material stack above the poly-crystalline material layer. The method also includes forming, by laser ablation, a plurality of contacts holes in the dielectric material stack, each of the contact holes exposing a portion of the poly-crystalline material layer; and forming conductive contacts in the plurality of contact holes.Type: ApplicationFiled: September 30, 2010Publication date: June 2, 2011Inventors: Gabriel Harley, David Smith, Peter Cousins
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Publication number: 20110126902Abstract: An apparatus for manufacturing a thin film solar cell that increase homogeneity in film characteristics. In a process of conveying a substrate from one roll to another roll, a power generation layer, which is a laminated body of a plurality of semiconductor layers, is formed in a plurality of film formation compartments partitioned along a conveying direction between the roll pair. A plurality of flat application electrodes are laid out in the conveying direction facing toward the substrate in each film formation compartment. Each flat application electrode includes a power supply terminal supplied with high frequency power in a VHF band. When the wavelength of the high frequency power is represented by ?, the distance between an edge of the flat application electrode and the power supply terminal is set to be shorter than ?/4 in a direction orthogonal to the conveying direction.Type: ApplicationFiled: July 24, 2009Publication date: June 2, 2011Applicants: ULVAC, INC., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCEINCEInventors: Masashi Kikuchi, Atsushi Masuda
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Patent number: 7951640Abstract: Solar cells fabricated without gasification of metallurgical-grade silicon. The substrates are prepared by: melting metallurgical grade silicon in a furnace; solidifying the melted metallurgical grade silicon into an ingot; slicing the ingot to obtain a plurality of wafers; polishing and cleaning each wafer; depositing aluminum layer on backside of each wafer; depositing a layer of hydrogenated silicon nitride on front surface of each wafer; annealing the wafers at elevated temperature; removing the hydrogenated silicon nitride; and, removing the aluminum layer. The front surface may be textured prior to forming the solar cell. The solar cell structure comprises a metallurgical grade doped silicon substrate and a thin-film structure formed over the substrate to form a p-i-n junction with the substrate. The substrate may be doped p-type, and the thin film structure may be an intrinsic amorphous layer formed over the substrate and an n-type amorphous layer formed over the intrinsic layer.Type: GrantFiled: December 2, 2009Date of Patent: May 31, 2011Assignee: Sunpreme, Ltd.Inventor: Ashok Sinha
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Publication number: 20110114177Abstract: A method and apparatus for forming solar cells is provided. In one embodiment, a photovoltaic device includes a first p-i-n junction cell formed on a substrate, wherein the p-i-n junction cell comprises a p-type silicon containing layer, an intrinsic type silicon containing layer formed over the p-type silicon containing layer, and a n-type silicon containing layer formed over the intrinsic type silicon containing layer, wherein the intrinsic type silicon containing layer comprises a first pair of microcrystalline layer and amorphous silicon layer.Type: ApplicationFiled: July 19, 2010Publication date: May 19, 2011Applicant: APPLIED MATERIALS, INC.Inventors: Fan Yang, Lin Zhang, Yi Zheng, Francimar Schmitt, Zheng Yuan
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Publication number: 20110111550Abstract: A novel photovoltaic solar cell and method of making the same are disclosed. The solar cell includes: at least one absorber layer which could either be a lightly doped layer or an undoped layer, and at least a doped window-layers which comprise at least two sub-window-layers. The first sub-window-layer, which is next to the absorber-layer, is deposited to form desirable junction with the absorber-layer. The second sub-window-layer, which is next to the first sub-window-layer, but not in direct contact with the absorber-layer, is deposited in order to have transmission higher than the first-sub-window-layer.Type: ApplicationFiled: December 14, 2010Publication date: May 12, 2011Inventors: Xunming Deng, Xianbo Liao, Wenhui Du
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Publication number: 20110108728Abstract: An ambit light sensor with a function of IR sensing and a method of fabricating the same are provided. The ambit light sensor includes a substrate, an ambit light sensing structure, an infrared ray (IR) sensing structure, and a dielectric layer. The ambit light sensing structure is located over the substrate for sensing and filtering visible light. The IR sensing structure is located in the substrate under the ambit light sensing structure for sensing IR. The dielectric layer is located between the ambit light sensing structure and the IR sensing structure.Type: ApplicationFiled: January 28, 2010Publication date: May 12, 2011Applicant: MAXCHIP ELECTRONICS CORP.Inventors: Jin-Wei Chang, Jen-Yao Hsu, Hong-Xian Wang, Yu-Hsien Chen
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Publication number: 20110104849Abstract: A photovoltaic device capable of improving an output characteristic is provided. The photovoltaic device includes an n-type single-crystal silicon substrate, a p-type amorphous silicon substrate, and a substantially intrinsic i-type amorphous silicon layer disposed between the n-type single-crystal silicon substrate and the p-type amorphous silicon layer. The i-type amorphous silicon layer includes: a first section which is located on the n-type single-crystal silicon substrate side, and which has an oxygen concentration equal to or below 1020 cm?3; and a second section which is located on the p-type amorphous silicon layer side, and which has an oxygen concentration equal to or above 1020 cm?3.Type: ApplicationFiled: January 10, 2011Publication date: May 5, 2011Applicant: SANYO ELECTRIC CO., LTD.Inventor: Akira TERAKAWA
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Publication number: 20110100445Abstract: Certain example embodiments of this invention relate to a front transparent conductive electrode for solar cell devices (e.g., amorphous silicon or a-Si solar cell devices), and/or methods of making the same. Advantageously, certain example embodiments enable high haze to be realized in the top layer of the thin film stack. In certain example embodiments, an insertion layer comprising ITO or AZO is provided between a layer of AZO and a layer of ITO. The AZO may be deposited at room temperature. The insertion layer is provided with an oxygen content selected so that the insertion layer sufficient to alter the crystalline growth of the layer of AZO compared to a situation where no insertion layer is provided. In certain example embodiments, the layer of ITO may be ion-beam treated so as to roughen a surface thereof. The ion beam treating may be performed a voltage sufficient to alter the crystalline growth of the layer of AZO compared to a situation where no insertion layer is provided.Type: ApplicationFiled: November 5, 2009Publication date: May 5, 2011Applicant: Guardian Industries Corp.Inventor: Alexey Krasnov
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Patent number: 7932126Abstract: The area occupied by a photo-sensor element may be reduced and multiple elements may be integrated in a limited area so that the sensor element can have higher output and smaller size. Higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active layer over a plastic film substrate that can resist the temperature in the process for mounting such as a solder reflow process. A sensor element that can resist bending stress can be obtained.Type: GrantFiled: January 6, 2009Date of Patent: April 26, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junya Maruyama, Toru Takayama, Masafumi Morisue, Ryosuke Watanabe, Eiji Sugiyama, Susumu Okazaki, Kazuo Nishi, Jun Koyama, Takeshi Osada, Takanori Matsuzaki
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Publication number: 20110089420Abstract: Systems, methods, devices, and products of processes consistent with the innovations herein relate to thin-film solar cells having contacts on the backside, only. In one exemplary implementation, there is provided a thin film device. Moreover, such device may comprise a substrate, and a layer of silicon or silicon-containing material positioned on a first side of the substrate, wherein the layer comprises a n-doped region and a p-doped region. In some exemplary implementations, the device may be fabricated such that the n-doped region and the p-doped region are formed on the backside surface of the layer to create an electrical structure characterized by a P-type anode and an N-type cathode forming a junction positioned along the backside surface of the layer.Type: ApplicationFiled: August 16, 2010Publication date: April 21, 2011Inventor: Venkatraman Prabhakar
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Publication number: 20110088760Abstract: A photovoltaic device and methods for forming an amorphous silicon layer for use in a photovoltaic device are provided. In one embodiment, a photovoltaic device includes a p-type amorphous silicon layer formed on a substrate, a barrier layer formed on the p-type amorphous silicon layer, and an intrinsic type amorphous silicon layer formed on the barrier layer. The barrier layer is a carbon doped amorphous silicon layer.Type: ApplicationFiled: October 20, 2009Publication date: April 21, 2011Applicant: APPLIED MATERIALS, INC.Inventors: Shuran Sheng, Yong-Kee Chae
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Publication number: 20110083728Abstract: A disordered nanowire solar cell includes doped silicon nanowires disposed in a disordered nanowire mat, a thin (e.g., 50 nm) p-i-n coating layer formed on the surface of the silicon nanowires, and a conformal conductive layer disposed on the upper (e.g., n-doped) layer of the p-i-n coating layer. The disordered nanowire mat is grown from a seed layer using VLS processing at a high temperature (e.g., 450° C.), whereby the crystalline silicon nanowires assume a random interwoven pattern that enhances light scattering. Light scattered by the nanowires is absorbed by p-i-n layer, causing, e.g., electrons to pass along the nanowires to the first electrode layer, and holes to pass through the conformal conductive layer to an optional upper electrode layer. Fabrication of the disordered nanowire solar cell is large-area compatible.Type: ApplicationFiled: October 14, 2009Publication date: April 14, 2011Applicant: Palo Alto Research Center IncorporatedInventors: Robert A. Street, William S. Wong
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Publication number: 20110079281Abstract: A solar cell comprising a base layer of p-doped silicon and an emitter layer of n-doped silicon, where an electrode is arranged regionally on the emitter layer and optionally it passivation layer is arranged regionally on the back surface of the base layer and a layer of a dielectric, the entire area of which is covered with a metal layer, is arranged regionally thereon, where the metal layer is in electrically conducting contact via an interlayer with the base layer over the regions not covered by the layer of dielectric and the interlayer comprises a mixed phase from the material of the passivation layer and the material of the metal layer. The present invention further relates to a method of production of said solar cell.Type: ApplicationFiled: April 2, 2009Publication date: April 7, 2011Applicant: Universitat StuttgartInventors: Michael Reuter, Rainer Merz, Johannes Rostan
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Patent number: 7919398Abstract: Embodiments of the invention as recited in the claims relate to thin film multi-junction solar cells and methods and apparatuses for forming the same. In one embodiment a method of forming a thin film multi-junction solar cell over a substrate is provided. The method comprises positioning a substrate in a reaction zone, providing a gas mixture to the reaction zone, wherein the gas mixture comprises a silicon containing compound and hydrogen gas, forming a first region of an intrinsic type microcrystalline silicon layer on the substrate at a first deposition rate, forming a second region of the intrinsic type microcrystalline silicon layer on the substrate at a second deposition rate higher than the first deposition rate, and forming a third region of the intrinsic type microcrystalline silicon layer on the substrate at a third deposition rate lower than the second deposition rate.Type: GrantFiled: June 26, 2009Date of Patent: April 5, 2011Assignee: Applied Materials, Inc.Inventors: Yong Kee Chae, Soo Young Choi, Shuran Sheng
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Publication number: 20110073175Abstract: A photovoltaic cell is described having emitter portions formed at both a light-facing surface and a back surface of the cell. In some embodiments, heavily doped emitter regions extend between the front and back emitter regions, connecting them electrically. Use of this structure is particularly well-adapted to a cell formed by implanting a semiconductor donor body with hydrogen and/or helium ions, affixing the donor body to a receiver element, cleaving a lamina from the donor body, and completing fabrication of a photovoltaic cell comprising the lamina. The emitter portion formed at the unbonded surface may comprise amorphous silicon. The lamina may be thin, for example 10 microns thick or less.Type: ApplicationFiled: September 29, 2009Publication date: March 31, 2011Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventors: Mohamed M. Hilali, Christopher J. Petti
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Patent number: 7915520Abstract: A photoelectric conversion device comprising: a pin-type photoelectric conversion layer constituted of a p-type semiconductor layer, an i-type semiconductor layer and an n-type semiconductor layer, wherein the p-type semiconductor layer contains silicon atoms and nitrogen atoms, which is possible to improve photoelectric conversion efficiency.Type: GrantFiled: March 24, 2005Date of Patent: March 29, 2011Assignee: Sharp Kabushiki KaishaInventors: Kazuhito Nishimura, Yoshiyuki Nasuno, Hiroshi Yamamoto, Yoshitaka Sugita
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Patent number: 7915103Abstract: The method for fabricating a flat panel display includes performing a first crystallization process to re-crystallize an amorphous silicon layer on a glass substrate to make the amorphous silicon layer become a polysilicon layer, forming a patterned absorbing layer to cover an active area pattern of a driving TFT and to expose portions of the polysilicon layer, performing a second crystallization process to re-crystallization the exposed portions of the polysilicon layer so that the exposed portions of the polysilicon layer has a different grain structure from the grain structure of the driving TFT, removing the patterned absorbing layer, and removing portions of the polysilicon layer to form an active area of the driving TFT and an active area of a switching TFT area in the exposed portions of the polysilicon layer of each sub-pixel.Type: GrantFiled: May 1, 2009Date of Patent: March 29, 2011Assignee: Chimei Innolux CorporationInventors: Chun-Yen Liu, Chang-Ho Tseng
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Patent number: 7910399Abstract: The thermal management and method for large scale processing of CIS and/or CIGS based thin film overlaying glass substrates. According to an embodiment, the present invention provides a method for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, the second temperature ranging from about 350° C. to about 450° C.Type: GrantFiled: September 28, 2009Date of Patent: March 22, 2011Assignee: Stion CorporationInventor: Robert D. Wieting
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Publication number: 20110061733Abstract: The objective of this invention is to use chemical additives to increase the rate of deposition processes for the amorphous silicon film (?Si:H) and/or the microcrystalline silicon film (?CSi:H), and improve the electrical current generating capability of the deposited films for photoconductive films used in the manufacturing of Thin Film based Photovoltaic (TFPV) devices.Type: ApplicationFiled: August 31, 2010Publication date: March 17, 2011Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Patrick Timothy Hurley, Robert Gordon Ridgeway, Katherine Anne Hutchison, John Giles Langan
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Publication number: 20110056550Abstract: A solar cell and a method for manufacturing the same are disclosed. The solar cell includes a substrate that contains first impurities of a first conductive type and is formed of a crystalline semiconductor, a first field region that is positioned on an incident surface of the substrate and contains second impurities of a second conductive type, an emitter region that contains third impurities of a third conductive type, is formed of a non-crystalline semiconductor, and is positioned on a non-incident surface of the substrate opposite the incident surface of the substrate, a first electrode electrically connected to the emitter region, and a second electrode electrically connected to the substrate.Type: ApplicationFiled: September 7, 2010Publication date: March 10, 2011Inventors: Wonseok CHOI, Kwangsun Ji, Heonmin Lee, Hojung Syn, Junghoon Choi, Hyunjin Yang
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Publication number: 20110056557Abstract: A thin film solar cell including a first substrate, a first electrode on the first substrate, an upper surface of the first electrode having a plurality of irregularities, an absorption layer on the first electrode, the absorption layer including amorphous silicon layers and microcrystal silicon layers contacting the first electrode at an angle relative to the first substrate, a second electrode on the absorption layer, and a second substrate on the second electrode.Type: ApplicationFiled: September 8, 2010Publication date: March 10, 2011Inventors: Wonseo PARK, Jeongwoo LEE, Seongkee PARK, Yiyin YU
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Patent number: 7902049Abstract: A process for the plasma deposition of a layer of a microcrystalline semiconductor material is carried out by energizing a process gas which includes a precursor of the semiconductor material and a diluent with electromagnetic energy so as to create a plasma therefrom. The plasma deposits a layer of the microcrystalline semiconductor material onto the substrate. The concentration of the diluent in the process gas is varied as a function of the thickness of the layer of microcrystalline semiconductor material which has been deposited. Also disclosed is the use of the process for the preparation of an N-I-P type photovoltaic device.Type: GrantFiled: January 27, 2004Date of Patent: March 8, 2011Assignee: United Solar Ovonic LLCInventors: Subhendu Guha, Chi C. Yang, Baojie Yan
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Patent number: 7902454Abstract: An i-type amorphous silicon layer 14 and a p-type amorphous silicon layer 15 are formed on a part of an inner wall of a through hole of an n-type single-crystal silicon substrate 11. Further, an i-type amorphous silicon layer 12 and an n-type amorphous silicon layer 13 are formed on a part of the inner wall of the through hole of the n-type single-crystal silicon substrate 11. The inner wall surface of the through hole is covered with the i-type amorphous silicon layer 14 and the i-type amorphous silicon layer 12.Type: GrantFiled: September 25, 2008Date of Patent: March 8, 2011Assignee: Sanyo Electric Co., Ltd.Inventor: Toshihiro Kinoshita
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Publication number: 20110047929Abstract: Photovoltaic bituminous tile for photovoltaic roof, production method of the tile and laying method of the roof, in which: —the photovoltaic bituminous tile includes the photovoltaic module that integrates at least one amorphous silicon triple junction solar cell and electric connecting means, coupled to a bituminous base by means of a sticking phase; —and in which, the installation of the photovoltaic roof requires two phases; a first phase in which the photovoltaic bituminous tiles are placed, each provided with electric connecting means, placed side-by-side to the other at the lateral edge and surmounted near the upper longitudinal edge, and, at least at the connection of each tile placed side-by-side to the other, with at least one angular ‘L’ shaped section to which a covering is joinable; the second phase performing the electrical connections with protection of the connections and of the connecting means by means of application of the protection covering.Type: ApplicationFiled: January 23, 2009Publication date: March 3, 2011Applicant: TEGOLA CANADESE SPAInventor: Fulvio Cappelli